From dd815a8b7c2a52cecf679f0319a3141469cfb08e Mon Sep 17 00:00:00 2001
From: Gabriel Kerneis
Date: Fri, 14 Feb 2014 15:00:56 +0000
Subject: Infinite loop in interpreter for register slice write

I believe the issue is on the Lem side, but I might be doing something
wrong on the OCaml side too.
---
 src/test/vectors.sail | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src')

diff --git a/src/test/vectors.sail b/src/test/vectors.sail
index 63e758fa..70cc5973 100644
--- a/src/test/vectors.sail
+++ b/src/test/vectors.sail
@@ -44,6 +44,8 @@ function bit main _ = {
 
   (* slice update *)
   i[0] := bitzero;
+  i[2 .. 3] := [bitone, bitone];
+
   (* slice access of literal *)
   v[0];
 }
-- 
cgit v1.2.3