From 03ccdf7f18e28a4d9fa1f6d7c7241d0bf340f45b Mon Sep 17 00:00:00 2001
From: Gabriel Kerneis
Date: Tue, 7 Jan 2014 18:47:21 +0100
Subject: Add bit and bitvector literal test

---
 src/test/test1.sail | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/test/test1.sail b/src/test/test1.sail
index 5c29f258..2ebc5e0a 100644
--- a/src/test/test1.sail
+++ b/src/test/test1.sail
@@ -10,5 +10,7 @@ typedef maybe = const union forall 'a. { Nne; 'a Sme; }
 typedef colors = enumerate { red; green; blue }
 typedef creg = register bits [5:'i] { 5 : h ; 6..7 : j}
 let bool e = true
+let bit v = bitzero
+let ( bit [ 32 ] ) v1 = 0b101
 
-function unit main _ = ()
\ No newline at end of file
+function unit main _ = ()
-- 
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