From 001e28b487c8a4cb2a25519a3acc8ac8c1aaabf5 Mon Sep 17 00:00:00 2001
From: Alasdair Armstrong
Date: Wed, 31 Oct 2018 15:43:56 +0000
Subject: Rename Reporting_basic to Reporting

There is no Reporting_complex, so it's not clear what the basic is
intended to signify anyway.

Add a GitHub issue link to any err_unreachable errors (as they are all
bugs)
---
 src/state.ml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/state.ml')

diff --git a/src/state.ml b/src/state.ml
index 70e53a52..31f5c7eb 100644
--- a/src/state.ml
+++ b/src/state.ml
@@ -187,12 +187,12 @@ let rec regval_constr_id mwords (Typ_aux (t, l) as typ) = match t with
        | Typ_arg_order (Ord_aux (Ord_inc, _)) -> "inc"
        | Typ_arg_order (Ord_aux (Ord_dec, _)) -> "dec"
        | _ ->
-          raise (Reporting_basic.err_typ l "Unsupported register type")
+          raise (Reporting.err_typ l "Unsupported register type")
      in
      let builtins = IdSet.of_list (List.map mk_id ["vector"; "list"; "option"]) in
      if IdSet.mem id builtins && not (mwords && is_bitvector_typ typ) then id else
      append_id id (String.concat "_" ("" :: List.map name_arg args))
-  | _ -> raise (Reporting_basic.err_typ l "Unsupported register type")
+  | _ -> raise (Reporting.err_typ l "Unsupported register type")
 
 let register_base_types mwords typs =
   let rec add_base_typs typs (Typ_aux (t, _) as typ) =
-- 
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