From f1f618d888407c2e6fa8b0498b2554585772fb09 Mon Sep 17 00:00:00 2001
From: Christopher Pulte
Date: Sat, 5 Nov 2016 16:09:12 +0000
Subject: fixes

---
 src/lem_interp/interp_interface.lem | 1 +
 src/lem_interp/sail_impl_base.lem   | 6 ++++++
 2 files changed, 7 insertions(+)

(limited to 'src/lem_interp')

diff --git a/src/lem_interp/interp_interface.lem b/src/lem_interp/interp_interface.lem
index a648b437..ea3ba154 100644
--- a/src/lem_interp/interp_interface.lem
+++ b/src/lem_interp/interp_interface.lem
@@ -203,3 +203,4 @@ val instruction_analysis :
 
 
 val initial_outcome_s_of_instruction : context -> interp_mode -> instruction -> Sail_impl_base.outcome_s instruction_state unit
+
diff --git a/src/lem_interp/sail_impl_base.lem b/src/lem_interp/sail_impl_base.lem
index 13a2dd38..86778bee 100644
--- a/src/lem_interp/sail_impl_base.lem
+++ b/src/lem_interp/sail_impl_base.lem
@@ -1400,3 +1400,9 @@ instance  (Eq decode_error)
   let (<>) = decode_error_inequal
 end
 
+type regfp =
+  | RFull of (string)
+  | RSlice of (string * integer * integer)
+  | RSliceBit of (string * integer)
+  | RField of (string * string)
+
-- 
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