From 8e5d44d17c71cf946e65e15de8df42de2af4c652 Mon Sep 17 00:00:00 2001 From: Shaked Flur Date: Wed, 1 Nov 2017 14:17:08 +0000 Subject: added RISC-V "fence r,r" --- risc-v/riscv_extras_embed.lem | 2 ++ 1 file changed, 2 insertions(+) (limited to 'risc-v/riscv_extras_embed.lem') diff --git a/risc-v/riscv_extras_embed.lem b/risc-v/riscv_extras_embed.lem index d89dc44c..32110079 100644 --- a/risc-v/riscv_extras_embed.lem +++ b/risc-v/riscv_extras_embed.lem @@ -53,12 +53,14 @@ let speculate_conditional_success () = excl_result () >>= fun b -> return (if b val MEM_fence_rw_rw : unit -> M unit val MEM_fence_r_rw : unit -> M unit +val MEM_fence_r_r : unit -> M unit val MEM_fence_rw_w : unit -> M unit val MEM_fence_w_w : unit -> M unit val MEM_fence_i : unit -> M unit let MEM_fence_rw_rw () = barrier Barrier_RISCV_rw_rw let MEM_fence_r_rw () = barrier Barrier_RISCV_r_rw +let MEM_fence_r_r () = barrier Barrier_RISCV_r_r let MEM_fence_rw_w () = barrier Barrier_RISCV_rw_w let MEM_fence_w_w () = barrier Barrier_RISCV_w_w let MEM_fence_i () = barrier Barrier_RISCV_i -- cgit v1.2.3