From efd8234cbac39bcf4ca6498057be5115cfda7fe7 Mon Sep 17 00:00:00 2001
From: Prashanth Mundkur
Date: Tue, 17 Apr 2018 17:37:09 -0700
Subject: Add platform initialization for the new bits of machine state.

---
 riscv/riscv_sys.sail   | 7 +++++++
 riscv/riscv_types.sail | 7 +++++++
 2 files changed, 14 insertions(+)

diff --git a/riscv/riscv_sys.sail b/riscv/riscv_sys.sail
index 66d8a7c8..f81a7ebd 100644
--- a/riscv/riscv_sys.sail
+++ b/riscv/riscv_sys.sail
@@ -649,5 +649,12 @@ function handle_exception_ctl(cur_priv : Privilege, ctl : ctl_result,
 
 function init_sys () : unit -> unit = {
   cur_privilege = Machine;
+  misa->MXL() = arch_to_bits(RV64);
   misa->C() = true;
+  misa->U() = true;
+  misa->S() = true;
+
+  mstatus->SXL() = misa.MXL();
+  mstatus->UXL() = misa.MXL();
+  mstatus->SD()  = false;
 }
diff --git a/riscv/riscv_types.sail b/riscv/riscv_types.sail
index 2d184042..78b0ea89 100644
--- a/riscv/riscv_types.sail
+++ b/riscv/riscv_types.sail
@@ -61,6 +61,13 @@ function architecture(a : arch_xlen) -> option(Architecture) = {
     _    => None()
   }
 }
+function arch_to_bits(a : Architecture) -> arch_xlen = {
+  match (a) {
+    RV32  => 0b01,
+    RV64  => 0b10,
+    RV128 => 0b11
+  }
+}
 
 /* privilege levels */
 
-- 
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