From 472097b3fb486d474a427427c1c38298a2ee1fc3 Mon Sep 17 00:00:00 2001
From: Jon French
Date: Tue, 10 Jul 2018 15:00:25 +0100
Subject: disable printing when compiling to Lem to keep rmem happy

---
 riscv/riscv_extras.lem       | 4 ++--
 src/gen_lib/sail2_values.lem | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/riscv/riscv_extras.lem b/riscv/riscv_extras.lem
index 88ac3e6f..60b635da 100644
--- a/riscv/riscv_extras.lem
+++ b/riscv/riscv_extras.lem
@@ -106,7 +106,7 @@ val shift_bits_left : forall 'a 'b. Size 'a, Size 'b => bitvector 'a -> bitvecto
 let shift_bits_left v m = shiftl v (uint m)
 
 val print_string : string -> string -> unit
-let print_string msg s = print_endline (msg ^ s)
+let print_string msg s = () (* print_endline (msg ^ s) *)
 
 val prerr_string : string -> string -> unit
 let prerr_string msg s = prerr_endline (msg ^ s)
@@ -115,4 +115,4 @@ val prerr_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit
 let prerr_bits msg bs = prerr_endline (msg ^ (show_bitlist (bits_of bs)))
 
 val print_bits : forall 'a. Size 'a => string -> bitvector 'a -> unit
-let print_bits msg bs = print_endline (msg ^ (show_bitlist (bits_of bs)))
+let print_bits msg bs = () (* print_endline (msg ^ (show_bitlist (bits_of bs))) *)
diff --git a/src/gen_lib/sail2_values.lem b/src/gen_lib/sail2_values.lem
index 003eedc7..fd742fb1 100644
--- a/src/gen_lib/sail2_values.lem
+++ b/src/gen_lib/sail2_values.lem
@@ -47,7 +47,7 @@ let power_real b e = realPowInteger b e*)
 
 val print_endline : string -> unit
 let print_endline _ = ()
-declare ocaml target_rep function print_endline = `print_endline`
+(* declare ocaml target_rep function print_endline = `print_endline` *)
 
 val prerr_endline : string -> unit
 let prerr_endline _ = ()
-- 
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