From 4d652c426f57e5255ef8c1d828c53abcbb69d722 Mon Sep 17 00:00:00 2001
From: Brian Campbell
Date: Mon, 12 Nov 2018 16:10:04 +0000
Subject: Add RVFI DII version of the RISC-V simulator for TestRIG

The new riscv_rvfi target should still be usable as a normal simulator,
but also has extra registers in the model for the RVFI DII protocol and
code to update them, and the driver has a -r option to enable RVFI mode.
---
 .gitignore | 2 ++
 1 file changed, 2 insertions(+)

(limited to '.gitignore')

diff --git a/.gitignore b/.gitignore
index 3ad05e9d..b222fe26 100644
--- a/.gitignore
+++ b/.gitignore
@@ -92,8 +92,10 @@ lib/hol/sail-heap
 /riscv/platform
 /riscv/riscv.c
 /riscv/riscv_model.c
+/riscv/riscv_rvfi_model.c
 /riscv/riscv_c
 /riscv/riscv_sim
+/riscv/riscv_rvfi
 
 /x86/x86.lem
 /x86/x86.ml
-- 
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