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path: root/src/sail_lib.ml
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2018-04-03Added test cases for builtinsAlasdair Armstrong
Added library for simple integer arithmetic functions in lib/arith.sail WIP TeX file for formatting latex output included in lib/sail.tex Fixes for bugs in sail_lib
2018-03-27print IPS after running cheri model.Robert Norton
2018-03-15Some CHERI compilation fixesThomas Bauereiss
2018-03-14Fix Lem generation for CHERI-MIPS and Aarch64Thomas Bauereiss
- Update Lem bindings and extras files - Rewrite Nexp_var's if they are bound to a constant, similar to Nexp_id's (used for cap_size in the CHERI spec) - Add Lem and Isabelle Makefile targets for CHERI
2018-03-14fix riscv build: missing eq_bit implementation.Robert Norton
2018-03-12ELF loading for C backendAlasdair Armstrong
Add a flag to Sail that allows for an image of an elf file to be dumped in a simple format using linksem, used as sail -elf test.elf -o test.bin This image file can then be used by a compiled C version of a sail spec as with ocaml simply by ./a.out test.bin
2018-03-06finish port of cheri128 spec. to sail2.Robert Norton
2018-03-01Add support for read_tag and write_tag in sail_lib.ml. and support for ↵Robert Norton
intialising and dumping CHERI state. Somewhat working cheri sail2 model.
2018-02-27Get MIPS translated to LemThomas Bauereiss
2018-02-23Fix some bugs in C compilationAlasdair Armstrong
Fixed an issue with pattern matching on enums Fixed an issue whereby fix_early_returns would cause memory leaks Added optimizations for some of the builtins used in the decode function. Optimizations are turned on with the -O flag.
2018-02-23Some tidy up of sail library - use extract_num from Big_int to implement ↵Robert Norton
to_get_slice_int in less confusing way. Add arithmetic shift right.
2018-02-15Update duopod spec so it has no address translationAlasdair Armstrong
Also update the main aarch64 (no_vector) spec with latest asl_parser
2018-02-13Support for large bitvector literals in C backendAlasdair Armstrong
2018-02-06fix backwards arguments to pow2.Robert Norton
2018-02-02Add M extension to RISCV. Slightly inelegant implementation for now but ↵Robert Norton
passing tests.
2018-01-29Add some initial exception handling to the riscv execution loop.Prashanth Mundkur
2018-01-29implement shift primitives in sail_lib.mlRobert Norton
2018-01-24Fixed riscv ocaml compilationAlasdair Armstrong
2018-01-22Added rewriter that specializes all function calls in a specification.Alasdair Armstrong
This removes all type polymorphism, so we can generate optimized bitvector code and compile to languages without parametric polymorphism.
2018-01-22Update and fix test suiteAlasdair Armstrong
2018-01-18Modified ocaml backend to use ocamlfind for linksem and lemAlasdair Armstrong
Fixed test cases for ocaml backend and interpreter
2018-01-12OCaml interactive mode can now run full aarch64 examples, and ocaml test cases.Alasdair Armstrong
2018-01-11Ocaml semantics can now run aarch64 hello world example using octapodAlasdair Armstrong
New testcase for bitfield syntax Updated to work with latest lem and linksem
2018-01-05Added sail_lib fileAlasdair Armstrong
2017-07-21Everything moved to new typecheckerAlasdair Armstrong
Modified initial_check.ml so it no longer requires type_internal. It's still needs cleaned up in a few ways. Most of the things it's trying to do could be done nicer if we took some time to re-factor it, and some of the things should just be handled by the main typechecker, leaving it as a think layer between the parse_ast and the ast. Now that's done everything can be switched to the new typechecker and the _new suffixes were deleted from everything except the monomorphisation pass because I don't know the status of that.
2017-02-03fix headersPeter Sewell
2015-12-14Adding new location constructor for location of generated termsKathy Gray
2014-07-29A file can now declare that a default order is either inc or dec, and this ↵Kathy Gray
will be reflected in short hand type syntax, inc is still the default if undeclared So: default order dec register bit[32] t (* Declares t as a decreasing vector, starting at 31 on the left and decreasing to 0 *) default order inc register bit[32] o (* Declares o as an increasing vector, starting at 0 on the left and increasing to 31 *) It is presently possible to change the default mid-file; this is almost certainly bad and I will turn it into an error soon.
2014-07-04Force end-of-input when parsing expression listGabriel Kerneis
2014-07-03Parse list of expressions in Sail_libGabriel Kerneis
2014-07-03Introduce a Sail libraryGabriel Kerneis
Used by the Power XML extraction tool.