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path: root/src/lem_interp
AgeCommit message (Expand)Author
2016-08-17Fix pattern match bug in interp where vector accesses were using the wrong st...Kathy Gray
2016-08-14Add missing case to replicateKathy Gray
2016-08-10Missing case in libKathy Gray
2016-08-06Add duplicate_bits to libKathy Gray
2016-07-28Banish exit from the mips/cheri sail except at end of SignalException functio...Robert Norton
2016-07-26Fix incomplete match warning in run_with*Robert Norton
2016-07-26Increase size of TLB to 64 entries. In theory this should improve FreeBSD boo...Robert Norton
2016-07-26And fix abbrev oversite in interpreterKathy Gray
2016-07-26Add minimal support for emulated Altera JTAG UART.Robert Norton
2016-07-26Add support for loading a raw binary file at given location in memory prior t...Robert Norton
2016-07-25winKathy Gray
2016-07-25one more goKathy Gray
2016-07-25Actually fix stack for returnKathy Gray
2016-07-25Fix stack for returnKathy Gray
2016-07-25Support return in interpreter pretty printer (also fix typo for default case)Kathy Gray
2016-07-23Add a return exp form to Sail, supported in type checker and in interpreter.Kathy Gray
2016-07-01Add missing case to arith_op_no0Kathy Gray
2016-06-07Fix issue in accessing fields and slices of registers during translate addressKathy Gray
2016-06-03Fix bug exposed/introduced by properly handling vector starts in the type che...Kathy Gray
2016-06-03turn off debug print statementsKathy Gray
2016-06-03Mips file: removed some unnecessary parenthesisKathy Gray
2016-06-02Fix most_significant case omissionKathy Gray
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-20Add missing CP0BadVaddr in run_with_elfs.Robert Norton
2016-05-18Implement 8-entry software-managed TLB.Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-10Initialise CP0Status BEV bit.Robert Norton
2016-05-09fix mips build by copying across run_with_elf_cheri.ml and removing cheri parts.Robert Norton
2016-05-09Reverse the list of events to respect their orderKathy Gray
2016-05-09Add more debugging information for vector concatenationKathy Gray
2016-05-06rewrite fde_loop to make it easier to understand and fix some tests. still re...Robert Norton
2016-05-05Factor out get_opcodeRobert Norton
2016-05-04Correct register field/slice reading for decreasing reads for decode/translat...Kathy Gray
2016-05-03List registers required to handle exception during instruction fetch. Attempt...Robert Norton
2016-05-03actually read next_pc twice when handling a translate_address exceptionKathy Gray
2016-05-03write all or part of fields out of translate_address (instead of just all)Kathy Gray
2016-05-03Change decode and translate_address to support writing register events (altho...Kathy Gray
2016-04-27slightly simplify set_next_instruction_address -- no need to read convert the...Robert Norton
2016-04-27expand supported patterns for most_significantKathy Gray
2016-04-27Make run_with_elf compile againKathy Gray
2016-04-27cheri: add translation and bounds checking of PC via PCC. Slightly clunky imp...Robert Norton
2016-04-26Add more cases for translate_address to support enumsKathy Gray
2016-04-26print error case on translate addressKathy Gray
2016-04-25Make interpreter able to read registers during translate address and decode.Kathy Gray
2016-04-19cheri: zero all tags when loading memory from elf so that we don't get undefi...Robert Norton
2016-04-19Make value treatment on memory write calls uniform for function call vs assig...Kathy Gray
2016-04-18More fixes to interp with regards to warnings and debugging infoKathy Gray
2016-04-13Copy run_with_elf to make run_with_elf_cheri and revert run_with_elf to mips ...Robert Norton
2016-04-13cheri supporting run with elfKathy Gray
2016-04-13Remove some warnings, in progress.Kathy Gray
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