| Age | Commit message (Collapse) | Author |
|
Attempt to get correct behaviour wrt nextpC on instruction fetch exception (prob. still wrong).
|
|
|
|
fix bug in interp_to_value_helper
|
|
(although decode isn't pushed through yet).
Note: this will break all builds
|
|
then reconvert delayedPC
|
|
|
|
|
|
implementation for now and exceptions not properly handled.
|
|
|
|
|
|
This is not yet connected to any model and not yet tested.
Also, reduce the number of parentheses needed by the parser. Namely, register declarations should no longer need parens around the types and let expressions should need fewer instances of parens around the expression (i.e. let a = exp ).
|
|
undefined unless we actually access memory which is uninitialised.
|
|
assignment expression
|
|
|
|
version. Temporary 'solution' to building mips and cheri builds until proper factorising can take place.
|
|
|
|
|
|
interp_lib, interp_inter_imp, and printing_functions.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
remove temporary hack in TranslateAddr.
|
|
missing psuedo-registers in run_with_elf.
|
|
correct state on exception. branchPending does not work because it is cleared before executing the branch delay.
|
|
|
|
Note: this support is rather mips centric at the moment
|
|
|
|
|
|
|
|
interpreter interface
|
|
instructions run
|
|
Could later add the ability to run to a particular instruction form (like we had in ppcmem2) or address
|
|
Make quiet mode for sequential interpreter not print
|
|
|
|
them sensibly at last
|
|
|
|
|
|
execution.
|
|
as increasing, and updated ranges accordingly, and mistakenly were using the wrong range values for register slicing.
|
|
distinction between prog_mem and data_mem at least for now as data_mem was not being populated correctly (wrong elf flags?).
|
|
|
|
wrangling of integer types
|
|
|