summaryrefslogtreecommitdiff
path: root/src/lem_interp/run_with_elf.ml
AgeCommit message (Expand)Author
2016-10-25load all segments into prog_mem regardless of x flag (for running cheri tests...Robert Norton
2016-10-22fixes following interface changes (type of instruction, name of barrier)Robert Norton
2016-10-11Update run_with_elf* for new linksem sail_interfaceRobert Norton
2016-10-11Update to use sail_impl_base.Robert Norton
2016-09-14Switch mips/cheri over to using memory ea/val for writes. Tag is now first by...Robert Norton
2016-07-26Fix incomplete match warning in run_with*Robert Norton
2016-07-26Increase size of TLB to 64 entries. In theory this should improve FreeBSD boo...Robert Norton
2016-07-26Add minimal support for emulated Altera JTAG UART.Robert Norton
2016-07-26Add support for loading a raw binary file at given location in memory prior t...Robert Norton
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-20Add missing CP0BadVaddr in run_with_elfs.Robert Norton
2016-05-18Implement 8-entry software-managed TLB.Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-10Initialise CP0Status BEV bit.Robert Norton
2016-05-09fix mips build by copying across run_with_elf_cheri.ml and removing cheri parts.Robert Norton
2016-05-03Change decode and translate_address to support writing register events (altho...Kathy Gray
2016-04-27slightly simplify set_next_instruction_address -- no need to read convert the...Robert Norton
2016-04-27Make run_with_elf compile againKathy Gray
2016-04-25Make interpreter able to read registers during translate address and decode.Kathy Gray
2016-04-13Copy run_with_elf to make run_with_elf_cheri and revert run_with_elf to mips ...Robert Norton
2016-04-13cheri supporting run with elfKathy Gray
2016-03-08Start task of setting up tagged memory in sequential interpreterKathy Gray
2016-02-03mips: finish implementing address translation on instruction fetch and remove...Robert Norton
2016-02-03mips: add support for LLAddr, a debug register used for ll/sc. Also add missi...Robert Norton
2016-02-02mips.sail: add an 'inBranchDelay' register so that SignalException can set co...Robert Norton
2016-02-02Print out the address of the instruction running in sequential interpreterKathy Gray
2016-02-02Get mips stuff hooked up with translate address.Kathy Gray
2016-02-02add translate_address functionalityKathy Gray
2016-01-28Support exit and assert better in sequential interpreter and general interpre...Kathy Gray
2016-01-27Add --max_instruction to sequential interpreter to permit an upper bound on i...Kathy Gray
2016-01-27Add ability to run to a particular instruction execution numberKathy Gray
2016-01-27Make mips build againKathy Gray
2016-01-27start adding breakpointKathy Gray
2016-01-26fix starting indices for mips initial register values.Robert Norton
2016-01-26Fix some bugs in writing registers with slices in the sequential interpreterKathy Gray
2016-01-26print reg dump in correct format for cheri test suite. Reinstate timing of ex...Robert Norton
2016-01-26dump registers in format expected by cheri test suite when halting. Remove di...Robert Norton
2016-01-22mips: fix PC update logic so branches might work.Robert Norton
2016-01-21mips interpreter successfully executes more than one instruction after some w...Robert Norton
2016-01-21mips: rename GPRs so that they sort lexicographically for display.Robert Norton
2016-01-20Show opcode in sequential interpreter when decode failsKathy Gray
2016-01-19hacky initial makery for mips interpreter. Builds stuff in wrong places and n...Robert Norton
2015-12-22More make file goo, and fixing a typo in run_with_elfKathy Gray
2015-12-22More gluing mips to interpreterKathy Gray
2015-11-25non-working sail/mips interpreter integration for kathy to look at and exampl...Robert Norton
2015-11-17Very nearly there sequential interpreter, just need to hook in the spec files...Kathy Gray
2015-11-12Incorporating elf into sequential interpreterKathy Gray
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-09 14:47:40 +0000