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path: root/src/lem_interp/run_with_elf.ml
AgeCommit message (Collapse)Author
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-20Add missing CP0BadVaddr in run_with_elfs.Robert Norton
2016-05-18Implement 8-entry software-managed TLB.Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-10Initialise CP0Status BEV bit.Robert Norton
2016-05-09fix mips build by copying across run_with_elf_cheri.ml and removing cheri parts.Robert Norton
2016-05-03Change decode and translate_address to support writing register events ↵Kathy Gray
(although decode isn't pushed through yet). Note: this will break all builds
2016-04-27slightly simplify set_next_instruction_address -- no need to read convert ↵Robert Norton
then reconvert delayedPC
2016-04-27Make run_with_elf compile againKathy Gray
2016-04-25Make interpreter able to read registers during translate address and decode.Kathy Gray
This is not yet connected to any model and not yet tested. Also, reduce the number of parentheses needed by the parser. Namely, register declarations should no longer need parens around the types and let expressions should need fewer instances of parens around the expression (i.e. let a = exp ).
2016-04-13Copy run_with_elf to make run_with_elf_cheri and revert run_with_elf to mips ↵Robert Norton
version. Temporary 'solution' to building mips and cheri builds until proper factorising can take place.
2016-04-13cheri supporting run with elfKathy Gray
2016-03-08Start task of setting up tagged memory in sequential interpreterKathy Gray
2016-02-03mips: finish implementing address translation on instruction fetch and ↵Robert Norton
remove temporary hack in TranslateAddr.
2016-02-03mips: add support for LLAddr, a debug register used for ll/sc. Also add ↵Robert Norton
missing psuedo-registers in run_with_elf.
2016-02-02mips.sail: add an 'inBranchDelay' register so that SignalException can set ↵Robert Norton
correct state on exception. branchPending does not work because it is cleared before executing the branch delay.
2016-02-02Print out the address of the instruction running in sequential interpreterKathy Gray
2016-02-02Get mips stuff hooked up with translate address.Kathy Gray
Note: this support is rather mips centric at the moment
2016-02-02add translate_address functionalityKathy Gray
2016-01-28Support exit and assert better in sequential interpreter and general ↵Kathy Gray
interpreter interface
2016-01-27Add --max_instruction to sequential interpreter to permit an upper bound on ↵Kathy Gray
instructions run
2016-01-27Add ability to run to a particular instruction execution numberKathy Gray
Could later add the ability to run to a particular instruction form (like we had in ppcmem2) or address
2016-01-27Make mips build againKathy Gray
Make quiet mode for sequential interpreter not print
2016-01-27start adding breakpointKathy Gray
2016-01-26fix starting indices for mips initial register values.Robert Norton
2016-01-26Fix some bugs in writing registers with slices in the sequential interpreterKathy Gray
2016-01-26print reg dump in correct format for cheri test suite. Reinstate timing of ↵Robert Norton
execution.
2016-01-26dump registers in format expected by cheri test suite when halting. Remove ↵Robert Norton
distinction between prog_mem and data_mem at least for now as data_mem was not being populated correctly (wrong elf flags?).
2016-01-22mips: fix PC update logic so branches might work.Robert Norton
2016-01-21mips interpreter successfully executes more than one instruction after some ↵Robert Norton
wrangling of integer types
2016-01-21mips: rename GPRs so that they sort lexicographically for display.Robert Norton
2016-01-20Show opcode in sequential interpreter when decode failsKathy Gray
2016-01-19hacky initial makery for mips interpreter. Builds stuff in wrong places and ↵Robert Norton
needs fixing but nearly works.
2015-12-22More make file goo, and fixing a typo in run_with_elfKathy Gray
2015-12-22More gluing mips to interpreterKathy Gray
2015-11-25non-working sail/mips interpreter integration for kathy to look at and ↵Robert Norton
example mips elf file.
2015-11-17Very nearly there sequential interpreter, just need to hook in the spec ↵Kathy Gray
files for the different isas to support
2015-11-12Incorporating elf into sequential interpreterKathy Gray
Fix an effect bug on aliased id