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AgeCommit message (Expand)Author
2018-05-09Add targets for counting lines in mips, cheri and riscv. Can use either slocc...Robert Norton
2018-05-07Add a register indicating no trigger/breakpoint support, which allows the bre...Prashanth Mundkur
2018-05-07Fix another mask computation bug.Prashanth Mundkur
2018-05-07Adjust default pte update setting to match spike's default.Prashanth Mundkur
2018-05-07Log trap value on traps.Prashanth Mundkur
2018-05-07Fix a missed csr read.Prashanth Mundkur
2018-05-04Tweak the execution log.Prashanth Mundkur
2018-05-04Fix two bugs in the page-table walker, and add some comments.Prashanth Mundkur
2018-05-04Fix printing of ld.Prashanth Mundkur
2018-05-03Fix a typo in sret decode and privilege checks in xret.Prashanth Mundkur
2018-05-03Add implementation of sfence with a fixme note.Prashanth Mundkur
2018-05-03Fix a bug in privilege transition, add better transition logging.Prashanth Mundkur
2018-05-03Implement wfi, and cleanup handling illegal operations.Prashanth Mundkur
2018-05-03Fix interrupt dispatch, improve execution logs, cleanup unused bits.Prashanth Mundkur
2018-05-03Simplify the top-level execute loop using the step function.Prashanth Mundkur
2018-05-03Fix up interrupt and exception dispatch.Prashanth Mundkur
2018-05-03Implement fetch to properly handle RVC and address translation, and add a ste...Prashanth Mundkur
2018-05-03Fix duopod with latest riscv preludeAlasdair Armstrong
2018-05-03Hook in address translation for stores and atomics.Prashanth Mundkur
2018-05-03Log csr writes in the execution log.Prashanth Mundkur
2018-05-02Hook in address translation for loads.Prashanth Mundkur
2018-05-02Finish up Sv39 address translation.Prashanth Mundkur
2018-05-02Tick cycle counter in execute loop.Prashanth Mundkur
2018-05-02Fix printing of csr immediates.Prashanth Mundkur
2018-05-02Fix typo in riscv model.Prashanth Mundkur
2018-04-26Add riscv SV39 page-table walk.Prashanth Mundkur
2018-04-26Ensure riscv interrupt delegation does not reduce current privilege.Prashanth Mundkur
2018-04-26Fix bug introduced in alignment check.Prashanth Mundkur
2018-04-26Initial support for faults of writes to physical addresses.Prashanth Mundkur
2018-04-26Initial support for faults of reads to physical addresses.Prashanth Mundkur
2018-04-23Make riscv build depend on Makefile updates.Prashanth Mundkur
2018-04-23Add riscv PTE definitions and access control checks.Prashanth Mundkur
2018-04-20Fix a typo.Prashanth Mundkur
2018-04-20Add a riscv instruction printer for the execution log.Prashanth Mundkur
2018-04-20Some cleanup and comments.Prashanth Mundkur
2018-04-20Have sign_extend in common Sail Lem library, use it and zero_extend inBrian Campbell
2018-04-18Remove obsolete comment.Prashanth Mundkur
2018-04-18Add interrupt prioritization and delegation.Prashanth Mundkur
2018-04-18Fix mideleg semantics after spec clarification from Andrew Waterman.Prashanth Mundkur
2018-04-18Use the generated num_of_E function for enum E instead of defining one by hand.Prashanth Mundkur
2018-04-18Move a few printing functions to sail_values.lemThomas Bauereiss
2018-04-17Implement sret.Prashanth Mundkur
2018-04-17Hook in the delegated trap handler and remove the old one.Prashanth Mundkur
2018-04-17Add platform initialization for the new bits of machine state.Prashanth Mundkur
2018-04-17Separate out the trap handler, and make it use the delegatee privilege.Prashanth Mundkur
2018-04-17Define exception handler delegation.Prashanth Mundkur
2018-04-16Implement the s-mode views of mie/mip, and their legalizers.Prashanth Mundkur
2018-04-16Add the satp legalizer.Prashanth Mundkur
2018-04-13Add <=_u to riscv prelude.Prashanth Mundkur
2018-04-13Add some checks of current state, and use for the xepc write legalizer.Prashanth Mundkur