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path: root/riscv/riscv_mem.sail
AgeCommit message (Expand)Author
2018-06-23Fix a missing check for interrupt dispatch when riscv clint registers are wri...Prashanth Mundkur
2018-06-08Add mem and mmio access tracing.Prashanth Mundkur
2018-06-07Slight refactor to keep platform handling localized to the _platform file.Prashanth Mundkur
2018-06-07Fix width guards on htif accesses.Prashanth Mundkur
2018-06-07Update physical memory and address translation for MMIO.Prashanth Mundkur
2018-05-21Move mem-op-result to _sys to be usable from _platform.Prashanth Mundkur
2018-04-26Fix bug introduced in alignment check.Prashanth Mundkur
2018-04-26Initial support for faults of writes to physical addresses.Prashanth Mundkur
2018-04-26Initial support for faults of reads to physical addresses.Prashanth Mundkur
2018-04-13Move riscv memory definitions into a separate file.Prashanth Mundkur