sail - Formal specification language for ISAs

Age	Commit message (Expand)	Author
2018-10-13	Adapt checked_mem_read to have acquire/release/reserve arguments so	Christopher Pulte
2018-09-06	Coq: fill in a few more RISC-V axioms	Brian Campbell
2018-09-04	C: Tweaks to RISC-V to get compiling to C	Alasdair Armstrong
2018-08-13	More RISC-V built-in type constraints	Brian Campbell
2018-08-13	Basic Coq support for RISC-V	Brian Campbell
2018-07-20	Add assorted comments, consistency fixes and cleanup.	Prashanth Mundkur
2018-07-11	RISC-V model fixes for RMEM	Jon French
2018-07-10	Support riscv atomic accesses to mmio regions, used by linux to access device...	Prashanth Mundkur
2018-07-10	RISCV load-acquire in Lem (-> rmem)	Jon French
2018-07-07	An initial fix to riscv lr/sc, needs a review.	Prashanth Mundkur
2018-07-05	restore missing RISC-V fence types in sail2; ignore io bits in fences more cl...	Jon French
2018-06-23	Fix a missing check for interrupt dispatch when riscv clint registers are wri...	Prashanth Mundkur
2018-06-08	Add mem and mmio access tracing.	Prashanth Mundkur
2018-06-07	Slight refactor to keep platform handling localized to the _platform file.	Prashanth Mundkur
2018-06-07	Fix width guards on htif accesses.	Prashanth Mundkur
2018-06-07	Update physical memory and address translation for MMIO.	Prashanth Mundkur
2018-05-21	Move mem-op-result to _sys to be usable from _platform.	Prashanth Mundkur
2018-04-26	Fix bug introduced in alignment check.	Prashanth Mundkur
2018-04-26	Initial support for faults of writes to physical addresses.	Prashanth Mundkur
2018-04-26	Initial support for faults of reads to physical addresses.	Prashanth Mundkur
2018-04-13	Move riscv memory definitions into a separate file.	Prashanth Mundkur