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AgeCommit message (Expand)Author
2016-11-08add mips_extras_embedChristopher Pulte
2016-11-08add mips thread start instruction.Robert Norton
2016-11-07factor out regfp analysis types into etc/regfp.sailChristopher Pulte
2016-11-03split out RI node so that ppcmem model does not implement reserved instructio...Robert Norton
2016-10-27add hgen for J branchesRobert Norton
2016-10-22fixes following interface changes (type of instruction, name of barrier)Robert Norton
2016-10-20changes to support get_model for ppcmem.Robert Norton
2016-10-17don't forget link register in register bcmp footprintRobert Norton
2016-10-17add register footprint for bcmpzRobert Norton
2016-10-06move type definitions that both interpreter and shallow embedding use to sail...Christopher Pulte
2016-09-23Add register footprint function needed by ppcmem (mips only for now)Robert Norton
2016-09-14Switch mips/cheri over to using memory ea/val for writes. Tag is now first by...Robert Norton
2016-07-28Banish exit from the mips/cheri sail except at end of SignalException functio...Robert Norton
2016-07-26Increase size of TLB to 64 entries. In theory this should improve FreeBSD boo...Robert Norton
2016-07-26Add support for BERI specific behaviour which permits some unaligned accesses...Robert Norton
2016-07-26Add minimal support for emulated Altera JTAG UART.Robert Norton
2016-07-25Fix incorrect register number for CP0Cause in mtc0. The only test which write...Robert Norton
2016-07-13fixChristopher
2016-06-28Munge exception destination PC so we hit the correct address even when kcc.ba...Robert Norton
2016-06-27Don't blow up when test suite writes to K0 field of Config0 register.Robert Norton
2016-06-07remove workarounds for sail unable to read fields during PC fetch. Should be ...Robert Norton
2016-06-07Fix issue in accessing fields and slices of registers during translate addressKathy Gray
2016-06-06Add explicit type cast required because of the way sail does slicing (we want...Robert Norton
2016-06-06revert accidental functional change introduced when formatting -- simulator h...Robert Norton
2016-06-03Improve formatting of latex export of mips spec: wrap lines, remove dollars i...Robert Norton
2016-06-03Merge branch 'master' of bitbucket.org:Peter_Sewell/l2Peter Sewell
2016-06-03plumbing to make a pdf version of MIPS Sail spec, using LaTeX lstlistingsPeter Sewell
2016-06-03Mips file: removed some unnecessary parenthesisKathy Gray
2016-06-03Reduce fill width of header to align closing comments nicely.Robert Norton
2016-06-02Get widening right now that it mattersKathy Gray
2016-06-02Apply headache to mips/cheri model.Robert Norton
2016-06-01Tweak wording of mips README.Robert Norton
2016-05-31delete obsolete Makefile (src/Makefile currently hanldes mips build).Robert Norton
2016-05-31Add README in mips directory describing file breakdown and remove reference t...Robert Norton
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-24restrict virtual and physical address sizes to 40 and 36 bits respectively --...Robert Norton
2016-05-19workaround unable to read fields in PC translation bug.Robert Norton
2016-05-19correctly report TLB size and type in config reg.Robert Norton
2016-05-18Make TLB address error exception save BadVAddr.Robert Norton
2016-05-18Implement 8-entry software-managed TLB.Robert Norton
2016-05-13implement config registers.Robert Norton
2016-05-13do something a bit more interesting with WAIT.Robert Norton
2016-05-13fixes to make counter interrupt work: don't attempt to read register fields d...Robert Norton
2016-05-13don't write 33-bit value to hwrena (suprised that this type checked).Robert Norton
2016-05-12allow writing hwrena 29 (UserLocal)Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-12update/add some commentsRobert Norton
2016-05-12remove redundant wrapper function 'TranslateOrExit' and rename uses.Robert Norton
2016-05-12Enforce kernel only access to kernel address space. Doesn't really make any d...Robert Norton
2016-05-10Clear LLbit on ERET regardless of ERL value.Robert Norton
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