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2017-01-24first pass at cheri128 sail.Robert Norton
2016-12-09sail changes for making lem embedding Isabelle-friendlierChristopher Pulte
2016-12-08add target for building cheri_notlb.lemRobert Norton
2016-11-30shallow embedding fix, rename 'copy' to 'reset_vector_start', don't print ↵Christopher Pulte
shallow/deep ast conversion type class instances anymore, add herdtools ast / shallow ast conversion functions, add mips ImplementationDefinedStopFetching instruction
2016-11-30add new barrier kind for MIPS (only one for now).Robert Norton
2016-11-28make sail produce prompt and state version of shallow embedding files at the ↵Christopher Pulte
same time with the types both have in common factored out into separate file, rename one mips shallow embedding _extras file as required by this
2016-11-24attempt to preserve signs of immediate where appropriate when translating to ↵Robert Norton
sail->ppcmem (no need to worry about reverse direction).
2016-11-23be consistent about using lower case when parsing/pretty printing MIPS assembly.Robert Norton
2016-11-23add support for symbolic registers in litmus tests.Robert Norton
2016-11-22add mips_extras_sequential_embed.lemChristopher Pulte
2016-11-11mips_regfp: add missing output register for store conditional.Robert Norton
2016-11-09add CP0LLBit and CP0LLAddr to mips register footprintRobert Norton
2016-11-08add mips_extras_embedChristopher Pulte
2016-11-08add mips thread start instruction.Robert Norton
2016-11-07factor out regfp analysis types into etc/regfp.sailChristopher Pulte
2016-11-03split out RI node so that ppcmem model does not implement reserved ↵Robert Norton
instruction exception behaviour but sequential model does (for test suite).
2016-10-27add hgen for J branchesRobert Norton
2016-10-22fixes following interface changes (type of instruction, name of barrier)Robert Norton
2016-10-20changes to support get_model for ppcmem.Robert Norton
2016-10-17don't forget link register in register bcmp footprintRobert Norton
2016-10-17add register footprint for bcmpzRobert Norton
2016-10-06move type definitions that both interpreter and shallow embedding use to ↵Christopher Pulte
sail_impl_base, add sail_impl_base.outcome, add interp_inter_imp auxiliary functions, make prompt use sail_impl_base.outcome
2016-09-23Add register footprint function needed by ppcmem (mips only for now)Robert Norton
2016-09-14Switch mips/cheri over to using memory ea/val for writes. Tag is now first ↵Robert Norton
byte of value for capability writes. Still need TAGw for now but should kill eventually.
2016-07-28Banish exit from the mips/cheri sail except at end of SignalException ↵Robert Norton
function. There is a plan to replace this syntax with something more understandable. Should make no functional difference using sequential interpretor but will need to do some work on exception functions when integrating with ppcmem so that it know register writes are exceptional etc.
2016-07-26Increase size of TLB to 64 entries. In theory this should improve FreeBSD ↵Robert Norton
boot time by reducing TLB misses but an apparent reduction in IPS counteracts this. Makes use of foreach and return to implement tlbSearch.
2016-07-26Add support for BERI specific behaviour which permits some unaligned ↵Robert Norton
accesses, for compatibility with clang.
2016-07-26Add minimal support for emulated Altera JTAG UART.Robert Norton
2016-07-25Fix incorrect register number for CP0Cause in mtc0. The only test which ↵Robert Norton
writes this register also needs software irq, which isn't implemented, so effectively this was untested although it happens quite early in kernel boot.
2016-07-13fixChristopher
2016-06-28Munge exception destination PC so we hit the correct address even when ↵Robert Norton
kcc.base is non-zero.
2016-06-27Don't blow up when test suite writes to K0 field of Config0 register.Robert Norton
2016-06-07remove workarounds for sail unable to read fields during PC fetch. Should be ↵Robert Norton
no functional change.
2016-06-07Fix issue in accessing fields and slices of registers during translate addressKathy Gray
2016-06-06Add explicit type cast required because of the way sail does slicing (we ↵Robert Norton
want indexing of pfn to be reset to 23..0). Kathy to investigate why this was not caught by type checker.
2016-06-06revert accidental functional change introduced when formatting -- simulator ↵Robert Norton
halt instructions decode statements are a special case of mtc0 so clauses must appear first.
2016-06-03Improve formatting of latex export of mips spec: wrap lines, remove dollars ↵Robert Norton
in comments. No functional change.
2016-06-03Merge branch 'master' of bitbucket.org:Peter_Sewell/l2Peter Sewell
2016-06-03plumbing to make a pdf version of MIPS Sail spec, using LaTeX lstlistingsPeter Sewell
2016-06-03Mips file: removed some unnecessary parenthesisKathy Gray
Interp: trying to add some debugging to isolate bug
2016-06-03Reduce fill width of header to align closing comments nicely.Robert Norton
2016-06-02Get widening right now that it mattersKathy Gray
2016-06-02Apply headache to mips/cheri model.Robert Norton
2016-06-01Tweak wording of mips README.Robert Norton
2016-05-31delete obsolete Makefile (src/Makefile currently hanldes mips build).Robert Norton
2016-05-31Add README in mips directory describing file breakdown and remove reference ↵Robert Norton
to non-existent mips.sail in top level README.
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-24restrict virtual and physical address sizes to 40 and 36 bits respectively ↵Robert Norton
-- this could be varied but useful for compatibility with BERI test suite.
2016-05-19workaround unable to read fields in PC translation bug.Robert Norton
2016-05-19correctly report TLB size and type in config reg.Robert Norton
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