| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-11-30 | match what rmem (ppcmem2) expects from ISA Makefiles | Shaked Flur | |
| 2017-07-26 | mips_extras.lem: fix references to Interp.V_foo | Jon French | |
| 2017-05-24 | Change types of MEMr_tag, MEMval_tag and co. so that tag is separate from ↵ | Robert Norton | |
| data and invent rmemt and wmvt effects for them. Extend the interpreter context to include lists of tagged memory read and write functions. The memory model must round down the address to the nearest capability aligned address when reading/writing tags. Remove TAGw which is no longer needed as a result. | |||
| 2017-03-23 | the interpreter/shallow expects little-endian memory-values | Shaked Flur | |
| 2016-11-30 | add new barrier kind for MIPS (only one for now). | Robert Norton | |
| 2016-10-22 | fixes following interface changes (type of instruction, name of barrier) | Robert Norton | |
| 2016-10-06 | move type definitions that both interpreter and shallow embedding use to ↵ | Christopher Pulte | |
| sail_impl_base, add sail_impl_base.outcome, add interp_inter_imp auxiliary functions, make prompt use sail_impl_base.outcome | |||
| 2016-09-14 | Switch mips/cheri over to using memory ea/val for writes. Tag is now first ↵ | Robert Norton | |
| byte of value for capability writes. Still need TAGw for now but should kill eventually. | |||
| 2016-04-13 | add tagr and tagw in mips_extras (will need to change these to make tag ↵ | Robert Norton | |
| writes atomic) | |||
| 2016-02-03 | mips_extras.lem: fix typo in spelling of MEM_sync. | Robert Norton | |
| 2015-12-17 | First bit of gluing mips onto interpreter and eventually ppcmem infrastructure | Kathy Gray | |
