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For example, the MIPS model can boot FreeBSD as
./mips_c --binary=0x100000,/path/to/kernel --image=/path/to/simboot.sailbin
Or with short options as
./mips_c -b 0x100000,/path/to/kernel -i /path/to/simboot.sailbin
The current options are:
-e, --elf, which loads an elf file directly
-n, --entry, which sets the entry point
-i, --image, which loads an image file compiled by "sail -elf" using Linksem
-b, --binary, which loads a plain binary image into memory at a specific address
-l, --cyclelimit, which means the (new) cycle_count() builtin exits the model after a certain number of calls
Also there are the default -? --help and --usage options.
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This plus changes to bitfield internals is enough to run some MIPS tests at 1Mhz.
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Previously the ANF->IR translation cared too much about how things
were allocated in C, so it had to constantly check whether things
needed to be allocated on the stack or heap, and generate different
cequences of IR instructions depending on either. This change removes
the ialloc IR instruction, and changes iinit and idecl so that the
code generator now generates different C for the same IR instructions
based on the variable types involved.
The next change in this vein would be to merge icopy and iconvert at
the IR level so that conversions between uint64_t and large-bitvectors
are inserted by the code generator. This would be good because it
would make the ANF->IR translation more robust to changes in the types
of variables caused by flow-typing, and optimization passes could
convert large bitvectors to uint64_t as local changes.
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(necessary for backends where they're different)
Coq uint/sint and related fixes
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Fix a bug involving indentifers on the left hand side of assignment
statements not being shadowed correctly within foreach loops.
Make the different between different types of integer division
explicit in at least the C compilation for now. fdiv_int is division
rounding towards -infinity (floor). while tdiv_int is truncating
towards zero. Same for fmod_int and tmod_int.
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(The last bit is to declare type aliases as Type so that Coq uses the
type scope for notation, so * is prod, not multiplication).
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Plus
- Complete solver support for inequalities
- Reduce exponentials in solver
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(involved some manual tinkering with gitignore, type_check, riscv)
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Plus test case, broken builtin name
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- add existential unpacking for function arguments
- add mechanism for using properties for existentially typed top-level
values (useful for the typechecking tests)
- support for length_list and In in Coq constraint solving
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Only single variable in places, only packed at literals and variables,
no unpacking
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functions in mips spec in prepartion for using this file in mips prelude. Also modify tests that use this header. We should consider prefixing library builtins to avoid name clashes. overload can then be used to provide aliases if desired.
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should be kept in normal form i.e. a positive mpz_t with no bits higher than len set.
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Also fixes to C backend for compiling MIPS spec to C
- Fix an issue with const correctness in internal_vector_update
functions generated by C backend
- Add builtins for MIPS to sail.h
- Fix an issue where reg_deref didn't work when called on pointers to
large bitvectors, i.e. vectors containing references to large
bitfields as in the MIPS TLB code
- Various bug fixes and changes for running U-boot on ARM model,
including for interpreter and OCaml compilation.
- Fix memory leak issues and incorrect shadowing for foreach loops
- Update C header file. Fixes memory leak in memory read/write
builtins.
- Add aux constructor to ANF representation to hold environment
information.
- Fix undefined behavior caused by optimisation left shifting uint64_t
vectors 64 or more times. Unfortunately there's more issues because
the same happens for X >> 64 right shifts. It would make sense for
this to be zero, because that would guarantee the property that ((X
>> n) >> m) == (X >> (n + m)) but we probably need to do (X >> (n -
1) >> 1) in the optimisation to ensure that we don't cause
UB. Shifting by 63 and then by 1 is well-defined, but shifting by 64
in one go isn't according to the C standard. This issue with
right-shifts only occurs for zero-length vectors, so it's not a huge
deal, but it's still annoying.
- Add versions of print_bits and print_int that print to
stderr. Follows OCaml convention of print/prerr. Should make things
more explicit. Different backends had different ideas about where
print should output to, not every backend needs to have this
(e.g. theorem prover backends don't need to print) but having both
stderr and stdout seperate and clear is useful for executable models
(UART needs to be stdout, debug messages should be stderr).
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vector_access is a bit hacky at the moment - it expects a constraint to
be shown between the index and the list size, but we don't track list
sizes in general
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dtb to be mapped.
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