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AgeCommit message (Expand)Author
2016-09-14Switch mips/cheri over to using memory ea/val for writes. Tag is now first by...Robert Norton
2016-09-14Use cap_size to check for address alignment in csc/clc instead of hardcoded 3...Robert Norton
2016-08-01Remove raise_c2_exception_v function which is not needed after permissions me...Robert Norton
2016-08-01Complete transition to merged perms. We need to take care to keep around the ...Robert Norton
2016-07-28Banish exit from the mips/cheri sail except at end of SignalException functio...Robert Norton
2016-07-28Complete another if statement with an empty else.Robert Norton
2016-07-28Use recently introduced 'not' function instead of ~ for boolean negation. Mor...Robert Norton
2016-07-27Fix misspelt marker comment.Robert Norton
2016-07-27Add final 'else' to CCheckPerms because Peter pointed out that it is better t...Robert Norton
2016-07-27CCall comment out of extracted psuedocode region.Robert Norton
2016-07-27Normalise whitespace in cheri_insts.sail for cleaner extraction of instructio...Robert Norton
2016-07-26Add minimal support for emulated Altera JTAG UART.Robert Norton
2016-07-26Add Makefile and marker comments in cheri sail file for extracting individual...Robert Norton
2016-06-28Munge exception destination PC so we hit the correct address even when kcc.ba...Robert Norton
2016-06-10Make in-memory format of capabilities conform with that of CHERI which stores...Robert Norton
2016-06-07remove workarounds for sail unable to read fields during PC fetch. Should be ...Robert Norton
2016-06-07Merge register access violation exception codes. ISA is evolving and is a lit...Robert Norton
2016-06-07Preserve padding in capability registers when converting to struct form -- th...Robert Norton
2016-06-07cheri: implement the csub instruciton (new instruction)Robert Norton
2016-06-03Reduce fill width of header to align closing comments nicely.Robert Norton
2016-06-02Apply headache to mips/cheri model.Robert Norton
2016-06-01Remove outdated XXXRobert Norton
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-16Implement the simulator dump cap registers instruction as a NOP since we dump...Robert Norton
2016-05-13implement config registers.Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-12rename ephemeral/non_ephemeral to global/local in accordance with current usage.Robert Norton
2016-05-12remove redundant wrapper function 'TranslateOrExit' and rename uses.Robert Norton
2016-05-11Fix XXX missing register accessible check in ClearRegs, also only do CP2Usabl...Robert Norton
2016-05-04fix incorrect exception code used on clc alignment check.Robert Norton
2016-05-04check for PC alignment on instruction fetch.Robert Norton
2016-05-03cheri: check value of co-processor enable bit before all cheri instructions.Robert Norton
2016-05-03fix cheri and mips sail following change to type of TranslateAddress -- can n...Robert Norton
2016-05-03immediate offset of load/store via capability is scaled by word size (ISA cha...Robert Norton
2016-04-29implement cgetpccsetoffset (new instruction)Robert Norton
2016-04-29new encoding for cgetpcc (ISA change).Robert Norton
2016-04-29implement 'big immediates' for CSC and CLC (ISA change).Robert Norton
2016-04-29use the correct exception vector for ccall/creturn.Robert Norton
2016-04-28implement (hopefully) correct exception behaviour wrt PCC/EPCC. Required shuf...Robert Norton
2016-04-27cheri: add translation and bounds checking of PC via PCC. Slightly clunky imp...Robert Norton
2016-04-22Add address calculation wrapper to constrain and translate standard mips load...Robert Norton
2016-04-21Introduce wrapper function around MEMw* so that we can clear tags on non-capa...Robert Norton
2016-04-19cheri: be sure to use unsigned comparison in CUnsealRobert Norton
2016-04-19use unsigned for register offset and signed for immediate offset when computi...Robert Norton
2016-04-18cheri: use signed() rather than casting to int as advised by kathy. This has ...Robert Norton
2016-04-18cheri: explicitly specify vector for comparison in cincoffset to work around ...Robert Norton
2016-04-18cheri: swap use of MEMr_tagged and MEMr_tagged_reserved in CLC which were swa...Robert Norton
2016-04-18cheri: fix encoding of CSCC which was short one bit (kathy investigating why ...Robert Norton
2016-04-18cheri: add support for ll/sc of data via capability instructions.Robert Norton
2016-04-18cheri: fix inverted tag check for cptrcmp.Robert Norton
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