sail - Formal specification language for ISAs

Age	Commit message (Expand)	Author
2016-05-04	check for PC alignment on instruction fetch.	Robert Norton
2016-05-03	cheri: check value of co-processor enable bit before all cheri instructions.	Robert Norton
2016-05-03	fix cheri and mips sail following change to type of TranslateAddress -- can n...	Robert Norton
2016-04-29	use the correct exception vector for ccall/creturn.	Robert Norton
2016-04-28	implement (hopefully) correct exception behaviour wrt PCC/EPCC. Required shuf...	Robert Norton
2016-04-27	cheri: add translation and bounds checking of PC via PCC. Slightly clunky imp...	Robert Norton
2016-04-22	Add address calculation wrapper to constrain and translate standard mips load...	Robert Norton
2016-04-21	Introduce wrapper function around MEMw* so that we can clear tags on non-capa...	Robert Norton
2016-04-15	cheri: explicitly zero extend regno when writing to cap cause because implici...	Robert Norton
2016-04-14	cheri: implement ll/sc of capabilities using placeholder functions to emulate...	Robert Norton
2016-04-13	Further CHERI implementation. Rename cursor to offset in line with ISA. Imple...	Robert Norton
2016-03-09	cheri sail: introduce functions for casting from cap. register to cap. struct...	Robert Norton
2016-03-08	add beginnings of cheri sail for kathy to do some debugging.	Robert Norton