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AgeCommit message (Expand)Author
2018-07-11Fix off-by-one bugs in monomorphisation rewrites involving bitvector subrangesThomas Bauereiss
2018-07-11Fix some signedness bugsThomas Bauereiss
2018-07-11Update CHERI code extraction from IsabelleThomas Bauereiss
2018-07-10HOL4 snapshot updateBrian Campbell
2018-07-10Coq MIPS snapshotBrian Campbell
2018-07-10Start adding c-backend bits for riscv.Prashanth Mundkur
2018-07-10Support riscv atomic accesses to mmio regions, used by linux to access device...Prashanth Mundkur
2018-07-10remove sim.dts when anonymising.Robert Norton
2018-07-10Make HOL build properly again for all of the modelsBrian Campbell
2018-07-10RISCV load-acquire in Lem (-> rmem)Jon French
2018-07-10fix constructor typoJon French
2018-07-10Only put static qualifier on valspecs when -static flag is usedAlasdair Armstrong
2018-07-10correct pretty-printing using mappingsJon French
2018-07-10disable printing when compiling to Lem to keep rmem happyJon French
2018-07-10Merge branch 'sail2' of github.com:rems-project/sail into sail2Robert Norton
2018-07-10remove obsolete files from language directory.Robert Norton
2018-07-10Update HOL setupBrian Campbell
2018-07-10Another AArch64 patchThomas Bauereiss
2018-07-10Add more Isabelle lemmas to libraryThomas Bauereiss
2018-07-10Tweak to anonymous copyright header.Robert Norton
2018-07-10further anonymisation work.Robert Norton
2018-07-10Aarch64 mono script updateBrian Campbell
2018-07-09Initialize fresh memory to 0 in the OCaml backend.Prashanth Mundkur
2018-07-09Log some timing info at the end of riscv execution.Prashanth Mundkur
2018-07-09Lem: prefer type variables to constants when looking for equivalent nexpsBrian Campbell
2018-07-09Add no_devices.sail to be compatible with latest AArch64 prelude andAlasdair Armstrong
2018-07-09anonymise another github link.Robert Norton
2018-07-09anonymise github link in sail manual.Robert Norton
2018-07-09Remove awkward constraints on GetSlice_int for nowBrian Campbell
2018-07-09Changes for anonymisation. Ensure headers are in correct format. Remove some ...Robert Norton
2018-07-09Tweak bit casting definitions in MIPS to avoid non-exhaustive patternsBrian Campbell
2018-07-09Coq: remove some unnecessary castsBrian Campbell
2018-07-09Support building an anonymised version of manual. Fix sail example in manual....Robert Norton
2018-07-09Update gitignoreThomas Bauereiss
2018-07-09Fix bug in rewriting of try-catch-blocks with variable updatesThomas Bauereiss
2018-07-09Tweak rewriting of literal patterns for LemThomas Bauereiss
2018-07-09Add explanatory comment to guard rewritingThomas Bauereiss
2018-07-09Update CHERI code generation from IsabelleThomas Bauereiss
2018-07-09Add some syntactic sugar for IsabelleThomas Bauereiss
2018-07-09Patch some potential uses of uninitialised variables in AArch64Thomas Bauereiss
2018-07-09Simplify treating of undefined_bool in Lem libraryThomas Bauereiss
2018-07-09add riscv_analysis.sail to SAIL_SRCSJon French
2018-07-09add LOADRES, STORECON, AMO to analysisJon French
2018-07-09Bits for bits of aarch64 in coqBrian Campbell
2018-07-09Support writes to misa.C in riscv.Prashanth Mundkur
2018-07-08Make the riscv fetch-execute loop return instead of exiting when done.Prashanth Mundkur
2018-07-08Move the riscv analysis function into its own file for coverage purposes.Prashanth Mundkur
2018-07-08Add a riscv coverage target using bisect-ppx.Prashanth Mundkur
2018-07-08Add -static flag that controls whether generated C functions are staticAlasdair
2018-07-07Add reservation traces to riscv tracecmp tool.Prashanth Mundkur
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