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AgeCommit message (Expand)Author
2016-06-06Add explicit type cast required because of the way sail does slicing (we want...Robert Norton
2016-06-06add test for failing tlb translation using current sail.Robert Norton
2016-06-06revert accidental functional change introduced when formatting -- simulator h...Robert Norton
2016-06-03Fix bug exposed/introduced by properly handling vector starts in the type che...Kathy Gray
2016-06-03Change path inside sail Makefile to look for sail directory instead of l2Kathy Gray
2016-06-03Improve formatting of latex export of mips spec: wrap lines, remove dollars i...Robert Norton
2016-06-03update README re l2->sailPeter Sewell
2016-06-03Merge branch 'master' of bitbucket.org:Peter_Sewell/l2Peter Sewell
2016-06-03plumbing to make a pdf version of MIPS Sail spec, using LaTeX lstlistingsPeter Sewell
2016-06-03turn off debug print statementsKathy Gray
2016-06-03Mips file: removed some unnecessary parenthesisKathy Gray
2016-06-03Add test demonstrating recently introduced regression where tlb match fail.Robert Norton
2016-06-03added ARMv8Shaked Flur
2016-06-03Reduce fill width of header to align closing comments nicely.Robert Norton
2016-06-02Fix most_significant case omissionKathy Gray
2016-06-02Get widening right now that it mattersKathy Gray
2016-06-02improve constraint range checkingKathy Gray
2016-06-02Apply headache to mips/cheri model.Robert Norton
2016-06-02Add rule in Makefile that uses headache to add copyright header to mips/cheri...Robert Norton
2016-06-01Tweak wording of mips README.Robert Norton
2016-06-01Remove outdated XXXRobert Norton
2016-05-31delete obsolete Makefile (src/Makefile currently hanldes mips build).Robert Norton
2016-05-31Add README in mips directory describing file breakdown and remove reference t...Robert Norton
2016-05-27Fix parsing of sizeof and some printing issues with letKathy Gray
2016-05-27small change to comment printingKathy Gray
2016-05-27Also add to ottKathy Gray
2016-05-27Add sizeof to sail. Documentation to followKathy Gray
2016-05-26add makery for mips/cheir LOC count.Robert Norton
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-24restrict virtual and physical address sizes to 40 and 36 bits respectively --...Robert Norton
2016-05-20Add missing CP0BadVaddr in run_with_elfs.Robert Norton
2016-05-19workaround unable to read fields in PC translation bug.Robert Norton
2016-05-19correctly report TLB size and type in config reg.Robert Norton
2016-05-18Make TLB address error exception save BadVAddr.Robert Norton
2016-05-18Implement 8-entry software-managed TLB.Robert Norton
2016-05-16Implement the simulator dump cap registers instruction as a NOP since we dump...Robert Norton
2016-05-13implement config registers.Robert Norton
2016-05-13do something a bit more interesting with WAIT.Robert Norton
2016-05-13fixes to make counter interrupt work: don't attempt to read register fields d...Robert Norton
2016-05-13don't write 33-bit value to hwrena (suprised that this type checked).Robert Norton
2016-05-12allow writing hwrena 29 (UserLocal)Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-12rename ephemeral/non_ephemeral to global/local in accordance with current usage.Robert Norton
2016-05-12update/add some commentsRobert Norton
2016-05-12remove redundant wrapper function 'TranslateOrExit' and rename uses.Robert Norton
2016-05-12Enforce kernel only access to kernel address space. Doesn't really make any d...Robert Norton
2016-05-11Fix XXX missing register accessible check in ClearRegs, also only do CP2Usabl...Robert Norton
2016-05-10Initialise CP0Status BEV bit.Robert Norton
2016-05-10Clear LLbit on ERET regardless of ERL value.Robert Norton
2016-05-10Implement mfc0/mtc0 ErrorEPC.Robert Norton
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