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2016-02-02mips.sail: TranslateAddress hack maps all xkphys addresses to 0x9... regionRobert Norton
2016-02-02Print out the address of the instruction running in sequential interpreterKathy Gray
2016-02-02Get mips stuff hooked up with translate address.Kathy Gray
Note: this support is rather mips centric at the moment
2016-02-02add translate_address functionalityKathy Gray
2016-02-01mips.sail: fix mfc0 of config register.Robert Norton
2016-02-01mips.sail: fix decode of trap instructions.Robert Norton
2016-02-01mips.sail: workaround oddness in comparison in MOVN and MOVZ. sail bug?Robert Norton
2016-02-01mips.sail: add support for BadVaddr CP0 register.Robert Norton
2016-02-01mips.sail: fix decoding of BEQL instruction.Robert Norton
2016-02-01mips.sail: fix compilation error in mfc0 causeRobert Norton
2016-01-29mips.sail: further filling out CP0 behaviour getting exceptions to sort of ↵Robert Norton
work (NB hack in TranslateAddress until interpreter translates instuction fetches)
2016-01-29fix typo in kathy's last commit.Robert Norton
2016-01-29Put correct tags on to_vec callsKathy Gray
2016-01-29mips.sail: it turns out that all sail comparisons are signed contrary to ↵Robert Norton
manual so emulate unsigned comparisons by prepending a zero bit, as in mips spec.
2016-01-28Add test for sltu. Fixed decode function which was returning wrong ast node ↵Robert Norton
but test still does not pass, apparently because sail is doing signed comparison for <
2016-01-28add test exposing problem with ddiv.Robert Norton
2016-01-28mips.sail: start to fill out TranslateAddress. Change type so that it can be ↵Robert Norton
used by ml to translate fetch address.
2016-01-28mips.sail: fix infamous lwr and ldr (now pass tests).Robert Norton
2016-01-28mips.sail: fix back-to-front operands of DSLLV.Robert Norton
2016-01-28mips.sail: fix incorrect decode of DSLLVRobert Norton
2016-01-28mips.sail: split store cases by word width as sail needs to know which bit ↵Robert Norton
of word to store (probably a bug that it does not complain at runtime).
2016-01-28Support exit and assert better in sequential interpreter and general ↵Kathy Gray
interpreter interface
2016-01-27Add --max_instruction to sequential interpreter to permit an upper bound on ↵Kathy Gray
instructions run
2016-01-27Add ability to run to a particular instruction execution numberKathy Gray
Could later add the ability to run to a particular instruction form (like we had in ppcmem2) or address
2016-01-27mips.sail: branches are relative to delay slot PC, not branch! Support ↵Robert Norton
config registers in mfc0.
2016-01-27mips.sail: produce undefined result for division by zero instead of crashing.Robert Norton
2016-01-27actually commit the new mips fileKathy Gray
2016-01-27Make mips build againKathy Gray
Make quiet mode for sequential interpreter not print
2016-01-27Fix issue where constraint solver wasn't rewriting enough equality ↵Kathy Gray
constraints and thus causing inequality checks to be missed
2016-01-27start adding breakpointKathy Gray
2016-01-27mips.sail: further support for CP0 registers needed to run tests.Robert Norton
2016-01-26Stop turning all decreasing vectors into indexed ones : i.e. let's print ↵Kathy Gray
them sensibly at last
2016-01-26mips.sail: beginning of mfc0 implementation.Robert Norton
2016-01-26mips.sail: fix bugs in DSRL32 and DSRLVRobert Norton
2016-01-26fix starting indices for mips initial register values.Robert Norton
2016-01-26mips.sail: work around sail bug in equality comparing bit vector to integerRobert Norton
2016-01-26Fix some bugs in writing registers with slices in the sequential interpreterKathy Gray
2016-01-26mips.sail: 32-bit load linked should sign extend result.Robert Norton
2016-01-26mips: fix encoding of DSRAV.Robert Norton
2016-01-26tweak to dependencies to hopefully reduce need to rebuild mips.sail.Robert Norton
2016-01-26Add example of test which dies whilst trying to throw exception.Robert Norton
2016-01-26print reg dump in correct format for cheri test suite. Reinstate timing of ↵Robert Norton
execution.
2016-01-26Fix problem in run_with_model where we forgot that ppcmem2 treats everything ↵Kathy Gray
as increasing, and updated ranges accordingly, and mistakenly were using the wrong range values for register slicing.
2016-01-26move closer to power.sail -> power.ml outputKathy Gray
2016-01-26add example of mips test which fails with first instruction (jal)Robert Norton
2016-01-26dump registers in format expected by cheri test suite when halting. Remove ↵Robert Norton
distinction between prog_mem and data_mem at least for now as data_mem was not being populated correctly (wrong elf flags?).
2016-01-25mips.sail: modify overflow check to do exactly what is described in the ↵Robert Norton
spec. as the overflow flag provided by +_s builtin doesn't seem to do what we want.
2016-01-22mips: revert accidental removal of overflow check from daddi. It is broken ↵Robert Norton
but this is not the fix...
2016-01-22mips: fix PC update logic so branches might work.Robert Norton
2016-01-22add some test elf files for mips (pinched from cheri test suite).Robert Norton