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AgeCommit message (Expand)Author
2018-12-11Fix all tests with type checking changesAlasdair Armstrong
2018-12-11Fix most remaining tests on branchAlasdair
2018-12-10Various changes:Alasdair Armstrong
2018-12-08Compiling againAlasdair
2018-12-07Working on better flow typing for ASLAlasdair Armstrong
2018-12-06Desugar constraints from atyp rather than n_constraintAlasdair Armstrong
2018-12-06Re-factor initial checkAlasdair Armstrong
2018-12-04Remove FES_Fexps constructorAlasdair Armstrong
2018-12-04Simplify kinds in the ASTAlasdair Armstrong
2018-12-03Fix = / == in a couple of monomorphisation testsBrian Campbell
2018-11-30Remove constraint synonymsAlasdair Armstrong
2018-11-30Parser tweaks and fixesAlasdair Armstrong
2018-11-30RISC-V: update the riscv/readme to point to the new repository.Prashanth Mundkur
2018-11-30Improvements for ASL parserAlasdair Armstrong
2018-11-29RISC-V: more tidying up of the Spike interface.Prashanth Mundkur
2018-11-29RISC-V: implement WFI in the platform model.Prashanth Mundkur
2018-11-29RISC-V: factor the execution trace.Prashanth Mundkur
2018-11-29RISC-V: no ldu for rv64iBrian Campbell
2018-11-29RISC-V: properly set mstatus.FS in absence of floating-point support.Prashanth Mundkur
2018-11-29RISC-V: minor cleanup of the spike interface.Prashanth Mundkur
2018-11-29Update install instructions.Prashanth Mundkur
2018-11-29RISC-V: add some missing constraints on compressed instruction encodingsBrian Campbell
2018-11-29RISC-V: add checks for misaligned targets to jumps and branchesBrian Campbell
2018-11-29Merge branch 'rvfi-dii' into sail2Brian Campbell
2018-11-28Allow folding constant expressions into single register readsAlasdair
2018-11-27Fix memory leak in string_of_bitsAlasdair Armstrong
2018-11-27Add an optimisation pass to combine variables if possibleAlasdair Armstrong
2018-11-26Use a temporary definition of List.init until 4.06 is more standard.Prashanth Mundkur
2018-11-26Add random generators for record typesBrian Campbell
2018-11-23Introduce intermediate bitvector representation in CAlasdair Armstrong
2018-11-23C backend improvementsAlasdair Armstrong
2018-11-21RISC-V: allow platform ram size to be configurable.Prashanth Mundkur
2018-11-21Coq: only generate equality functions for records where we need itBrian Campbell
2018-11-21Coq: min_natBrian Campbell
2018-11-21Coq: add equality for records and polymorphic vectorsBrian Campbell
2018-11-21Escape string literals in coq backend. Note that 71020c2f460e6031776df17cf8f2...Robert Norton
2018-11-21Escape strings literals in lem pretty printer.Robert Norton
2018-11-20Add a test case for a struct with a constrained type variableAlasdair Armstrong
2018-11-20Add messages for assert failures without user defined messagesAlasdair Armstrong
2018-11-20Minor coq updatesBrian Campbell
2018-11-20Add full constraints for vector updatesBrian Campbell
2018-11-19Fix Lem untupling to correctly identify when multiple arguments are usedBrian Campbell
2018-11-19Don't re-check AST repeatedly in exp_lift_assign re-writeAlasdair Armstrong
2018-11-19prep for opam release with new latex.Robert Norton
2018-11-19Commit the Sail file for config register test not the outputAlasdair Armstrong
2018-11-19Ensure sizeof re-writing occurs for configuration registersAlasdair Armstrong
2018-11-19Merge branch 'latex' into sail2Robert Norton
2018-11-19Add missing constraints on bitvector_access, with regression test.Fixes #24.Robert Norton
2018-11-19A few more constraint lemmas for aarch64Brian Campbell
2018-11-16Canonicalise functions types in val specsAlasdair Armstrong
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