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AgeCommit message (Expand)Author
2018-11-12Add RVFI DII version of the RISC-V simulator for TestRIGBrian Campbell
2018-11-02Coq: add more autocasts for different but equal kidsBrian Campbell
2018-11-01Changes to enable analysing type errors in ASL parserAlasdair Armstrong
2018-10-31Add rewriting pass for not-patternsAlasdair Armstrong
2018-10-31Remove Parse_ast.Int, add unique locationsAlasdair Armstrong
2018-10-31Rename Reporting_basic to ReportingAlasdair Armstrong
2018-10-31Improve error messages for unsolved function quantifiersAlasdair Armstrong
2018-10-29Pretty printer tweaks for ASL parserAlasdair Armstrong
2018-10-29Merge pull request #21 from rems-project/riscv_c_platformAlasdair Armstrong
2018-10-24Add constraint synonymsAlasdair Armstrong
2018-10-23RISC-V: switch c tests to use the C platform simulator; update .gitignore.Prashanth Mundkur
2018-10-23RISC-V: use stderr for terminal output in OCaml backend.Prashanth Mundkur
2018-10-23RISC-V: separate jalr execute clause for seq model and rmem.Prashanth Mundkur
2018-10-23RISC-V: Initial splitting of instructions across multiple files.Prashanth Mundkur
2018-10-23RISC-V: Allow the C platform to get the DTB from a file, so that OS boot is p...Prashanth Mundkur
2018-10-23RISC-V: add cli option to dump the platform device-tree.Prashanth Mundkur
2018-10-23RISC-V: Add a platform knob to control mtval contents on illegal instruction ...Prashanth Mundkur
2018-10-23RISC-V: various fixesPrashanth Mundkur
2018-10-23RISC-V: fix: sstatus.SD depends on .XS and .FS.Prashanth Mundkur
2018-10-23RISC-V: adjust main loop for the non-spike case.Prashanth Mundkur
2018-10-23RISC-V: implement terminal output for C platform.Prashanth Mundkur
2018-10-23RISC-V: tick the clock in the C platform.Prashanth Mundkur
2018-10-23RISC-V: Add device tree blob into rom, currently only when linked against spike.Prashanth Mundkur
2018-10-23RISC-V: add default reset vector.Prashanth Mundkur
2018-10-23RISC-V: fix up platform bits for lr/sc.Prashanth Mundkur
2018-10-23RISC-V: set htif tohost port address using ELF symbol.Prashanth Mundkur
2018-10-23RTS: Add elf symbol lookup support.Prashanth Mundkur
2018-10-23Fix typo in plat_ram_sizeAlasdair Armstrong
2018-10-23RISC-V: Add some debug logs for within_phys_mem.Prashanth Mundkur
2018-10-23RISC-V: Allow Spike linkage to be conditionally enabled.Prashanth Mundkur
2018-10-23RISC-V: flush logs at each step.Prashanth Mundkur
2018-10-23RISC-V: Flesh out more of the tandem checks in the C platform simulator.Prashanth Mundkur
2018-10-23RISC-V: An initial C Sail model linked against Spike for testing.Prashanth Mundkur
2018-10-23RTS: allow elf-loader to provide entry info.Prashanth Mundkur
2018-10-23RISC-V: Refactor c platform bits.Prashanth Mundkur
2018-10-22Coq: use function type more carefully in untuplingBrian Campbell
2018-10-22Update Coq patch for RISC-V, add string_take to Coq libraryBrian Campbell
2018-10-22Coq: work around constructors with tupled argumentsBrian Campbell
2018-10-22Fix lem arguments for functions with tuple argumentsAlasdair Armstrong
2018-10-22Pretty_print_lem.untuple_args_pat: temporary hack to allow functions that act...Jon French
2018-10-16add a couple more RISC-V things to gitignoreJon French
2018-10-16Re-implement space-related mapping functions in Sail rather than backendsJon French
2018-10-16rewrites: remove now-unnecessary temporary string hack from rewrite_defs_pat_...Jon French
2018-10-15Update manual snapshotAlasdair Armstrong
2018-10-13Adapt checked_mem_read to have acquire/release/reserve arguments soChristopher Pulte
2018-10-12Prevent accidental test failures when Coq compiles in the wrong orderBrian Campbell
2018-10-11Change the function type in the ASTAlasdair
2018-10-10refer to Util.list_init.ml rather than List.init in sail_lib.mlChristopher Pulte
2018-10-08Produce lists of constructors and ast building functions for test generationBrian Campbell
2018-10-05interpreter: Remove boxes (no longer used)Jon French