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AgeCommit message (Expand)Author
2018-06-27Actually fix real literals, and add a test for various propertiesAlasdair Armstrong
2018-06-27Fix reading reals from strings in C libAlasdair Armstrong
2018-06-27libsail: optimise real_powerAlastair Reid
2018-06-27Add a mips_c_gcov target that builds mips_c model with coverage reporting.Robert Norton
2018-06-27Add a new function cycle_limit_reached that returns bool, allowing for gracef...Robert Norton
2018-06-27Fix real implementation in C to use GMP rationalsAlasdair Armstrong
2018-06-27Main: refactor fetch_and_executeAlastair Reid
2018-06-27RTS: __SetConfig support is off by defaultAlastair Reid
2018-06-27RTS: Add support for __ListConfigAlastair Reid
2018-06-27RTS: Delete __SetConfig stub functionAlastair Reid
2018-06-27Make sure __SetConfig gets included in generated codeAlasdair Armstrong
2018-06-27Main: fix PC advance after HINT and other EndOfInstructionAlastair Reid
2018-06-26Fix duplicate riscv mem-ea, spotted by Jon French.Prashanth Mundkur
2018-06-26Add configuration registers so __SetConfig ASL can be translatedAlasdair Armstrong
2018-06-26Main: further refinement of execution cycleAlastair Reid
2018-06-26Prelude: as received from AlasdairAlastair Reid
2018-06-26Main: attempt to capture AArch64 execution cycleAlastair Reid
2018-06-26mips: fix duplication of cycle_count call that arose due to git merge.Robert Norton
2018-06-26mips: comment out printing of EXCEPTION on every ISA exception.Robert Norton
2018-06-26turn on warnings when compiling mips c then dial back ones that are triggered...Robert Norton
2018-06-26RTS: implement sleep primitivesAlastair Reid
2018-06-26RTS: stub support for -C command line optionAlastair Reid
2018-06-26ELF: Restore error messages in ELF readerAlastair Reid
2018-06-26In guarded pattern rewriting, irrefutable patterns subsume wildcardsBrian Campbell
2018-06-26In elf_loader don't attempt to convert paddr to int64 because on MIPS it is q...Robert Norton
2018-06-25Add a riscv platform parameter to control trapping to M-mode on misaligned ac...Prashanth Mundkur
2018-06-25Increment the riscv trace step counter only when instructions are executed.Prashanth Mundkur
2018-06-25Hook in the missed misa legalizer.Prashanth Mundkur
2018-06-25Fix riscv interrupt pending check to handle implicit enabling at lower privil...Prashanth Mundkur
2018-06-25Make sstatus.UXL legalization match spike for now. Leave a fixme to make this...Prashanth Mundkur
2018-06-25Fix a missed fixme for the sstatus view of mstatus.Prashanth Mundkur
2018-06-25Fix tracecmp for spike's recursive calls for sie/sip/sstatus csr writes.Prashanth Mundkur
2018-06-25Check for variables in disjointness checkThomas Bauereiss
2018-06-25Support bitlist representation in Sail2_stringThomas Bauereiss
2018-06-25Fix a bug in pattern guard rewritingThomas Bauereiss
2018-06-25Coq: add typeclass based comparison, and instantiate for enumsBrian Campbell
2018-06-25Coq: automatic cast introductionBrian Campbell
2018-06-25Use getopt rather than argp for Mac compatibility in C runtimeAlasdair Armstrong
2018-06-25add device tree file for mips.Robert Norton
2018-06-25mips: add optional tracing of register writes (commented out).Robert Norton
2018-06-25flush stdout after putchar for terminal emulation purposes.Robert Norton
2018-06-25Fix bugs in mips ldl/ldr that were probably introduced in porting to sail2.Robert Norton
2018-06-23Add clock tick checks to the riscv tracecmp tool.Prashanth Mundkur
2018-06-23Fix a missing check for interrupt dispatch when riscv clint registers are wri...Prashanth Mundkur
2018-06-23Split Sail->ANF translation into its own fileAlasdair
2018-06-22Make riscv pte dirty-bit update handling configurable via a platform cli option.Prashanth Mundkur
2018-06-22Some more riscv trace log tweaking for spike compatibility.Prashanth Mundkur
2018-06-22Add cli options to riscv simulator to dump platform device-tree info.Prashanth Mundkur
2018-06-22Fix Lem build of MIPS/CHERIThomas Bauereiss
2018-06-22Add a simple trace log comparison tool for riscv vs. a patched spike.Prashanth Mundkur
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