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AgeCommit message (Expand)Author
2018-12-20RISVC model is now at https://github.com/rems-project/sail-riscv . Remove it ...Robert Norton
2018-11-12Add RVFI DII version of the RISC-V simulator for TestRIGBrian Campbell
2018-10-23RISC-V: switch c tests to use the C platform simulator; update .gitignore.Prashanth Mundkur
2018-10-16add a couple more RISC-V things to gitignoreJon French
2018-06-11Merge branch 'sail2' into mappingsJon French
2018-05-24Import (rather hacky) Coq Sail librariesBrian Campbell
2018-05-21Ignore src/share_directory.mlRamana Kumar
2018-05-18update and reorganise .gitignoreJon French
2018-05-16More targeted gitignore for HOL4Brian Campbell
2018-05-16Ignore .hollogsRamana Kumar
2018-05-16Add global gitignore entries for HOL4Brian Campbell
2018-04-13Add a few more generated file to gitignoreBrian Campbell
2018-01-30Updates to C backendAlasdair Armstrong
2017-10-25Point sail/src makefile at ott file in language/Alasdair Armstrong
2014-04-23make docGabriel Kerneis
2013-10-10Run interpreterGabriel Kerneis
2013-10-04Clean up build systemGabriel Kerneis
2013-07-31Add .gitignoreGabriel Kerneis
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