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-rw-r--r--test/ocaml/reg_ref/rr.sail4
-rw-r--r--test/ocaml/void/void.sail2
2 files changed, 3 insertions, 3 deletions
diff --git a/test/ocaml/reg_ref/rr.sail b/test/ocaml/reg_ref/rr.sail
index d0a14586..f162d3a2 100644
--- a/test/ocaml/reg_ref/rr.sail
+++ b/test/ocaml/reg_ref/rr.sail
@@ -33,7 +33,7 @@ overload _mod_GPR = { rGPR, wGPR }
/* Create a new type which is a pair of a bitvector and a start index
slice('n, 'm) is equivalent to old-sail vector('n, 'm, dec, bit) */
-newtype slice ('n : Int) ('m : Int) = MkSlice : (atom('n), bits('m))
+newtype slice ('n : Int, 'm : Int) = MkSlice : (atom('n), bits('m))
/* Extract the bitvector from a slice */
val slice_bits : forall 'n 'm. slice('n, 'm) -> bits('m)
@@ -76,7 +76,7 @@ overload _mod_slice = {_set_slice, _set_slice2, vector_slice, slice_slice}
/* Set up a struct with an aliased LT bit in CR0, mimicing old-style syntax */
infix 1 ...
-type operator ... ('n : Int) ('m : Int) = slice('m, 'n - ('m - 1))
+type operator ...('n : Int, 'm : Int) = slice('m, 'n - ('m - 1))
struct cr = {
CR0 : 7 ... 4,
diff --git a/test/ocaml/void/void.sail b/test/ocaml/void/void.sail
index 485ac019..4e8815f5 100644
--- a/test/ocaml/void/void.sail
+++ b/test/ocaml/void/void.sail
@@ -1,5 +1,5 @@
-val void : forall 'n, 'n = 'n + 1. atom('n) -> unit
+val void : forall 'n, 'n == 'n + 1. atom('n) -> unit
function void _ = ()