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-rw-r--r--src/lem_interp/interp_inter_imp.lem13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/lem_interp/interp_inter_imp.lem b/src/lem_interp/interp_inter_imp.lem
index 7b96aef5..68076627 100644
--- a/src/lem_interp/interp_inter_imp.lem
+++ b/src/lem_interp/interp_inter_imp.lem
@@ -39,6 +39,19 @@ let intern_value v = match v with
| _ -> Interp.V_unknown
end
+let num_to_bits size kind num =
+ match kind with
+ | Bitv -> Bitvector (match (Interp_lib.to_vec_inc (Interp.V_tuple([Interp.V_lit(L_aux (L_num size) Interp_ast.Unknown);
+ Interp.V_lit(L_aux (L_num (integerFromNat num))
+ Interp_ast.Unknown)]))) with
+ | Interp.V_vector _ _ bits -> from_bits bits end) true 0
+ | Bytev ->
+ Bytevector (match (Interp_lib.to_vec_inc (Interp.V_tuple([Interp.V_lit(L_aux (L_num size) Interp_ast.Unknown);
+ Interp.V_lit(L_aux (L_num (integerFromNat num))
+ Interp_ast.Unknown)]))) with
+ | Interp.V_vector _ _ bits -> (to_bytes (from_bits bits)) end)
+end
+
let extern_reg r slice = match (r,slice) with
| (Interp.Reg (Id_aux (Id x) _) _,Nothing) -> Reg x
| (Interp.Reg (Id_aux (Id x) _) _,Just(i1,i2)) -> Reg_slice x (i1,i2)