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-rw-r--r--src/gen_lib/sail_operators.lem2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gen_lib/sail_operators.lem b/src/gen_lib/sail_operators.lem
index 30c7325e..d9bf8454 100644
--- a/src/gen_lib/sail_operators.lem
+++ b/src/gen_lib/sail_operators.lem
@@ -144,7 +144,7 @@ let to_bin n = List.reverse (to_bin_aux n)
val pad_zero : list bitU -> integer -> list bitU
let rec pad_zero bits n =
- if n = 0 then bits else pad_zero (B0 :: bits) (n -1)
+ if n <= 0 then bits else pad_zero (B0 :: bits) (n -1)
let rec add_one_bit_ignore_overflow_aux bits = match bits with