diff options
Diffstat (limited to 'snapshots/isabelle/aarch64/Aarch64.thy')
| -rw-r--r-- | snapshots/isabelle/aarch64/Aarch64.thy | 4084 |
1 files changed, 2117 insertions, 1967 deletions
diff --git a/snapshots/isabelle/aarch64/Aarch64.thy b/snapshots/isabelle/aarch64/Aarch64.thy index a117b761..c63ed15e 100644 --- a/snapshots/isabelle/aarch64/Aarch64.thy +++ b/snapshots/isabelle/aarch64/Aarch64.thy @@ -5,25 +5,25 @@ theory "Aarch64" imports Main "Lem_pervasives_extra" - "Sail_instr_kinds" - "Sail_values" - "Sail_operators_mwords" - "Prompt_monad" - "Prompt" - "State" + "/tmp/sail/src/lem_interp/Sail2_instr_kinds" + "/tmp/sail/src/gen_lib/Sail2_values" + "/tmp/sail/src/gen_lib/Sail2_operators_mwords" + "/tmp/sail/src/gen_lib/Sail2_prompt_monad" + "/tmp/sail/src/gen_lib/Sail2_prompt" + "/tmp/sail/src/gen_lib/Sail2_string" "Aarch64_types" - "Aarch64_extras" + "/tmp/sail/aarch64/mono/Aarch64_extras" begin (*Generated by Sail from aarch64.*) (*open import Pervasives_extra*) -(*open import Sail_instr_kinds*) -(*open import Sail_values*) -(*open import Sail_operators_mwords*) -(*open import Prompt_monad*) -(*open import Prompt*) -(*open import State*) +(*open import Sail2_instr_kinds*) +(*open import Sail2_values*) +(*open import Sail2_string*) +(*open import Sail2_operators_mwords*) +(*open import Sail2_prompt_monad*) +(*open import Sail2_prompt*) (*open import Aarch64_types*) (*open import Aarch64_extras*) @@ -60,7 +60,7 @@ definition neq_bool :: " bool \<Rightarrow> bool \<Rightarrow> bool " where definition GetSlice_int :: "('n::len)itself \<Rightarrow> int \<Rightarrow> int \<Rightarrow>('n::len)Word.word " where " GetSlice_int n m o1 = ( (let n = (size_itself_int n) in - (get_slice_int0 n m o1 :: ( 'n::len)Word.word)))" + (get_slice_int n m o1 :: ( 'n::len)Word.word)))" (*val __raw_SetSlice_bits : forall 'n 'w. integer -> integer -> bits 'n -> ii -> bits 'w -> bits 'n*) @@ -74,19 +74,11 @@ fun cast_unit_vec0 :: " bitU \<Rightarrow>(1)Word.word " where |" cast_unit_vec0 B1 = ( (vec_of_bits [B1] :: 1 Word.word))" -(*val DecStr : ii -> string*) +(*val BoolStr : bool -> string*) -(*val HexStr : ii -> string*) +definition BoolStr :: " bool \<Rightarrow> string " where + " BoolStr b = ( if b then (''true'') else (''false''))" -(*val __TraceMemoryWrite : forall 'm 'p8_times_n_ . integer -> bits 'm -> bits 'p8_times_n_ -> unit*) - -(*val __InitRAM : forall 'm. Size 'm => integer -> ii -> mword 'm -> mword ty8 -> unit*) - -definition InitRAM :: " int \<Rightarrow> int \<Rightarrow>('m::len)Word.word \<Rightarrow>(8)Word.word \<Rightarrow> unit " where - " InitRAM g__615 g__616 g__617 g__618 = ( () )" - - -(*val __TraceMemoryRead : forall 'm 'p8_times_n_ . integer -> bits 'm -> bits 'p8_times_n_ -> unit*) (*val ex_nat : ii -> integer*) @@ -118,13 +110,48 @@ definition break :: " unit \<Rightarrow> unit " where definition undefined_exception :: " unit \<Rightarrow>((register_value),(exception),(exception))monad " where " undefined_exception _ = ( - (undefined_unit () \<then> - undefined_string () ) \<bind> (\<lambda> (w__0 :: string) . - undefined_string () \<bind> (\<lambda> (w__1 :: string) . - (undefined_unit () \<then> - undefined_unit () ) \<then> + undefined_string () \<bind> (\<lambda> (u_0 :: string) . + undefined_unit () \<bind> (\<lambda> (u_1 :: unit) . internal_pick - [Error_Undefined () ,Error_See w__0,Error_Implementation_Defined w__1,Error_ReservedEncoding () ,Error_ExceptionTaken () ])))" + [Error_Undefined u_1,Error_See u_0,Error_Implementation_Defined u_0,Error_ReservedEncoding u_1,Error_ExceptionTaken u_1])))" + + +(*val __GetVerbosity : unit -> M (bits ty64)*) + +(*val get_cycle_count : unit -> M ii*) + +(*val __InitRAM : forall 'm. Size 'm => integer -> ii -> mword 'm -> mword ty8 -> unit*) + +definition InitRAM :: " int \<Rightarrow> int \<Rightarrow>('m::len)Word.word \<Rightarrow>(8)Word.word \<Rightarrow> unit " where + " InitRAM g__302 g__303 g__304 g__305 = ( () )" + + +(*val __ReadRAM : forall 'm 'p8_times_n_ . Size 'm, Size 'p8_times_n_ => itself 'm -> integer -> mword 'm -> mword 'm -> M (mword 'p8_times_n_)*) + +definition ReadRAM :: "('m::len)itself \<Rightarrow> int \<Rightarrow>('m::len)Word.word \<Rightarrow>('m::len)Word.word \<Rightarrow>((register_value),(('p8_times_n_::len)Word.word),(exception))monad " where + " ReadRAM addr_length bytes hex_ram addr = ( + (let addr_length = (size_itself_int addr_length) in + (read_ram addr_length bytes hex_ram addr :: (( 'p8_times_n_::len)Word.word) M)))" + + +(*val __TraceMemoryWrite : forall 'm 'p8_times_n_ . Size 'm, Size 'p8_times_n_ => integer -> mword 'm -> mword 'p8_times_n_ -> unit*) + +(*val __WriteRAM : forall 'm 'p8_times_n_ . Size 'm, Size 'p8_times_n_ => itself 'm -> integer -> mword 'm -> mword 'm -> mword 'p8_times_n_ -> M unit*) + +definition WriteRAM :: "('m::len)itself \<Rightarrow> int \<Rightarrow>('m::len)Word.word \<Rightarrow>('m::len)Word.word \<Rightarrow>('p8_times_n_::len)Word.word \<Rightarrow>((register_value),(unit),(exception))monad " where + " WriteRAM addr_length bytes hex_ram addr data = ( + (let addr_length = (size_itself_int addr_length) in + write_ram addr_length bytes hex_ram addr data))" + + +definition TraceMemoryWrite :: " int \<Rightarrow>('m::len)Word.word \<Rightarrow>('p8_times_n_::len)Word.word \<Rightarrow> unit " where + " TraceMemoryWrite bytes addr data = ( () )" + + +(*val __TraceMemoryRead : forall 'm 'p8_times_n_ . Size 'm, Size 'p8_times_n_ => integer -> mword 'm -> mword 'p8_times_n_ -> unit*) + +definition TraceMemoryRead :: " int \<Rightarrow>('m::len)Word.word \<Rightarrow>('p8_times_n_::len)Word.word \<Rightarrow> unit " where + " TraceMemoryRead bytes addr data = ( () )" (*val extzv : forall 'n 'm. Size 'm, Size 'n => integer -> mword 'n -> mword 'm*) @@ -151,14 +178,17 @@ definition slice_mask :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow definition is_zero_subrange :: "('n::len)Word.word \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool " where " is_zero_subrange xs i j = ( - (((and_vec xs ((slice_mask ((int (size xs))) j ((i - j)) :: ( 'n::len)Word.word)) :: ( 'n::len)Word.word)) = ((extzv ((int (size xs))) (vec_of_bits [B0] :: 1 Word.word) :: ( 'n::len)Word.word))))" + (((and_vec xs + ((slice_mask ((int (size xs))) j ((((i - j)) + (( 1 :: int)::ii))) :: ( 'n::len)Word.word)) + :: ( 'n::len)Word.word)) = ((extzv ((int (size xs))) (vec_of_bits [B0] :: 1 Word.word) :: ( 'n::len)Word.word))))" (*val is_ones_subrange : forall 'n . Size 'n => mword 'n -> ii -> ii -> bool*) definition is_ones_subrange :: "('n::len)Word.word \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool " where " is_ones_subrange xs i j = ( - (let (m :: 'n bits) = ((slice_mask ((int (size xs))) j ((j - i)) :: ( 'n::len)Word.word)) in + (let (m :: 'n bits) = + ((slice_mask ((int (size xs))) j ((((j - i)) + (( 1 :: int)::ii))) :: ( 'n::len)Word.word)) in (((and_vec xs m :: ( 'n::len)Word.word)) = m)))" @@ -190,12 +220,15 @@ definition subrange_subrange_eq :: "('n::len)Word.word \<Rightarrow> int \<Righ " subrange_subrange_eq xs i j ys i' j' = ( (let xs = ((shiftr - ((and_vec xs ((slice_mask ((int (size xs))) j ((i - j)) :: ( 'n::len)Word.word)) :: ( 'n::len)Word.word)) j + ((and_vec xs + ((slice_mask ((int (size xs))) j ((((i - j)) + (( 1 :: int)::ii))) :: ( 'n::len)Word.word)) + :: ( 'n::len)Word.word)) j :: ( 'n::len)Word.word)) in (let ys = ((shiftr - ((and_vec ys ((slice_mask ((int (size xs))) j' ((i' - j')) :: ( 'n::len)Word.word)) :: ( 'n::len)Word.word)) - j' + ((and_vec ys + ((slice_mask ((int (size xs))) j' ((((i' - j')) + (( 1 :: int)::ii))) :: ( 'n::len)Word.word)) + :: ( 'n::len)Word.word)) j' :: ( 'n::len)Word.word)) in (xs = ys))))" @@ -206,16 +239,18 @@ definition subrange_subrange_concat :: " int \<Rightarrow>('n::len)Word.word \< " subrange_subrange_concat (s__tv :: int) xs i j ys i' j' = ( (let xs = ((shiftr - ((and_vec xs ((slice_mask ((int (size xs))) j ((i - j)) :: ( 'n::len)Word.word)) :: ( 'n::len)Word.word)) j + ((and_vec xs + ((slice_mask ((int (size xs))) j ((((i - j)) + (( 1 :: int)::ii))) :: ( 'n::len)Word.word)) + :: ( 'n::len)Word.word)) j :: ( 'n::len)Word.word)) in (let ys = ((shiftr - ((and_vec ys ((slice_mask ((int (size ys))) j' ((i' - j')) :: ( 'm::len)Word.word)) :: ( 'm::len)Word.word)) - j' + ((and_vec ys + ((slice_mask ((int (size ys))) j' ((((i' - j')) + (( 1 :: int)::ii))) :: ( 'm::len)Word.word)) + :: ( 'm::len)Word.word)) j' :: ( 'm::len)Word.word)) in (or_vec - ((sub_vec_int ((shiftl ((extzv s__tv xs :: ( 's::len)Word.word)) i' :: ( 's::len)Word.word)) - ((j' - (( 1 :: int)::ii))) + ((shiftl ((extzv s__tv xs :: ( 's::len)Word.word)) ((((i' - j')) + (( 1 :: int)::ii))) :: ( 's::len)Word.word)) ((extzv s__tv ys :: ( 's::len)Word.word)) :: ( 's::len)Word.word))))" @@ -226,7 +261,9 @@ definition place_subrange :: " int \<Rightarrow>('n::len)Word.word \<Rightarrow " place_subrange (m__tv :: int) xs i j shift = ( (let xs = ((shiftr - ((and_vec xs ((slice_mask ((int (size xs))) j ((i - j)) :: ( 'n::len)Word.word)) :: ( 'n::len)Word.word)) j + ((and_vec xs + ((slice_mask ((int (size xs))) j ((((i - j)) + (( 1 :: int)::ii))) :: ( 'n::len)Word.word)) + :: ( 'n::len)Word.word)) j :: ( 'n::len)Word.word)) in (shiftl ((extzv m__tv xs :: ( 'm::len)Word.word)) shift :: ( 'm::len)Word.word)))" @@ -277,7 +314,9 @@ definition unsigned_subrange :: "('n::len)Word.word \<Rightarrow> int \<Rightar " unsigned_subrange xs i j = ( (let xs = ((shiftr - ((and_vec xs ((slice_mask ((int (size xs))) j ((i - j)) :: ( 'n::len)Word.word)) :: ( 'n::len)Word.word)) i + ((and_vec xs + ((slice_mask ((int (size xs))) j ((((i - j)) + (( 1 :: int)::ii))) :: ( 'n::len)Word.word)) + :: ( 'n::len)Word.word)) i :: ( 'n::len)Word.word)) in Word.uint xs))" @@ -294,8 +333,8 @@ definition zext_ones :: " int \<Rightarrow> int \<Rightarrow>('n::len)Word.word definition boolean_of_num :: " int \<Rightarrow> boolean " where " boolean_of_num arg0 = ( - (let l__595 = arg0 in - if (((l__595 = (( 0 :: int)::ii)))) then FALSE + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then FALSE else TRUE))" @@ -316,8 +355,8 @@ definition undefined_boolean :: " unit \<Rightarrow>((register_value),(boolean) definition signal_of_num :: " int \<Rightarrow> signal " where " signal_of_num arg0 = ( - (let l__594 = arg0 in - if (((l__594 = (( 0 :: int)::ii)))) then LOW + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then LOW else HIGH))" @@ -338,15 +377,15 @@ definition undefined_signal :: " unit \<Rightarrow>((register_value),(signal),( definition RetCode_of_num :: " int \<Rightarrow> RetCode " where " RetCode_of_num arg0 = ( - (let l__586 = arg0 in - if (((l__586 = (( 0 :: int)::ii)))) then RC_OK - else if (((l__586 = (( 1 :: int)::ii)))) then RC_UNDEFINED - else if (((l__586 = (( 2 :: int)::ii)))) then RC_UNPREDICTABLE - else if (((l__586 = (( 3 :: int)::ii)))) then RC_SEE - else if (((l__586 = (( 4 :: int)::ii)))) then RC_IMPLEMENTATION_DEFINED - else if (((l__586 = (( 5 :: int)::ii)))) then RC_SUBARCHITECTURE_DEFINED - else if (((l__586 = (( 6 :: int)::ii)))) then RC_EXCEPTION_TAKEN - else if (((l__586 = (( 7 :: int)::ii)))) then RC_ASSERT_FAILED + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then RC_OK + else if (((p00 = (( 1 :: int)::ii)))) then RC_UNDEFINED + else if (((p00 = (( 2 :: int)::ii)))) then RC_UNPREDICTABLE + else if (((p00 = (( 3 :: int)::ii)))) then RC_SEE + else if (((p00 = (( 4 :: int)::ii)))) then RC_IMPLEMENTATION_DEFINED + else if (((p00 = (( 5 :: int)::ii)))) then RC_SUBARCHITECTURE_DEFINED + else if (((p00 = (( 6 :: int)::ii)))) then RC_EXCEPTION_TAKEN + else if (((p00 = (( 7 :: int)::ii)))) then RC_ASSERT_FAILED else RC_UNMATCHED_CASE))" @@ -376,11 +415,11 @@ definition undefined___RetCode :: " unit \<Rightarrow>((register_value),(RetCod definition FPConvOp_of_num :: " int \<Rightarrow> FPConvOp " where " FPConvOp_of_num arg0 = ( - (let l__582 = arg0 in - if (((l__582 = (( 0 :: int)::ii)))) then FPConvOp_CVT_FtoI - else if (((l__582 = (( 1 :: int)::ii)))) then FPConvOp_CVT_ItoF - else if (((l__582 = (( 2 :: int)::ii)))) then FPConvOp_MOV_FtoI - else if (((l__582 = (( 3 :: int)::ii)))) then FPConvOp_MOV_ItoF + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then FPConvOp_CVT_FtoI + else if (((p00 = (( 1 :: int)::ii)))) then FPConvOp_CVT_ItoF + else if (((p00 = (( 2 :: int)::ii)))) then FPConvOp_MOV_FtoI + else if (((p00 = (( 3 :: int)::ii)))) then FPConvOp_MOV_ItoF else FPConvOp_CVT_FtoI_JS))" @@ -406,35 +445,35 @@ definition undefined_FPConvOp :: " unit \<Rightarrow>((register_value),(FPConvO definition Exception_of_num :: " int \<Rightarrow> Exception " where " Exception_of_num arg0 = ( - (let l__554 = arg0 in - if (((l__554 = (( 0 :: int)::ii)))) then Exception_Uncategorized - else if (((l__554 = (( 1 :: int)::ii)))) then Exception_WFxTrap - else if (((l__554 = (( 2 :: int)::ii)))) then Exception_CP15RTTrap - else if (((l__554 = (( 3 :: int)::ii)))) then Exception_CP15RRTTrap - else if (((l__554 = (( 4 :: int)::ii)))) then Exception_CP14RTTrap - else if (((l__554 = (( 5 :: int)::ii)))) then Exception_CP14DTTrap - else if (((l__554 = (( 6 :: int)::ii)))) then Exception_AdvSIMDFPAccessTrap - else if (((l__554 = (( 7 :: int)::ii)))) then Exception_FPIDTrap - else if (((l__554 = (( 8 :: int)::ii)))) then Exception_PACTrap - else if (((l__554 = (( 9 :: int)::ii)))) then Exception_CP14RRTTrap - else if (((l__554 = (( 10 :: int)::ii)))) then Exception_IllegalState - else if (((l__554 = (( 11 :: int)::ii)))) then Exception_SupervisorCall - else if (((l__554 = (( 12 :: int)::ii)))) then Exception_HypervisorCall - else if (((l__554 = (( 13 :: int)::ii)))) then Exception_MonitorCall - else if (((l__554 = (( 14 :: int)::ii)))) then Exception_SystemRegisterTrap - else if (((l__554 = (( 15 :: int)::ii)))) then Exception_ERetTrap - else if (((l__554 = (( 16 :: int)::ii)))) then Exception_InstructionAbort - else if (((l__554 = (( 17 :: int)::ii)))) then Exception_PCAlignment - else if (((l__554 = (( 18 :: int)::ii)))) then Exception_DataAbort - else if (((l__554 = (( 19 :: int)::ii)))) then Exception_SPAlignment - else if (((l__554 = (( 20 :: int)::ii)))) then Exception_FPTrappedException - else if (((l__554 = (( 21 :: int)::ii)))) then Exception_SError - else if (((l__554 = (( 22 :: int)::ii)))) then Exception_Breakpoint - else if (((l__554 = (( 23 :: int)::ii)))) then Exception_SoftwareStep - else if (((l__554 = (( 24 :: int)::ii)))) then Exception_Watchpoint - else if (((l__554 = (( 25 :: int)::ii)))) then Exception_SoftwareBreakpoint - else if (((l__554 = (( 26 :: int)::ii)))) then Exception_VectorCatch - else if (((l__554 = (( 27 :: int)::ii)))) then Exception_IRQ + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then Exception_Uncategorized + else if (((p00 = (( 1 :: int)::ii)))) then Exception_WFxTrap + else if (((p00 = (( 2 :: int)::ii)))) then Exception_CP15RTTrap + else if (((p00 = (( 3 :: int)::ii)))) then Exception_CP15RRTTrap + else if (((p00 = (( 4 :: int)::ii)))) then Exception_CP14RTTrap + else if (((p00 = (( 5 :: int)::ii)))) then Exception_CP14DTTrap + else if (((p00 = (( 6 :: int)::ii)))) then Exception_AdvSIMDFPAccessTrap + else if (((p00 = (( 7 :: int)::ii)))) then Exception_FPIDTrap + else if (((p00 = (( 8 :: int)::ii)))) then Exception_PACTrap + else if (((p00 = (( 9 :: int)::ii)))) then Exception_CP14RRTTrap + else if (((p00 = (( 10 :: int)::ii)))) then Exception_IllegalState + else if (((p00 = (( 11 :: int)::ii)))) then Exception_SupervisorCall + else if (((p00 = (( 12 :: int)::ii)))) then Exception_HypervisorCall + else if (((p00 = (( 13 :: int)::ii)))) then Exception_MonitorCall + else if (((p00 = (( 14 :: int)::ii)))) then Exception_SystemRegisterTrap + else if (((p00 = (( 15 :: int)::ii)))) then Exception_ERetTrap + else if (((p00 = (( 16 :: int)::ii)))) then Exception_InstructionAbort + else if (((p00 = (( 17 :: int)::ii)))) then Exception_PCAlignment + else if (((p00 = (( 18 :: int)::ii)))) then Exception_DataAbort + else if (((p00 = (( 19 :: int)::ii)))) then Exception_SPAlignment + else if (((p00 = (( 20 :: int)::ii)))) then Exception_FPTrappedException + else if (((p00 = (( 21 :: int)::ii)))) then Exception_SError + else if (((p00 = (( 22 :: int)::ii)))) then Exception_Breakpoint + else if (((p00 = (( 23 :: int)::ii)))) then Exception_SoftwareStep + else if (((p00 = (( 24 :: int)::ii)))) then Exception_Watchpoint + else if (((p00 = (( 25 :: int)::ii)))) then Exception_SoftwareBreakpoint + else if (((p00 = (( 26 :: int)::ii)))) then Exception_VectorCatch + else if (((p00 = (( 27 :: int)::ii)))) then Exception_IRQ else Exception_FIQ))" @@ -484,10 +523,10 @@ definition undefined_Exception :: " unit \<Rightarrow>((register_value),(Except definition ArchVersion_of_num :: " int \<Rightarrow> ArchVersion " where " ArchVersion_of_num arg0 = ( - (let l__551 = arg0 in - if (((l__551 = (( 0 :: int)::ii)))) then ARMv8p0 - else if (((l__551 = (( 1 :: int)::ii)))) then ARMv8p1 - else if (((l__551 = (( 2 :: int)::ii)))) then ARMv8p2 + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then ARMv8p0 + else if (((p00 = (( 1 :: int)::ii)))) then ARMv8p1 + else if (((p00 = (( 2 :: int)::ii)))) then ARMv8p2 else ARMv8p3))" @@ -510,51 +549,51 @@ definition undefined_ArchVersion :: " unit \<Rightarrow>((register_value),(Arch definition Unpredictable_of_num :: " int \<Rightarrow> Unpredictable " where " Unpredictable_of_num arg0 = ( - (let l__507 = arg0 in - if (((l__507 = (( 0 :: int)::ii)))) then Unpredictable_WBOVERLAPLD - else if (((l__507 = (( 1 :: int)::ii)))) then Unpredictable_WBOVERLAPST - else if (((l__507 = (( 2 :: int)::ii)))) then Unpredictable_LDPOVERLAP - else if (((l__507 = (( 3 :: int)::ii)))) then Unpredictable_BASEOVERLAP - else if (((l__507 = (( 4 :: int)::ii)))) then Unpredictable_DATAOVERLAP - else if (((l__507 = (( 5 :: int)::ii)))) then Unpredictable_DEVPAGE2 - else if (((l__507 = (( 6 :: int)::ii)))) then Unpredictable_INSTRDEVICE - else if (((l__507 = (( 7 :: int)::ii)))) then Unpredictable_RESCPACR - else if (((l__507 = (( 8 :: int)::ii)))) then Unpredictable_RESMAIR - else if (((l__507 = (( 9 :: int)::ii)))) then Unpredictable_RESTEXCB - else if (((l__507 = (( 10 :: int)::ii)))) then Unpredictable_RESPRRR - else if (((l__507 = (( 11 :: int)::ii)))) then Unpredictable_RESDACR - else if (((l__507 = (( 12 :: int)::ii)))) then Unpredictable_RESVTCRS - else if (((l__507 = (( 13 :: int)::ii)))) then Unpredictable_RESTnSZ - else if (((l__507 = (( 14 :: int)::ii)))) then Unpredictable_OORTnSZ - else if (((l__507 = (( 15 :: int)::ii)))) then Unpredictable_LARGEIPA - else if (((l__507 = (( 16 :: int)::ii)))) then Unpredictable_ESRCONDPASS - else if (((l__507 = (( 17 :: int)::ii)))) then Unpredictable_ILZEROIT - else if (((l__507 = (( 18 :: int)::ii)))) then Unpredictable_ILZEROT - else if (((l__507 = (( 19 :: int)::ii)))) then Unpredictable_BPVECTORCATCHPRI - else if (((l__507 = (( 20 :: int)::ii)))) then Unpredictable_VCMATCHHALF - else if (((l__507 = (( 21 :: int)::ii)))) then Unpredictable_VCMATCHDAPA - else if (((l__507 = (( 22 :: int)::ii)))) then Unpredictable_WPMASKANDBAS - else if (((l__507 = (( 23 :: int)::ii)))) then Unpredictable_WPBASCONTIGUOUS - else if (((l__507 = (( 24 :: int)::ii)))) then Unpredictable_RESWPMASK - else if (((l__507 = (( 25 :: int)::ii)))) then Unpredictable_WPMASKEDBITS - else if (((l__507 = (( 26 :: int)::ii)))) then Unpredictable_RESBPWPCTRL - else if (((l__507 = (( 27 :: int)::ii)))) then Unpredictable_BPNOTIMPL - else if (((l__507 = (( 28 :: int)::ii)))) then Unpredictable_RESBPTYPE - else if (((l__507 = (( 29 :: int)::ii)))) then Unpredictable_BPNOTCTXCMP - else if (((l__507 = (( 30 :: int)::ii)))) then Unpredictable_BPMATCHHALF - else if (((l__507 = (( 31 :: int)::ii)))) then Unpredictable_BPMISMATCHHALF - else if (((l__507 = (( 32 :: int)::ii)))) then Unpredictable_RESTARTALIGNPC - else if (((l__507 = (( 33 :: int)::ii)))) then Unpredictable_RESTARTZEROUPPERPC - else if (((l__507 = (( 34 :: int)::ii)))) then Unpredictable_ZEROUPPER - else if (((l__507 = (( 35 :: int)::ii)))) then Unpredictable_ERETZEROUPPERPC - else if (((l__507 = (( 36 :: int)::ii)))) then Unpredictable_A32FORCEALIGNPC - else if (((l__507 = (( 37 :: int)::ii)))) then Unpredictable_SMD - else if (((l__507 = (( 38 :: int)::ii)))) then Unpredictable_AFUPDATE - else if (((l__507 = (( 39 :: int)::ii)))) then Unpredictable_IESBinDebug - else if (((l__507 = (( 40 :: int)::ii)))) then Unpredictable_ZEROPMSEVFR - else if (((l__507 = (( 41 :: int)::ii)))) then Unpredictable_NOOPTYPES - else if (((l__507 = (( 42 :: int)::ii)))) then Unpredictable_ZEROMINLATENCY - else if (((l__507 = (( 43 :: int)::ii)))) then Unpredictable_CLEARERRITEZERO + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then Unpredictable_WBOVERLAPLD + else if (((p00 = (( 1 :: int)::ii)))) then Unpredictable_WBOVERLAPST + else if (((p00 = (( 2 :: int)::ii)))) then Unpredictable_LDPOVERLAP + else if (((p00 = (( 3 :: int)::ii)))) then Unpredictable_BASEOVERLAP + else if (((p00 = (( 4 :: int)::ii)))) then Unpredictable_DATAOVERLAP + else if (((p00 = (( 5 :: int)::ii)))) then Unpredictable_DEVPAGE2 + else if (((p00 = (( 6 :: int)::ii)))) then Unpredictable_INSTRDEVICE + else if (((p00 = (( 7 :: int)::ii)))) then Unpredictable_RESCPACR + else if (((p00 = (( 8 :: int)::ii)))) then Unpredictable_RESMAIR + else if (((p00 = (( 9 :: int)::ii)))) then Unpredictable_RESTEXCB + else if (((p00 = (( 10 :: int)::ii)))) then Unpredictable_RESPRRR + else if (((p00 = (( 11 :: int)::ii)))) then Unpredictable_RESDACR + else if (((p00 = (( 12 :: int)::ii)))) then Unpredictable_RESVTCRS + else if (((p00 = (( 13 :: int)::ii)))) then Unpredictable_RESTnSZ + else if (((p00 = (( 14 :: int)::ii)))) then Unpredictable_OORTnSZ + else if (((p00 = (( 15 :: int)::ii)))) then Unpredictable_LARGEIPA + else if (((p00 = (( 16 :: int)::ii)))) then Unpredictable_ESRCONDPASS + else if (((p00 = (( 17 :: int)::ii)))) then Unpredictable_ILZEROIT + else if (((p00 = (( 18 :: int)::ii)))) then Unpredictable_ILZEROT + else if (((p00 = (( 19 :: int)::ii)))) then Unpredictable_BPVECTORCATCHPRI + else if (((p00 = (( 20 :: int)::ii)))) then Unpredictable_VCMATCHHALF + else if (((p00 = (( 21 :: int)::ii)))) then Unpredictable_VCMATCHDAPA + else if (((p00 = (( 22 :: int)::ii)))) then Unpredictable_WPMASKANDBAS + else if (((p00 = (( 23 :: int)::ii)))) then Unpredictable_WPBASCONTIGUOUS + else if (((p00 = (( 24 :: int)::ii)))) then Unpredictable_RESWPMASK + else if (((p00 = (( 25 :: int)::ii)))) then Unpredictable_WPMASKEDBITS + else if (((p00 = (( 26 :: int)::ii)))) then Unpredictable_RESBPWPCTRL + else if (((p00 = (( 27 :: int)::ii)))) then Unpredictable_BPNOTIMPL + else if (((p00 = (( 28 :: int)::ii)))) then Unpredictable_RESBPTYPE + else if (((p00 = (( 29 :: int)::ii)))) then Unpredictable_BPNOTCTXCMP + else if (((p00 = (( 30 :: int)::ii)))) then Unpredictable_BPMATCHHALF + else if (((p00 = (( 31 :: int)::ii)))) then Unpredictable_BPMISMATCHHALF + else if (((p00 = (( 32 :: int)::ii)))) then Unpredictable_RESTARTALIGNPC + else if (((p00 = (( 33 :: int)::ii)))) then Unpredictable_RESTARTZEROUPPERPC + else if (((p00 = (( 34 :: int)::ii)))) then Unpredictable_ZEROUPPER + else if (((p00 = (( 35 :: int)::ii)))) then Unpredictable_ERETZEROUPPERPC + else if (((p00 = (( 36 :: int)::ii)))) then Unpredictable_A32FORCEALIGNPC + else if (((p00 = (( 37 :: int)::ii)))) then Unpredictable_SMD + else if (((p00 = (( 38 :: int)::ii)))) then Unpredictable_AFUPDATE + else if (((p00 = (( 39 :: int)::ii)))) then Unpredictable_IESBinDebug + else if (((p00 = (( 40 :: int)::ii)))) then Unpredictable_ZEROPMSEVFR + else if (((p00 = (( 41 :: int)::ii)))) then Unpredictable_NOOPTYPES + else if (((p00 = (( 42 :: int)::ii)))) then Unpredictable_ZEROMINLATENCY + else if (((p00 = (( 43 :: int)::ii)))) then Unpredictable_CLEARERRITEZERO else Unpredictable_TBD))" @@ -620,21 +659,21 @@ definition undefined_Unpredictable :: " unit \<Rightarrow>((register_value),(Un definition Constraint_of_num :: " int \<Rightarrow> Constraint " where " Constraint_of_num arg0 = ( - (let l__493 = arg0 in - if (((l__493 = (( 0 :: int)::ii)))) then Constraint_NONE - else if (((l__493 = (( 1 :: int)::ii)))) then Constraint_UNKNOWN - else if (((l__493 = (( 2 :: int)::ii)))) then Constraint_UNDEF - else if (((l__493 = (( 3 :: int)::ii)))) then Constraint_UNDEFEL0 - else if (((l__493 = (( 4 :: int)::ii)))) then Constraint_NOP - else if (((l__493 = (( 5 :: int)::ii)))) then Constraint_TRUE - else if (((l__493 = (( 6 :: int)::ii)))) then Constraint_FALSE - else if (((l__493 = (( 7 :: int)::ii)))) then Constraint_DISABLED - else if (((l__493 = (( 8 :: int)::ii)))) then Constraint_UNCOND - else if (((l__493 = (( 9 :: int)::ii)))) then Constraint_COND - else if (((l__493 = (( 10 :: int)::ii)))) then Constraint_ADDITIONAL_DECODE - else if (((l__493 = (( 11 :: int)::ii)))) then Constraint_WBSUPPRESS - else if (((l__493 = (( 12 :: int)::ii)))) then Constraint_FAULT - else if (((l__493 = (( 13 :: int)::ii)))) then Constraint_FORCE + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then Constraint_NONE + else if (((p00 = (( 1 :: int)::ii)))) then Constraint_UNKNOWN + else if (((p00 = (( 2 :: int)::ii)))) then Constraint_UNDEF + else if (((p00 = (( 3 :: int)::ii)))) then Constraint_UNDEFEL0 + else if (((p00 = (( 4 :: int)::ii)))) then Constraint_NOP + else if (((p00 = (( 5 :: int)::ii)))) then Constraint_TRUE + else if (((p00 = (( 6 :: int)::ii)))) then Constraint_FALSE + else if (((p00 = (( 7 :: int)::ii)))) then Constraint_DISABLED + else if (((p00 = (( 8 :: int)::ii)))) then Constraint_UNCOND + else if (((p00 = (( 9 :: int)::ii)))) then Constraint_COND + else if (((p00 = (( 10 :: int)::ii)))) then Constraint_ADDITIONAL_DECODE + else if (((p00 = (( 11 :: int)::ii)))) then Constraint_WBSUPPRESS + else if (((p00 = (( 12 :: int)::ii)))) then Constraint_FAULT + else if (((p00 = (( 13 :: int)::ii)))) then Constraint_FORCE else Constraint_FORCENOSLCHECK))" @@ -670,9 +709,9 @@ definition undefined_Constraint :: " unit \<Rightarrow>((register_value),(Const definition InstrSet_of_num :: " int \<Rightarrow> InstrSet " where " InstrSet_of_num arg0 = ( - (let l__491 = arg0 in - if (((l__491 = (( 0 :: int)::ii)))) then InstrSet_A64 - else if (((l__491 = (( 1 :: int)::ii)))) then InstrSet_A32 + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then InstrSet_A64 + else if (((p00 = (( 1 :: int)::ii)))) then InstrSet_A32 else InstrSet_T32))" @@ -744,13 +783,13 @@ definition undefined_ProcState :: " unit \<Rightarrow>((register_value),(ProcSt definition BranchType_of_num :: " int \<Rightarrow> BranchType " where " BranchType_of_num arg0 = ( - (let l__485 = arg0 in - if (((l__485 = (( 0 :: int)::ii)))) then BranchType_CALL - else if (((l__485 = (( 1 :: int)::ii)))) then BranchType_ERET - else if (((l__485 = (( 2 :: int)::ii)))) then BranchType_DBGEXIT - else if (((l__485 = (( 3 :: int)::ii)))) then BranchType_RET - else if (((l__485 = (( 4 :: int)::ii)))) then BranchType_JMP - else if (((l__485 = (( 5 :: int)::ii)))) then BranchType_EXCEPTION + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then BranchType_CALL + else if (((p00 = (( 1 :: int)::ii)))) then BranchType_ERET + else if (((p00 = (( 2 :: int)::ii)))) then BranchType_DBGEXIT + else if (((p00 = (( 3 :: int)::ii)))) then BranchType_RET + else if (((p00 = (( 4 :: int)::ii)))) then BranchType_JMP + else if (((p00 = (( 5 :: int)::ii)))) then BranchType_EXCEPTION else BranchType_UNKNOWN))" @@ -794,25 +833,25 @@ definition undefined_ExceptionRecord :: " unit \<Rightarrow>((register_value),( definition Fault_of_num :: " int \<Rightarrow> Fault " where " Fault_of_num arg0 = ( - (let l__467 = arg0 in - if (((l__467 = (( 0 :: int)::ii)))) then Fault_None - else if (((l__467 = (( 1 :: int)::ii)))) then Fault_AccessFlag - else if (((l__467 = (( 2 :: int)::ii)))) then Fault_Alignment - else if (((l__467 = (( 3 :: int)::ii)))) then Fault_Background - else if (((l__467 = (( 4 :: int)::ii)))) then Fault_Domain - else if (((l__467 = (( 5 :: int)::ii)))) then Fault_Permission - else if (((l__467 = (( 6 :: int)::ii)))) then Fault_Translation - else if (((l__467 = (( 7 :: int)::ii)))) then Fault_AddressSize - else if (((l__467 = (( 8 :: int)::ii)))) then Fault_SyncExternal - else if (((l__467 = (( 9 :: int)::ii)))) then Fault_SyncExternalOnWalk - else if (((l__467 = (( 10 :: int)::ii)))) then Fault_SyncParity - else if (((l__467 = (( 11 :: int)::ii)))) then Fault_SyncParityOnWalk - else if (((l__467 = (( 12 :: int)::ii)))) then Fault_AsyncParity - else if (((l__467 = (( 13 :: int)::ii)))) then Fault_AsyncExternal - else if (((l__467 = (( 14 :: int)::ii)))) then Fault_Debug - else if (((l__467 = (( 15 :: int)::ii)))) then Fault_TLBConflict - else if (((l__467 = (( 16 :: int)::ii)))) then Fault_Lockdown - else if (((l__467 = (( 17 :: int)::ii)))) then Fault_Exclusive + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then Fault_None + else if (((p00 = (( 1 :: int)::ii)))) then Fault_AccessFlag + else if (((p00 = (( 2 :: int)::ii)))) then Fault_Alignment + else if (((p00 = (( 3 :: int)::ii)))) then Fault_Background + else if (((p00 = (( 4 :: int)::ii)))) then Fault_Domain + else if (((p00 = (( 5 :: int)::ii)))) then Fault_Permission + else if (((p00 = (( 6 :: int)::ii)))) then Fault_Translation + else if (((p00 = (( 7 :: int)::ii)))) then Fault_AddressSize + else if (((p00 = (( 8 :: int)::ii)))) then Fault_SyncExternal + else if (((p00 = (( 9 :: int)::ii)))) then Fault_SyncExternalOnWalk + else if (((p00 = (( 10 :: int)::ii)))) then Fault_SyncParity + else if (((p00 = (( 11 :: int)::ii)))) then Fault_SyncParityOnWalk + else if (((p00 = (( 12 :: int)::ii)))) then Fault_AsyncParity + else if (((p00 = (( 13 :: int)::ii)))) then Fault_AsyncExternal + else if (((p00 = (( 14 :: int)::ii)))) then Fault_Debug + else if (((p00 = (( 15 :: int)::ii)))) then Fault_TLBConflict + else if (((p00 = (( 16 :: int)::ii)))) then Fault_Lockdown + else if (((p00 = (( 17 :: int)::ii)))) then Fault_Exclusive else Fault_ICacheMaint))" @@ -852,22 +891,22 @@ definition undefined_Fault :: " unit \<Rightarrow>((register_value),(Fault),(ex definition AccType_of_num :: " int \<Rightarrow> AccType " where " AccType_of_num arg0 = ( - (let l__452 = arg0 in - if (((l__452 = (( 0 :: int)::ii)))) then AccType_NORMAL - else if (((l__452 = (( 1 :: int)::ii)))) then AccType_VEC - else if (((l__452 = (( 2 :: int)::ii)))) then AccType_STREAM - else if (((l__452 = (( 3 :: int)::ii)))) then AccType_VECSTREAM - else if (((l__452 = (( 4 :: int)::ii)))) then AccType_ATOMIC - else if (((l__452 = (( 5 :: int)::ii)))) then AccType_ATOMICRW - else if (((l__452 = (( 6 :: int)::ii)))) then AccType_ORDERED - else if (((l__452 = (( 7 :: int)::ii)))) then AccType_ORDEREDRW - else if (((l__452 = (( 8 :: int)::ii)))) then AccType_LIMITEDORDERED - else if (((l__452 = (( 9 :: int)::ii)))) then AccType_UNPRIV - else if (((l__452 = (( 10 :: int)::ii)))) then AccType_IFETCH - else if (((l__452 = (( 11 :: int)::ii)))) then AccType_PTW - else if (((l__452 = (( 12 :: int)::ii)))) then AccType_DC - else if (((l__452 = (( 13 :: int)::ii)))) then AccType_IC - else if (((l__452 = (( 14 :: int)::ii)))) then AccType_DCZVA + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then AccType_NORMAL + else if (((p00 = (( 1 :: int)::ii)))) then AccType_VEC + else if (((p00 = (( 2 :: int)::ii)))) then AccType_STREAM + else if (((p00 = (( 3 :: int)::ii)))) then AccType_VECSTREAM + else if (((p00 = (( 4 :: int)::ii)))) then AccType_ATOMIC + else if (((p00 = (( 5 :: int)::ii)))) then AccType_ATOMICRW + else if (((p00 = (( 6 :: int)::ii)))) then AccType_ORDERED + else if (((p00 = (( 7 :: int)::ii)))) then AccType_ORDEREDRW + else if (((p00 = (( 8 :: int)::ii)))) then AccType_LIMITEDORDERED + else if (((p00 = (( 9 :: int)::ii)))) then AccType_UNPRIV + else if (((p00 = (( 10 :: int)::ii)))) then AccType_IFETCH + else if (((p00 = (( 11 :: int)::ii)))) then AccType_PTW + else if (((p00 = (( 12 :: int)::ii)))) then AccType_DC + else if (((p00 = (( 13 :: int)::ii)))) then AccType_IC + else if (((p00 = (( 14 :: int)::ii)))) then AccType_DCZVA else AccType_AT))" @@ -932,10 +971,10 @@ definition undefined_FaultRecord :: " unit \<Rightarrow>((register_value),(Faul definition MBReqDomain_of_num :: " int \<Rightarrow> MBReqDomain " where " MBReqDomain_of_num arg0 = ( - (let l__449 = arg0 in - if (((l__449 = (( 0 :: int)::ii)))) then MBReqDomain_Nonshareable - else if (((l__449 = (( 1 :: int)::ii)))) then MBReqDomain_InnerShareable - else if (((l__449 = (( 2 :: int)::ii)))) then MBReqDomain_OuterShareable + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then MBReqDomain_Nonshareable + else if (((p00 = (( 1 :: int)::ii)))) then MBReqDomain_InnerShareable + else if (((p00 = (( 2 :: int)::ii)))) then MBReqDomain_OuterShareable else MBReqDomain_FullSystem))" @@ -960,9 +999,9 @@ definition undefined_MBReqDomain :: " unit \<Rightarrow>((register_value),(MBRe definition MBReqTypes_of_num :: " int \<Rightarrow> MBReqTypes " where " MBReqTypes_of_num arg0 = ( - (let l__447 = arg0 in - if (((l__447 = (( 0 :: int)::ii)))) then MBReqTypes_Reads - else if (((l__447 = (( 1 :: int)::ii)))) then MBReqTypes_Writes + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then MBReqTypes_Reads + else if (((p00 = (( 1 :: int)::ii)))) then MBReqTypes_Writes else MBReqTypes_All))" @@ -984,8 +1023,8 @@ definition undefined_MBReqTypes :: " unit \<Rightarrow>((register_value),(MBReq definition MemType_of_num :: " int \<Rightarrow> MemType " where " MemType_of_num arg0 = ( - (let l__446 = arg0 in - if (((l__446 = (( 0 :: int)::ii)))) then MemType_Normal + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then MemType_Normal else MemType_Device))" @@ -1006,10 +1045,10 @@ definition undefined_MemType :: " unit \<Rightarrow>((register_value),(MemType) definition DeviceType_of_num :: " int \<Rightarrow> DeviceType " where " DeviceType_of_num arg0 = ( - (let l__443 = arg0 in - if (((l__443 = (( 0 :: int)::ii)))) then DeviceType_GRE - else if (((l__443 = (( 1 :: int)::ii)))) then DeviceType_nGRE - else if (((l__443 = (( 2 :: int)::ii)))) then DeviceType_nGnRE + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then DeviceType_GRE + else if (((p00 = (( 1 :: int)::ii)))) then DeviceType_nGRE + else if (((p00 = (( 2 :: int)::ii)))) then DeviceType_nGnRE else DeviceType_nGnRnE))" @@ -1099,15 +1138,15 @@ definition undefined_DescriptorUpdate :: " unit \<Rightarrow>((register_value), definition MemAtomicOp_of_num :: " int \<Rightarrow> MemAtomicOp " where " MemAtomicOp_of_num arg0 = ( - (let l__435 = arg0 in - if (((l__435 = (( 0 :: int)::ii)))) then MemAtomicOp_ADD - else if (((l__435 = (( 1 :: int)::ii)))) then MemAtomicOp_BIC - else if (((l__435 = (( 2 :: int)::ii)))) then MemAtomicOp_EOR - else if (((l__435 = (( 3 :: int)::ii)))) then MemAtomicOp_ORR - else if (((l__435 = (( 4 :: int)::ii)))) then MemAtomicOp_SMAX - else if (((l__435 = (( 5 :: int)::ii)))) then MemAtomicOp_SMIN - else if (((l__435 = (( 6 :: int)::ii)))) then MemAtomicOp_UMAX - else if (((l__435 = (( 7 :: int)::ii)))) then MemAtomicOp_UMIN + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then MemAtomicOp_ADD + else if (((p00 = (( 1 :: int)::ii)))) then MemAtomicOp_BIC + else if (((p00 = (( 2 :: int)::ii)))) then MemAtomicOp_EOR + else if (((p00 = (( 3 :: int)::ii)))) then MemAtomicOp_ORR + else if (((p00 = (( 4 :: int)::ii)))) then MemAtomicOp_SMAX + else if (((p00 = (( 5 :: int)::ii)))) then MemAtomicOp_SMIN + else if (((p00 = (( 6 :: int)::ii)))) then MemAtomicOp_UMAX + else if (((p00 = (( 7 :: int)::ii)))) then MemAtomicOp_UMIN else MemAtomicOp_SWP))" @@ -1137,11 +1176,11 @@ definition undefined_MemAtomicOp :: " unit \<Rightarrow>((register_value),(MemA definition FPType_of_num :: " int \<Rightarrow> FPType " where " FPType_of_num arg0 = ( - (let l__431 = arg0 in - if (((l__431 = (( 0 :: int)::ii)))) then FPType_Nonzero - else if (((l__431 = (( 1 :: int)::ii)))) then FPType_Zero - else if (((l__431 = (( 2 :: int)::ii)))) then FPType_Infinity - else if (((l__431 = (( 3 :: int)::ii)))) then FPType_QNaN + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then FPType_Nonzero + else if (((p00 = (( 1 :: int)::ii)))) then FPType_Zero + else if (((p00 = (( 2 :: int)::ii)))) then FPType_Infinity + else if (((p00 = (( 3 :: int)::ii)))) then FPType_QNaN else FPType_SNaN))" @@ -1166,12 +1205,12 @@ definition undefined_FPType :: " unit \<Rightarrow>((register_value),(FPType),( definition FPExc_of_num :: " int \<Rightarrow> FPExc " where " FPExc_of_num arg0 = ( - (let l__426 = arg0 in - if (((l__426 = (( 0 :: int)::ii)))) then FPExc_InvalidOp - else if (((l__426 = (( 1 :: int)::ii)))) then FPExc_DivideByZero - else if (((l__426 = (( 2 :: int)::ii)))) then FPExc_Overflow - else if (((l__426 = (( 3 :: int)::ii)))) then FPExc_Underflow - else if (((l__426 = (( 4 :: int)::ii)))) then FPExc_Inexact + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then FPExc_InvalidOp + else if (((p00 = (( 1 :: int)::ii)))) then FPExc_DivideByZero + else if (((p00 = (( 2 :: int)::ii)))) then FPExc_Overflow + else if (((p00 = (( 3 :: int)::ii)))) then FPExc_Underflow + else if (((p00 = (( 4 :: int)::ii)))) then FPExc_Inexact else FPExc_InputDenorm))" @@ -1198,12 +1237,12 @@ definition undefined_FPExc :: " unit \<Rightarrow>((register_value),(FPExc),(ex definition FPRounding_of_num :: " int \<Rightarrow> FPRounding " where " FPRounding_of_num arg0 = ( - (let l__421 = arg0 in - if (((l__421 = (( 0 :: int)::ii)))) then FPRounding_TIEEVEN - else if (((l__421 = (( 1 :: int)::ii)))) then FPRounding_POSINF - else if (((l__421 = (( 2 :: int)::ii)))) then FPRounding_NEGINF - else if (((l__421 = (( 3 :: int)::ii)))) then FPRounding_ZERO - else if (((l__421 = (( 4 :: int)::ii)))) then FPRounding_TIEAWAY + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then FPRounding_TIEEVEN + else if (((p00 = (( 1 :: int)::ii)))) then FPRounding_POSINF + else if (((p00 = (( 2 :: int)::ii)))) then FPRounding_NEGINF + else if (((p00 = (( 3 :: int)::ii)))) then FPRounding_ZERO + else if (((p00 = (( 4 :: int)::ii)))) then FPRounding_TIEAWAY else FPRounding_ODD))" @@ -1230,11 +1269,11 @@ definition undefined_FPRounding :: " unit \<Rightarrow>((register_value),(FPRou definition SysRegAccess_of_num :: " int \<Rightarrow> SysRegAccess " where " SysRegAccess_of_num arg0 = ( - (let l__417 = arg0 in - if (((l__417 = (( 0 :: int)::ii)))) then SysRegAccess_OK - else if (((l__417 = (( 1 :: int)::ii)))) then SysRegAccess_UNDEFINED - else if (((l__417 = (( 2 :: int)::ii)))) then SysRegAccess_TrapToEL1 - else if (((l__417 = (( 3 :: int)::ii)))) then SysRegAccess_TrapToEL2 + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then SysRegAccess_OK + else if (((p00 = (( 1 :: int)::ii)))) then SysRegAccess_UNDEFINED + else if (((p00 = (( 2 :: int)::ii)))) then SysRegAccess_TrapToEL1 + else if (((p00 = (( 3 :: int)::ii)))) then SysRegAccess_TrapToEL2 else SysRegAccess_TrapToEL3))" @@ -1260,11 +1299,11 @@ definition undefined_SysRegAccess :: " unit \<Rightarrow>((register_value),(Sys definition SRType_of_num :: " int \<Rightarrow> SRType " where " SRType_of_num arg0 = ( - (let l__413 = arg0 in - if (((l__413 = (( 0 :: int)::ii)))) then SRType_LSL - else if (((l__413 = (( 1 :: int)::ii)))) then SRType_LSR - else if (((l__413 = (( 2 :: int)::ii)))) then SRType_ASR - else if (((l__413 = (( 3 :: int)::ii)))) then SRType_ROR + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then SRType_LSL + else if (((p00 = (( 1 :: int)::ii)))) then SRType_LSR + else if (((p00 = (( 2 :: int)::ii)))) then SRType_ASR + else if (((p00 = (( 3 :: int)::ii)))) then SRType_ROR else SRType_RRX))" @@ -1288,10 +1327,10 @@ definition undefined_SRType :: " unit \<Rightarrow>((register_value),(SRType),( definition ShiftType_of_num :: " int \<Rightarrow> ShiftType " where " ShiftType_of_num arg0 = ( - (let l__410 = arg0 in - if (((l__410 = (( 0 :: int)::ii)))) then ShiftType_LSL - else if (((l__410 = (( 1 :: int)::ii)))) then ShiftType_LSR - else if (((l__410 = (( 2 :: int)::ii)))) then ShiftType_ASR + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then ShiftType_LSL + else if (((p00 = (( 1 :: int)::ii)))) then ShiftType_LSR + else if (((p00 = (( 2 :: int)::ii)))) then ShiftType_ASR else ShiftType_ROR))" @@ -1314,9 +1353,9 @@ definition undefined_ShiftType :: " unit \<Rightarrow>((register_value),(ShiftT definition PrefetchHint_of_num :: " int \<Rightarrow> PrefetchHint " where " PrefetchHint_of_num arg0 = ( - (let l__408 = arg0 in - if (((l__408 = (( 0 :: int)::ii)))) then Prefetch_READ - else if (((l__408 = (( 1 :: int)::ii)))) then Prefetch_WRITE + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then Prefetch_READ + else if (((p00 = (( 1 :: int)::ii)))) then Prefetch_WRITE else Prefetch_EXEC))" @@ -1338,11 +1377,11 @@ definition undefined_PrefetchHint :: " unit \<Rightarrow>((register_value),(Pre definition InterruptID_of_num :: " int \<Rightarrow> InterruptID " where " InterruptID_of_num arg0 = ( - (let l__404 = arg0 in - if (((l__404 = (( 0 :: int)::ii)))) then InterruptID_PMUIRQ - else if (((l__404 = (( 1 :: int)::ii)))) then InterruptID_COMMIRQ - else if (((l__404 = (( 2 :: int)::ii)))) then InterruptID_CTIIRQ - else if (((l__404 = (( 3 :: int)::ii)))) then InterruptID_COMMRX + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then InterruptID_PMUIRQ + else if (((p00 = (( 1 :: int)::ii)))) then InterruptID_COMMIRQ + else if (((p00 = (( 2 :: int)::ii)))) then InterruptID_CTIIRQ + else if (((p00 = (( 3 :: int)::ii)))) then InterruptID_COMMRX else InterruptID_COMMTX))" @@ -1368,14 +1407,14 @@ definition undefined_InterruptID :: " unit \<Rightarrow>((register_value),(Inte definition CrossTriggerOut_of_num :: " int \<Rightarrow> CrossTriggerOut " where " CrossTriggerOut_of_num arg0 = ( - (let l__397 = arg0 in - if (((l__397 = (( 0 :: int)::ii)))) then CrossTriggerOut_DebugRequest - else if (((l__397 = (( 1 :: int)::ii)))) then CrossTriggerOut_RestartRequest - else if (((l__397 = (( 2 :: int)::ii)))) then CrossTriggerOut_IRQ - else if (((l__397 = (( 3 :: int)::ii)))) then CrossTriggerOut_RSVD3 - else if (((l__397 = (( 4 :: int)::ii)))) then CrossTriggerOut_TraceExtIn0 - else if (((l__397 = (( 5 :: int)::ii)))) then CrossTriggerOut_TraceExtIn1 - else if (((l__397 = (( 6 :: int)::ii)))) then CrossTriggerOut_TraceExtIn2 + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then CrossTriggerOut_DebugRequest + else if (((p00 = (( 1 :: int)::ii)))) then CrossTriggerOut_RestartRequest + else if (((p00 = (( 2 :: int)::ii)))) then CrossTriggerOut_IRQ + else if (((p00 = (( 3 :: int)::ii)))) then CrossTriggerOut_RSVD3 + else if (((p00 = (( 4 :: int)::ii)))) then CrossTriggerOut_TraceExtIn0 + else if (((p00 = (( 5 :: int)::ii)))) then CrossTriggerOut_TraceExtIn1 + else if (((p00 = (( 6 :: int)::ii)))) then CrossTriggerOut_TraceExtIn2 else CrossTriggerOut_TraceExtIn3))" @@ -1404,14 +1443,14 @@ definition undefined_CrossTriggerOut :: " unit \<Rightarrow>((register_value),( definition CrossTriggerIn_of_num :: " int \<Rightarrow> CrossTriggerIn " where " CrossTriggerIn_of_num arg0 = ( - (let l__390 = arg0 in - if (((l__390 = (( 0 :: int)::ii)))) then CrossTriggerIn_CrossHalt - else if (((l__390 = (( 1 :: int)::ii)))) then CrossTriggerIn_PMUOverflow - else if (((l__390 = (( 2 :: int)::ii)))) then CrossTriggerIn_RSVD2 - else if (((l__390 = (( 3 :: int)::ii)))) then CrossTriggerIn_RSVD3 - else if (((l__390 = (( 4 :: int)::ii)))) then CrossTriggerIn_TraceExtOut0 - else if (((l__390 = (( 5 :: int)::ii)))) then CrossTriggerIn_TraceExtOut1 - else if (((l__390 = (( 6 :: int)::ii)))) then CrossTriggerIn_TraceExtOut2 + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then CrossTriggerIn_CrossHalt + else if (((p00 = (( 1 :: int)::ii)))) then CrossTriggerIn_PMUOverflow + else if (((p00 = (( 2 :: int)::ii)))) then CrossTriggerIn_RSVD2 + else if (((p00 = (( 3 :: int)::ii)))) then CrossTriggerIn_RSVD3 + else if (((p00 = (( 4 :: int)::ii)))) then CrossTriggerIn_TraceExtOut0 + else if (((p00 = (( 5 :: int)::ii)))) then CrossTriggerIn_TraceExtOut1 + else if (((p00 = (( 6 :: int)::ii)))) then CrossTriggerIn_TraceExtOut2 else CrossTriggerIn_TraceExtOut3))" @@ -1440,9 +1479,9 @@ definition undefined_CrossTriggerIn :: " unit \<Rightarrow>((register_value),(C definition MemBarrierOp_of_num :: " int \<Rightarrow> MemBarrierOp " where " MemBarrierOp_of_num arg0 = ( - (let l__388 = arg0 in - if (((l__388 = (( 0 :: int)::ii)))) then MemBarrierOp_DSB - else if (((l__388 = (( 1 :: int)::ii)))) then MemBarrierOp_DMB + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then MemBarrierOp_DSB + else if (((p00 = (( 1 :: int)::ii)))) then MemBarrierOp_DMB else MemBarrierOp_ISB))" @@ -1518,10 +1557,10 @@ definition undefined_TLBRecord :: " unit \<Rightarrow>((register_value),(TLBRec definition ImmediateOp_of_num :: " int \<Rightarrow> ImmediateOp " where " ImmediateOp_of_num arg0 = ( - (let l__385 = arg0 in - if (((l__385 = (( 0 :: int)::ii)))) then ImmediateOp_MOVI - else if (((l__385 = (( 1 :: int)::ii)))) then ImmediateOp_MVNI - else if (((l__385 = (( 2 :: int)::ii)))) then ImmediateOp_ORR + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then ImmediateOp_MOVI + else if (((p00 = (( 1 :: int)::ii)))) then ImmediateOp_MVNI + else if (((p00 = (( 2 :: int)::ii)))) then ImmediateOp_ORR else ImmediateOp_BIC))" @@ -1545,9 +1584,9 @@ definition undefined_ImmediateOp :: " unit \<Rightarrow>((register_value),(Imme definition MoveWideOp_of_num :: " int \<Rightarrow> MoveWideOp " where " MoveWideOp_of_num arg0 = ( - (let l__383 = arg0 in - if (((l__383 = (( 0 :: int)::ii)))) then MoveWideOp_N - else if (((l__383 = (( 1 :: int)::ii)))) then MoveWideOp_Z + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then MoveWideOp_N + else if (((p00 = (( 1 :: int)::ii)))) then MoveWideOp_Z else MoveWideOp_K))" @@ -1569,9 +1608,9 @@ definition undefined_MoveWideOp :: " unit \<Rightarrow>((register_value),(MoveW definition SystemAccessType_of_num :: " int \<Rightarrow> SystemAccessType " where " SystemAccessType_of_num arg0 = ( - (let l__381 = arg0 in - if (((l__381 = (( 0 :: int)::ii)))) then SystemAccessType_RT - else if (((l__381 = (( 1 :: int)::ii)))) then SystemAccessType_RRT + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then SystemAccessType_RT + else if (((p00 = (( 1 :: int)::ii)))) then SystemAccessType_RRT else SystemAccessType_DT))" @@ -1594,10 +1633,10 @@ definition undefined_SystemAccessType :: " unit \<Rightarrow>((register_value), definition VBitOp_of_num :: " int \<Rightarrow> VBitOp " where " VBitOp_of_num arg0 = ( - (let l__378 = arg0 in - if (((l__378 = (( 0 :: int)::ii)))) then VBitOp_VBIF - else if (((l__378 = (( 1 :: int)::ii)))) then VBitOp_VBIT - else if (((l__378 = (( 2 :: int)::ii)))) then VBitOp_VBSL + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then VBitOp_VBIF + else if (((p00 = (( 1 :: int)::ii)))) then VBitOp_VBIT + else if (((p00 = (( 2 :: int)::ii)))) then VBitOp_VBSL else VBitOp_VEOR))" @@ -1620,9 +1659,9 @@ definition undefined_VBitOp :: " unit \<Rightarrow>((register_value),(VBitOp),( definition TimeStamp_of_num :: " int \<Rightarrow> TimeStamp " where " TimeStamp_of_num arg0 = ( - (let l__376 = arg0 in - if (((l__376 = (( 0 :: int)::ii)))) then TimeStamp_None - else if (((l__376 = (( 1 :: int)::ii)))) then TimeStamp_Virtual + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then TimeStamp_None + else if (((p00 = (( 1 :: int)::ii)))) then TimeStamp_Virtual else TimeStamp_Physical))" @@ -1644,10 +1683,10 @@ definition undefined_TimeStamp :: " unit \<Rightarrow>((register_value),(TimeSt definition PrivilegeLevel_of_num :: " int \<Rightarrow> PrivilegeLevel " where " PrivilegeLevel_of_num arg0 = ( - (let l__373 = arg0 in - if (((l__373 = (( 0 :: int)::ii)))) then PL3 - else if (((l__373 = (( 1 :: int)::ii)))) then PL2 - else if (((l__373 = (( 2 :: int)::ii)))) then PL1 + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then PL3 + else if (((p00 = (( 1 :: int)::ii)))) then PL2 + else if (((p00 = (( 2 :: int)::ii)))) then PL1 else PL0))" @@ -1680,11 +1719,11 @@ definition undefined_AArch32_SErrorSyndrome :: " unit \<Rightarrow>((register_v definition SystemOp_of_num :: " int \<Rightarrow> SystemOp " where " SystemOp_of_num arg0 = ( - (let l__369 = arg0 in - if (((l__369 = (( 0 :: int)::ii)))) then Sys_AT - else if (((l__369 = (( 1 :: int)::ii)))) then Sys_DC - else if (((l__369 = (( 2 :: int)::ii)))) then Sys_IC - else if (((l__369 = (( 3 :: int)::ii)))) then Sys_TLBI + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then Sys_AT + else if (((p00 = (( 1 :: int)::ii)))) then Sys_DC + else if (((p00 = (( 2 :: int)::ii)))) then Sys_IC + else if (((p00 = (( 3 :: int)::ii)))) then Sys_TLBI else Sys_SYS))" @@ -1730,12 +1769,12 @@ definition undefined_PCSample :: " unit \<Rightarrow>((register_value),(PCSampl definition ReduceOp_of_num :: " int \<Rightarrow> ReduceOp " where " ReduceOp_of_num arg0 = ( - (let l__364 = arg0 in - if (((l__364 = (( 0 :: int)::ii)))) then ReduceOp_FMINNUM - else if (((l__364 = (( 1 :: int)::ii)))) then ReduceOp_FMAXNUM - else if (((l__364 = (( 2 :: int)::ii)))) then ReduceOp_FMIN - else if (((l__364 = (( 3 :: int)::ii)))) then ReduceOp_FMAX - else if (((l__364 = (( 4 :: int)::ii)))) then ReduceOp_FADD + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then ReduceOp_FMINNUM + else if (((p00 = (( 1 :: int)::ii)))) then ReduceOp_FMAXNUM + else if (((p00 = (( 2 :: int)::ii)))) then ReduceOp_FMIN + else if (((p00 = (( 3 :: int)::ii)))) then ReduceOp_FMAX + else if (((p00 = (( 4 :: int)::ii)))) then ReduceOp_FADD else ReduceOp_ADD))" @@ -1762,9 +1801,9 @@ definition undefined_ReduceOp :: " unit \<Rightarrow>((register_value),(ReduceO definition LogicalOp_of_num :: " int \<Rightarrow> LogicalOp " where " LogicalOp_of_num arg0 = ( - (let l__362 = arg0 in - if (((l__362 = (( 0 :: int)::ii)))) then LogicalOp_AND - else if (((l__362 = (( 1 :: int)::ii)))) then LogicalOp_EOR + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then LogicalOp_AND + else if (((p00 = (( 1 :: int)::ii)))) then LogicalOp_EOR else LogicalOp_ORR))" @@ -1786,14 +1825,14 @@ definition undefined_LogicalOp :: " unit \<Rightarrow>((register_value),(Logica definition ExtendType_of_num :: " int \<Rightarrow> ExtendType " where " ExtendType_of_num arg0 = ( - (let l__355 = arg0 in - if (((l__355 = (( 0 :: int)::ii)))) then ExtendType_SXTB - else if (((l__355 = (( 1 :: int)::ii)))) then ExtendType_SXTH - else if (((l__355 = (( 2 :: int)::ii)))) then ExtendType_SXTW - else if (((l__355 = (( 3 :: int)::ii)))) then ExtendType_SXTX - else if (((l__355 = (( 4 :: int)::ii)))) then ExtendType_UXTB - else if (((l__355 = (( 5 :: int)::ii)))) then ExtendType_UXTH - else if (((l__355 = (( 6 :: int)::ii)))) then ExtendType_UXTW + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then ExtendType_SXTB + else if (((p00 = (( 1 :: int)::ii)))) then ExtendType_SXTH + else if (((p00 = (( 2 :: int)::ii)))) then ExtendType_SXTW + else if (((p00 = (( 3 :: int)::ii)))) then ExtendType_SXTX + else if (((p00 = (( 4 :: int)::ii)))) then ExtendType_UXTB + else if (((p00 = (( 5 :: int)::ii)))) then ExtendType_UXTH + else if (((p00 = (( 6 :: int)::ii)))) then ExtendType_UXTW else ExtendType_UXTX))" @@ -1822,14 +1861,14 @@ definition undefined_ExtendType :: " unit \<Rightarrow>((register_value),(Exten definition SystemHintOp_of_num :: " int \<Rightarrow> SystemHintOp " where " SystemHintOp_of_num arg0 = ( - (let l__348 = arg0 in - if (((l__348 = (( 0 :: int)::ii)))) then SystemHintOp_NOP - else if (((l__348 = (( 1 :: int)::ii)))) then SystemHintOp_YIELD - else if (((l__348 = (( 2 :: int)::ii)))) then SystemHintOp_WFE - else if (((l__348 = (( 3 :: int)::ii)))) then SystemHintOp_WFI - else if (((l__348 = (( 4 :: int)::ii)))) then SystemHintOp_SEV - else if (((l__348 = (( 5 :: int)::ii)))) then SystemHintOp_SEVL - else if (((l__348 = (( 6 :: int)::ii)))) then SystemHintOp_ESB + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then SystemHintOp_NOP + else if (((p00 = (( 1 :: int)::ii)))) then SystemHintOp_YIELD + else if (((p00 = (( 2 :: int)::ii)))) then SystemHintOp_WFE + else if (((p00 = (( 3 :: int)::ii)))) then SystemHintOp_WFI + else if (((p00 = (( 4 :: int)::ii)))) then SystemHintOp_SEV + else if (((p00 = (( 5 :: int)::ii)))) then SystemHintOp_SEVL + else if (((p00 = (( 6 :: int)::ii)))) then SystemHintOp_ESB else SystemHintOp_PSB))" @@ -1858,9 +1897,9 @@ definition undefined_SystemHintOp :: " unit \<Rightarrow>((register_value),(Sys definition MemOp_of_num :: " int \<Rightarrow> MemOp " where " MemOp_of_num arg0 = ( - (let l__346 = arg0 in - if (((l__346 = (( 0 :: int)::ii)))) then MemOp_LOAD - else if (((l__346 = (( 1 :: int)::ii)))) then MemOp_STORE + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then MemOp_LOAD + else if (((p00 = (( 1 :: int)::ii)))) then MemOp_STORE else MemOp_PREFETCH))" @@ -1882,11 +1921,11 @@ definition undefined_MemOp :: " unit \<Rightarrow>((register_value),(MemOp),(ex definition OpType_of_num :: " int \<Rightarrow> OpType " where " OpType_of_num arg0 = ( - (let l__342 = arg0 in - if (((l__342 = (( 0 :: int)::ii)))) then OpType_Load - else if (((l__342 = (( 1 :: int)::ii)))) then OpType_Store - else if (((l__342 = (( 2 :: int)::ii)))) then OpType_LoadAtomic - else if (((l__342 = (( 3 :: int)::ii)))) then OpType_Branch + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then OpType_Load + else if (((p00 = (( 1 :: int)::ii)))) then OpType_Store + else if (((p00 = (( 2 :: int)::ii)))) then OpType_LoadAtomic + else if (((p00 = (( 3 :: int)::ii)))) then OpType_Branch else OpType_Other))" @@ -1911,10 +1950,10 @@ definition undefined_OpType :: " unit \<Rightarrow>((register_value),(OpType),( definition FPUnaryOp_of_num :: " int \<Rightarrow> FPUnaryOp " where " FPUnaryOp_of_num arg0 = ( - (let l__339 = arg0 in - if (((l__339 = (( 0 :: int)::ii)))) then FPUnaryOp_ABS - else if (((l__339 = (( 1 :: int)::ii)))) then FPUnaryOp_MOV - else if (((l__339 = (( 2 :: int)::ii)))) then FPUnaryOp_NEG + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then FPUnaryOp_ABS + else if (((p00 = (( 1 :: int)::ii)))) then FPUnaryOp_MOV + else if (((p00 = (( 2 :: int)::ii)))) then FPUnaryOp_NEG else FPUnaryOp_SQRT))" @@ -1938,11 +1977,11 @@ definition undefined_FPUnaryOp :: " unit \<Rightarrow>((register_value),(FPUnar definition CompareOp_of_num :: " int \<Rightarrow> CompareOp " where " CompareOp_of_num arg0 = ( - (let l__335 = arg0 in - if (((l__335 = (( 0 :: int)::ii)))) then CompareOp_GT - else if (((l__335 = (( 1 :: int)::ii)))) then CompareOp_GE - else if (((l__335 = (( 2 :: int)::ii)))) then CompareOp_EQ - else if (((l__335 = (( 3 :: int)::ii)))) then CompareOp_LE + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then CompareOp_GT + else if (((p00 = (( 1 :: int)::ii)))) then CompareOp_GE + else if (((p00 = (( 2 :: int)::ii)))) then CompareOp_EQ + else if (((p00 = (( 3 :: int)::ii)))) then CompareOp_LE else CompareOp_LT))" @@ -1967,11 +2006,11 @@ definition undefined_CompareOp :: " unit \<Rightarrow>((register_value),(Compar definition PSTATEField_of_num :: " int \<Rightarrow> PSTATEField " where " PSTATEField_of_num arg0 = ( - (let l__331 = arg0 in - if (((l__331 = (( 0 :: int)::ii)))) then PSTATEField_DAIFSet - else if (((l__331 = (( 1 :: int)::ii)))) then PSTATEField_DAIFClr - else if (((l__331 = (( 2 :: int)::ii)))) then PSTATEField_PAN - else if (((l__331 = (( 3 :: int)::ii)))) then PSTATEField_UAO + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then PSTATEField_DAIFSet + else if (((p00 = (( 1 :: int)::ii)))) then PSTATEField_DAIFClr + else if (((p00 = (( 2 :: int)::ii)))) then PSTATEField_PAN + else if (((p00 = (( 3 :: int)::ii)))) then PSTATEField_UAO else PSTATEField_SP))" @@ -1997,10 +2036,10 @@ definition undefined_PSTATEField :: " unit \<Rightarrow>((register_value),(PSTA definition FPMaxMinOp_of_num :: " int \<Rightarrow> FPMaxMinOp " where " FPMaxMinOp_of_num arg0 = ( - (let l__328 = arg0 in - if (((l__328 = (( 0 :: int)::ii)))) then FPMaxMinOp_MAX - else if (((l__328 = (( 1 :: int)::ii)))) then FPMaxMinOp_MIN - else if (((l__328 = (( 2 :: int)::ii)))) then FPMaxMinOp_MAXNUM + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then FPMaxMinOp_MAX + else if (((p00 = (( 1 :: int)::ii)))) then FPMaxMinOp_MIN + else if (((p00 = (( 2 :: int)::ii)))) then FPMaxMinOp_MAXNUM else FPMaxMinOp_MINNUM))" @@ -2024,9 +2063,9 @@ definition undefined_FPMaxMinOp :: " unit \<Rightarrow>((register_value),(FPMax definition CountOp_of_num :: " int \<Rightarrow> CountOp " where " CountOp_of_num arg0 = ( - (let l__326 = arg0 in - if (((l__326 = (( 0 :: int)::ii)))) then CountOp_CLZ - else if (((l__326 = (( 1 :: int)::ii)))) then CountOp_CLS + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then CountOp_CLZ + else if (((p00 = (( 1 :: int)::ii)))) then CountOp_CLS else CountOp_CNT))" @@ -2048,9 +2087,9 @@ definition undefined_CountOp :: " unit \<Rightarrow>((register_value),(CountOp) definition VFPNegMul_of_num :: " int \<Rightarrow> VFPNegMul " where " VFPNegMul_of_num arg0 = ( - (let l__324 = arg0 in - if (((l__324 = (( 0 :: int)::ii)))) then VFPNegMul_VNMLA - else if (((l__324 = (( 1 :: int)::ii)))) then VFPNegMul_VNMLS + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then VFPNegMul_VNMLA + else if (((p00 = (( 1 :: int)::ii)))) then VFPNegMul_VNMLS else VFPNegMul_VNMUL))" @@ -2072,9 +2111,9 @@ definition undefined_VFPNegMul :: " unit \<Rightarrow>((register_value),(VFPNeg definition VBitOps_of_num :: " int \<Rightarrow> VBitOps " where " VBitOps_of_num arg0 = ( - (let l__322 = arg0 in - if (((l__322 = (( 0 :: int)::ii)))) then VBitOps_VBIF - else if (((l__322 = (( 1 :: int)::ii)))) then VBitOps_VBIT + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then VBitOps_VBIF + else if (((p00 = (( 1 :: int)::ii)))) then VBitOps_VBIT else VBitOps_VBSL))" @@ -2096,9 +2135,9 @@ definition undefined_VBitOps :: " unit \<Rightarrow>((register_value),(VBitOps) definition VCGEtype_of_num :: " int \<Rightarrow> VCGEtype " where " VCGEtype_of_num arg0 = ( - (let l__320 = arg0 in - if (((l__320 = (( 0 :: int)::ii)))) then VCGEtype_signed - else if (((l__320 = (( 1 :: int)::ii)))) then VCGEtype_unsigned + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then VCGEtype_signed + else if (((p00 = (( 1 :: int)::ii)))) then VCGEtype_unsigned else VCGEtype_fp))" @@ -2120,9 +2159,9 @@ definition undefined_VCGEtype :: " unit \<Rightarrow>((register_value),(VCGEtyp definition VCGTtype_of_num :: " int \<Rightarrow> VCGTtype " where " VCGTtype_of_num arg0 = ( - (let l__318 = arg0 in - if (((l__318 = (( 0 :: int)::ii)))) then VCGTtype_signed - else if (((l__318 = (( 1 :: int)::ii)))) then VCGTtype_unsigned + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then VCGTtype_signed + else if (((p00 = (( 1 :: int)::ii)))) then VCGTtype_unsigned else VCGTtype_fp))" @@ -2144,10 +2183,10 @@ definition undefined_VCGTtype :: " unit \<Rightarrow>((register_value),(VCGTtyp definition InstrEnc_of_num :: " int \<Rightarrow> InstrEnc " where " InstrEnc_of_num arg0 = ( - (let l__315 = arg0 in - if (((l__315 = (( 0 :: int)::ii)))) then A64 - else if (((l__315 = (( 1 :: int)::ii)))) then A32 - else if (((l__315 = (( 2 :: int)::ii)))) then T16 + (let p00 = arg0 in + if (((p00 = (( 0 :: int)::ii)))) then A64 + else if (((p00 = (( 1 :: int)::ii)))) then A32 + else if (((p00 = (( 2 :: int)::ii)))) then T16 else T32))" @@ -2203,7 +2242,7 @@ definition UndefinedFault :: " unit \<Rightarrow>((register_value),(unit),(exce definition ThisInstrAddr :: " int \<Rightarrow> unit \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " ThisInstrAddr (N__tv :: int) _ = ( (read_reg PC_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . - return ((slice0 w__0 (( 0 :: int)::ii) N__tv :: ( 'N::len)Word.word))))" + return ((slice w__0 (( 0 :: int)::ii) N__tv :: ( 'N::len)Word.word))))" (*val ThisInstr : unit -> M (mword ty32)*) @@ -2266,52 +2305,52 @@ definition PACCellShuffle :: "(64)Word.word \<Rightarrow>((register_value),((64 " PACCellShuffle indata = ( (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) \<bind> (\<lambda> (outdata :: 64 bits) . (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) ((slice0 indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) ((slice indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice0 indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) ((slice0 indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) ((slice indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice0 indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) ((slice0 indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) ((slice indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice0 indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) ((slice0 indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) ((slice indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) ((slice0 indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) ((slice indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) ((slice0 indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) ((slice indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) ((slice0 indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) ((slice indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) ((slice0 indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) ((slice indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) ((slice0 indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) ((slice indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) ((slice0 indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) ((slice indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice0 indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) ((slice0 indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) ((slice indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) ((slice0 indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) ((slice indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in return outdata))))))))))))))))))" @@ -2322,52 +2361,52 @@ definition PACCellInvShuffle :: "(64)Word.word \<Rightarrow>((register_value),( " PACCellInvShuffle indata = ( (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) \<bind> (\<lambda> (outdata :: 64 bits) . (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) ((slice0 indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) ((slice indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice0 indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) ((slice0 indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) ((slice indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice0 indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) ((slice0 indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) ((slice indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice0 indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) ((slice0 indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) ((slice indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) ((slice0 indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) ((slice indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) ((slice0 indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) ((slice indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) ((slice0 indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) ((slice indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) ((slice0 indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) ((slice indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) ((slice0 indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) ((slice indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) ((slice0 indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) ((slice indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice0 indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) ((slice0 indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) ((slice indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) ((slice0 indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) ((slice indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in return outdata))))))))))))))))))" @@ -2584,7 +2623,7 @@ definition FPDecodeRounding :: "(2)Word.word \<Rightarrow> FPRounding " where (*val FPRoundingMode : mword ty32 -> FPRounding*) definition FPRoundingMode :: "(32)Word.word \<Rightarrow> FPRounding " where - " FPRoundingMode fpcr = ( FPDecodeRounding ((slice0 fpcr (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)))" + " FPRoundingMode fpcr = ( FPDecodeRounding ((slice fpcr (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)))" (*val __UNKNOWN_FPConvOp : unit -> FPConvOp*) @@ -2725,21 +2764,21 @@ definition TweakCellRot :: "(4)Word.word \<Rightarrow>((register_value),((4)Wor " TweakCellRot incell_name = ( (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (outcell :: 4 bits) . (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 3 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 3 :: int)::ii) ((xor_vec (vec_of_bits [access_vec_dec incell_name (( 0 :: int)::ii)] :: 1 Word.word) (vec_of_bits [access_vec_dec incell_name (( 1 :: int)::ii)] :: 1 Word.word) :: 1 Word.word)) :: 4 Word.word)) in (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 2 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 2 :: int)::ii) (vec_of_bits [access_vec_dec incell_name (( 3 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 1 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 1 :: int)::ii) (vec_of_bits [access_vec_dec incell_name (( 2 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 0 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 0 :: int)::ii) (vec_of_bits [access_vec_dec incell_name (( 1 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in return outcell))))))" @@ -2751,53 +2790,53 @@ definition TweakShuffle :: "(64)Word.word \<Rightarrow>((register_value),((64)W " TweakShuffle indata = ( (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) \<bind> (\<lambda> (outdata :: 64 bits) . (let (outdata :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) ((slice0 indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) ((slice indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice0 indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellRot ((slice0 indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__0 :: + (TweakCellRot ((slice indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__0 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) w__0 :: 64 Word.word)) in + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) w__0 :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice0 indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellRot ((slice0 indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__1 :: + (TweakCellRot ((slice indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__1 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) w__1 :: 64 Word.word)) in + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) w__1 :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice0 indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) ((slice0 indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) ((slice indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellRot ((slice0 indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__2 :: + (TweakCellRot ((slice indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__2 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) w__2 :: 64 Word.word)) in + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) w__2 :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) ((slice0 indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) ((slice indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) ((slice0 indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) ((slice indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) ((slice0 indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) ((slice indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellRot ((slice0 indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__3 :: + (TweakCellRot ((slice indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__3 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) w__3 :: 64 Word.word)) in - (TweakCellRot ((slice0 indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__4 :: + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) w__3 :: 64 Word.word)) in + (TweakCellRot ((slice indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__4 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) w__4 :: 64 Word.word)) in + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) w__4 :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice0 indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellRot ((slice0 indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__5 :: + (TweakCellRot ((slice indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__5 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) w__5 :: 64 Word.word)) in - (TweakCellRot ((slice0 indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__6 :: + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) w__5 :: 64 Word.word)) in + (TweakCellRot ((slice indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__6 :: 4 Word.word) . - (let (outdata :: 64 bits) = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) w__6 :: 64 Word.word)) in + (let (outdata :: 64 bits) = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) w__6 :: 64 Word.word)) in return outdata)))))))))))))))))))))))))" @@ -2807,19 +2846,19 @@ definition TweakCellInvRot :: "(4)Word.word \<Rightarrow>((register_value),((4) " TweakCellInvRot incell_name = ( (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (outcell :: 4 bits) . (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 3 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 3 :: int)::ii) (vec_of_bits [access_vec_dec incell_name (( 2 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 2 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 2 :: int)::ii) (vec_of_bits [access_vec_dec incell_name (( 1 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 1 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 1 :: int)::ii) (vec_of_bits [access_vec_dec incell_name (( 0 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in (let (outcell :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 0 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) outcell (( 0 :: int)::ii) ((xor_vec (vec_of_bits [access_vec_dec incell_name (( 0 :: int)::ii)] :: 1 Word.word) (vec_of_bits [access_vec_dec incell_name (( 3 :: int)::ii)] :: 1 Word.word) :: 1 Word.word)) @@ -2832,54 +2871,54 @@ definition TweakCellInvRot :: "(4)Word.word \<Rightarrow>((register_value),((4) definition TweakInvShuffle :: "(64)Word.word \<Rightarrow>((register_value),((64)Word.word),(exception))monad " where " TweakInvShuffle indata = ( (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) \<bind> (\<lambda> (outdata :: 64 bits) . - (TweakCellInvRot ((slice0 indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__0 :: + (TweakCellInvRot ((slice indata (( 48 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__0 :: 4 Word.word) . - (let (outdata :: 64 bits) = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) w__0 :: 64 Word.word)) in + (let (outdata :: 64 bits) = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 0 :: int)::ii) w__0 :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice0 indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 4 :: int)::ii) ((slice indata (( 52 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) ((slice0 indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 8 :: int)::ii) ((slice indata (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice0 indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 12 :: int)::ii) ((slice indata (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) ((slice0 indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 16 :: int)::ii) ((slice indata (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice0 indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 20 :: int)::ii) ((slice indata (( 4 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellInvRot ((slice0 indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__1 :: + (TweakCellInvRot ((slice indata (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__1 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) w__1 :: 64 Word.word)) in + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 24 :: int)::ii) w__1 :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) ((slice0 indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 28 :: int)::ii) ((slice indata (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellInvRot ((slice0 indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__2 :: + (TweakCellInvRot ((slice indata (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__2 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) w__2 :: 64 Word.word)) in - (TweakCellInvRot ((slice0 indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__3 :: + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 32 :: int)::ii) w__2 :: 64 Word.word)) in + (TweakCellInvRot ((slice indata (( 60 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__3 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) w__3 :: 64 Word.word)) in - (TweakCellInvRot ((slice0 indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__4 :: + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 36 :: int)::ii) w__3 :: 64 Word.word)) in + (TweakCellInvRot ((slice indata (( 56 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__4 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) w__4 :: 64 Word.word)) in - (TweakCellInvRot ((slice0 indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__5 :: + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 40 :: int)::ii) w__4 :: 64 Word.word)) in + (TweakCellInvRot ((slice indata (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__5 :: 4 Word.word) . - (let outdata = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) w__5 :: 64 Word.word)) in + (let outdata = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 44 :: int)::ii) w__5 :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) ((slice0 indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 48 :: int)::ii) ((slice indata (( 32 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice0 indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 52 :: int)::ii) ((slice indata (( 36 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let outdata = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) ((slice0 indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 56 :: int)::ii) ((slice indata (( 40 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - (TweakCellInvRot ((slice0 indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__6 :: + (TweakCellInvRot ((slice indata (( 44 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__6 :: 4 Word.word) . - (let (outdata :: 64 bits) = ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) w__6 :: 64 Word.word)) in + (let (outdata :: 64 bits) = ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) outdata (( 60 :: int)::ii) w__6 :: 64 Word.word)) in return outdata)))))))))))))))))))))))))" @@ -3197,7 +3236,7 @@ definition AArch64_SysRegWrite :: " int \<Rightarrow> int \<Rightarrow> int \<R definition AArch64_SysRegRead :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow>((register_value),((64)Word.word),(exception))monad " where " AArch64_SysRegRead arg0 arg1 arg2 arg3 arg4 = ( - (let g__614 = (arg0, arg1, arg2, arg3, arg4) in + (let g__301 = (arg0, arg1, arg2, arg3, arg4) in assert_exp False (''Tried to read system register'') \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M)))" @@ -3220,13 +3259,13 @@ definition AArch64_ReportDeferredSError :: "(25)Word.word \<Rightarrow>((regist " AArch64_ReportDeferredSError syndrome = ( (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) \<bind> (\<lambda> (target :: 64 bits) . (let (target :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) target (( 31 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word)) in + ((set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) target (( 31 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word)) in (let (target :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) target (( 24 :: int)::ii) + ((set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) target (( 24 :: int)::ii) (vec_of_bits [access_vec_dec syndrome (( 24 :: int)::ii)] :: 1 Word.word) :: 64 Word.word)) in (let (target :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 24 :: int)::ii) target (( 0 :: int)::ii) ((slice0 syndrome (( 0 :: int)::ii) (( 24 :: int)::ii) :: 24 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 24 :: int)::ii) target (( 0 :: int)::ii) ((slice syndrome (( 0 :: int)::ii) (( 24 :: int)::ii) :: 24 Word.word)) :: 64 Word.word)) in return target)))))" @@ -3382,23 +3421,23 @@ definition aget_SP :: " int \<Rightarrow> unit \<Rightarrow>((register_value),( read_reg PSTATE_ref) \<bind> (\<lambda> (w__0 :: ProcState) . if ((((ProcState_SP w__0) = (vec_of_bits [B0] :: 1 Word.word)))) then (read_reg SP_EL0_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . - return ((slice0 w__1 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) + return ((slice w__1 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) else read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (let p__613 = ((ProcState_EL w__2)) in - (let pat0 = p__613 in + (let p__300 = ((ProcState_EL w__2)) in + (let pat0 = p__300 in if (((pat0 = EL0))) then (read_reg SP_EL0_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . - return ((slice0 w__3 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) + return ((slice w__3 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) else if (((pat0 = EL1))) then (read_reg SP_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__4 :: 64 bits) . - return ((slice0 w__4 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) + return ((slice w__4 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) else if (((pat0 = EL2))) then (read_reg SP_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . - return ((slice0 w__5 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) + return ((slice w__5 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) else (read_reg SP_EL3_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__6 :: 64 bits) . - return ((slice0 w__6 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))))))))" + return ((slice w__6 (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))))))))" (*val __IMPDEF_integer : string -> ii*) @@ -3473,7 +3512,7 @@ definition RoundTowardsZero :: " real \<Rightarrow> int " where definition Restarting :: " unit \<Rightarrow>((register_value),(bool),(exception))monad " where " Restarting _ = ( (read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__0 :: 32 bits) . - return (((((slice0 w__0 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)) = (vec_of_bits [B0,B0,B0,B0,B0,B1] :: 6 Word.word))))))" + return (((((slice w__0 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)) = (vec_of_bits [B0,B0,B0,B0,B0,B1] :: 6 Word.word))))))" (*val PtrHasUpperAndLowerAddRanges : unit -> M bool*) @@ -3770,12 +3809,12 @@ definition aget_Vpart :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow (if (((part = (( 0 :: int)::ii)))) then (assert_exp ((((((width__tv = (( 8 :: int)::ii)))) \<or> ((((((width__tv = (( 16 :: int)::ii)))) \<or> ((((((width__tv = (( 32 :: int)::ii)))) \<or> (((width__tv = (( 64 :: int)::ii))))))))))))) (''((width == 8) || ((width == 16) || ((width == 32) || (width == 64))))'') \<then> read_reg V_ref) \<bind> (\<lambda> (w__0 :: ( 128 bits) list) . - return ((slice0 ((access_list_dec w__0 n :: 128 Word.word)) (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) + return ((slice ((access_list_dec w__0 n :: 128 Word.word)) (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) else (assert_exp (((width__tv = (( 64 :: int)::ii)))) (''(width == 64)'') \<then> read_reg V_ref) \<bind> (\<lambda> (w__1 :: ( 128 bits) list) . return ((Word.ucast - ((slice0 ((access_list_dec w__1 n :: 128 Word.word)) (( 64 :: int)::ii) (( 64 :: int)::ii) :: ( 'width::len)Word.word)) + ((slice ((access_list_dec w__1 n :: 128 Word.word)) (( 64 :: int)::ii) (( 64 :: int)::ii) :: ( 'width::len)Word.word)) :: ( 'width::len)Word.word)))))" @@ -3786,7 +3825,7 @@ definition aget_V :: " int \<Rightarrow> int \<Rightarrow>((register_value),((' ((assert_exp (((((n \<ge> (( 0 :: int)::ii))) \<and> ((n \<le> (( 31 :: int)::ii)))))) (''((n >= 0) && (n <= 31))'') \<then> assert_exp ((((((width__tv = (( 8 :: int)::ii)))) \<or> ((((((width__tv = (( 16 :: int)::ii)))) \<or> ((((((width__tv = (( 32 :: int)::ii)))) \<or> ((((((width__tv = (( 64 :: int)::ii)))) \<or> (((width__tv = (( 128 :: int)::ii)))))))))))))))) (''((width == 8) || ((width == 16) || ((width == 32) || ((width == 64) || (width == 128)))))'')) \<then> read_reg V_ref) \<bind> (\<lambda> (w__0 :: ( 128 bits) list) . - return ((slice0 ((access_list_dec w__0 n :: 128 Word.word)) (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))))" + return ((slice ((access_list_dec w__0 n :: 128 Word.word)) (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))))" (*val LookUpRIndex : ii -> mword ty5 -> M ii*) @@ -3795,19 +3834,18 @@ definition LookUpRIndex :: " int \<Rightarrow>(5)Word.word \<Rightarrow>((regis " LookUpRIndex n mode = ( (assert_exp (((((n \<ge> (( 0 :: int)::ii))) \<and> ((n \<le> (( 14 :: int)::ii)))))) (''((n >= 0) && (n <= 14))'') \<then> undefined_int () ) \<bind> (\<lambda> (result :: ii) . - (let l__308 = n in - if (((l__308 = (( 8 :: int)::ii)))) then RBankSelect mode (( 8 :: int)::ii) (( 24 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) - else if (((l__308 = (( 9 :: int)::ii)))) then - RBankSelect mode (( 9 :: int)::ii) (( 25 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) - else if (((l__308 = (( 10 :: int)::ii)))) then + (let p00 = n in + if (((p00 = (( 8 :: int)::ii)))) then RBankSelect mode (( 8 :: int)::ii) (( 24 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) (( 8 :: int)::ii) + else if (((p00 = (( 9 :: int)::ii)))) then RBankSelect mode (( 9 :: int)::ii) (( 25 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) (( 9 :: int)::ii) + else if (((p00 = (( 10 :: int)::ii)))) then RBankSelect mode (( 10 :: int)::ii) (( 26 :: int)::ii) (( 10 :: int)::ii) (( 10 :: int)::ii) (( 10 :: int)::ii) (( 10 :: int)::ii) (( 10 :: int)::ii) - else if (((l__308 = (( 11 :: int)::ii)))) then + else if (((p00 = (( 11 :: int)::ii)))) then RBankSelect mode (( 11 :: int)::ii) (( 27 :: int)::ii) (( 11 :: int)::ii) (( 11 :: int)::ii) (( 11 :: int)::ii) (( 11 :: int)::ii) (( 11 :: int)::ii) - else if (((l__308 = (( 12 :: int)::ii)))) then + else if (((p00 = (( 12 :: int)::ii)))) then RBankSelect mode (( 12 :: int)::ii) (( 28 :: int)::ii) (( 12 :: int)::ii) (( 12 :: int)::ii) (( 12 :: int)::ii) (( 12 :: int)::ii) (( 12 :: int)::ii) - else if (((l__308 = (( 13 :: int)::ii)))) then + else if (((p00 = (( 13 :: int)::ii)))) then RBankSelect mode (( 13 :: int)::ii) (( 29 :: int)::ii) (( 17 :: int)::ii) (( 19 :: int)::ii) (( 21 :: int)::ii) (( 23 :: int)::ii) (( 15 :: int)::ii) - else if (((l__308 = (( 14 :: int)::ii)))) then + else if (((p00 = (( 14 :: int)::ii)))) then RBankSelect mode (( 14 :: int)::ii) (( 30 :: int)::ii) (( 16 :: int)::ii) (( 18 :: int)::ii) (( 20 :: int)::ii) (( 22 :: int)::ii) (( 14 :: int)::ii) else return n)))" @@ -3851,7 +3889,7 @@ definition BitReverse :: "('N::len)Word.word \<Rightarrow>((register_value),((' (let (result :: 'N bits) = (foreach (index_list (( 0 :: int)::ii) ((((int (size data))) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result (\<lambda> i result . - (set_slice0 ((int (size data))) (( 1 :: int)::ii) result + (set_slice ((int (size data))) (( 1 :: int)::ii) result ((((((int (size data))) - i)) - (( 1 :: int)::ii))) (vec_of_bits [access_vec_dec data i] :: 1 Word.word) :: ( 'N::len)Word.word))) in @@ -3864,7 +3902,7 @@ definition NextInstrAddr :: " int \<Rightarrow> unit \<Rightarrow>((register_va " NextInstrAddr (N__tv :: int) _ = ( (read_reg PC_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . ThisInstrLength () \<bind> (\<lambda> (w__1 :: ii) . - return ((slice0 ((add_vec_int w__0 ((((ex_int w__1)) div (( 8 :: int)::ii))) :: 64 Word.word)) (( 0 :: int)::ii) + return ((slice ((add_vec_int w__0 ((((ex_int w__1)) div (( 8 :: int)::ii))) :: 64 Word.word)) (( 0 :: int)::ii) N__tv :: ( 'N::len)Word.word)))))" @@ -3950,12 +3988,12 @@ definition RotCell :: "(4)Word.word \<Rightarrow> int \<Rightarrow>((register_v (undefined_bitvector (( 8 :: int)::ii) :: ( 8 Word.word) M) \<bind> (\<lambda> (tmp :: 8 bits) . (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (outcell :: 4 bits) . (let (tmp :: 8 bits) = - ((set_slice0 (( 8 :: int)::ii) (( 8 :: int)::ii) tmp (( 0 :: int)::ii) - ((concat_vec ((slice0 incell_name (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) - ((slice0 incell_name (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 8 :: int)::ii) (( 8 :: int)::ii) tmp (( 0 :: int)::ii) + ((concat_vec ((slice incell_name (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((slice incell_name (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 8 Word.word)) :: 8 Word.word)) in - (let (outcell :: 4 bits) = ((slice0 tmp (((( 4 :: int)::ii) - amount)) (( 4 :: int)::ii) :: 4 Word.word)) in + (let (outcell :: 4 bits) = ((slice tmp (((( 4 :: int)::ii) - amount)) (( 4 :: int)::ii) :: 4 Word.word)) in return outcell)))))" @@ -3963,8 +4001,8 @@ definition RotCell :: "(4)Word.word \<Rightarrow> int \<Rightarrow>((register_v definition FPNeg :: "('N::len)Word.word \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPNeg op1 = ( - (let l__305 = (int (size op1)) in - if (((l__305 = (( 16 :: int)::ii)))) then + (let p00 = (int (size op1)) in + if (((p00 = (( 16 :: int)::ii)))) then (let (op1 :: 16 Word.word) = ((Word.ucast op1 :: 16 Word.word)) in assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> return ((Word.ucast @@ -3973,10 +4011,10 @@ definition FPNeg :: "('N::len)Word.word \<Rightarrow>((register_value),(('N::le (vec_of_bits [access_vec_dec op1 (((( 16 :: int)::ii) - (( 1 :: int)::ii)))] :: 1 Word.word) :: 1 Word.word)) - ((slice0 op1 (( 0 :: int)::ii) (((( 16 :: int)::ii) - (( 1 :: int)::ii))) :: 15 Word.word)) + ((slice op1 (( 0 :: int)::ii) (((( 16 :: int)::ii) - (( 1 :: int)::ii))) :: 15 Word.word)) :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))) - else if (((l__305 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then (let (op1 :: 32 Word.word) = ((Word.ucast op1 :: 32 Word.word)) in assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> return ((Word.ucast @@ -3985,10 +4023,10 @@ definition FPNeg :: "('N::len)Word.word \<Rightarrow>((register_value),(('N::le (vec_of_bits [access_vec_dec op1 (((( 32 :: int)::ii) - (( 1 :: int)::ii)))] :: 1 Word.word) :: 1 Word.word)) - ((slice0 op1 (( 0 :: int)::ii) (((( 32 :: int)::ii) - (( 1 :: int)::ii))) :: 31 Word.word)) + ((slice op1 (( 0 :: int)::ii) (((( 32 :: int)::ii) - (( 1 :: int)::ii))) :: 31 Word.word)) :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))) - else if (((l__305 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then (let (op1 :: 64 Word.word) = ((Word.ucast op1 :: 64 Word.word)) in assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> return ((Word.ucast @@ -3997,7 +4035,7 @@ definition FPNeg :: "('N::len)Word.word \<Rightarrow>((register_value),(('N::le (vec_of_bits [access_vec_dec op1 (((( 64 :: int)::ii) - (( 1 :: int)::ii)))] :: 1 Word.word) :: 1 Word.word)) - ((slice0 op1 (( 0 :: int)::ii) (((( 64 :: int)::ii) - (( 1 :: int)::ii))) :: 63 Word.word)) + ((slice op1 (( 0 :: int)::ii) (((( 64 :: int)::ii) - (( 1 :: int)::ii))) :: 63 Word.word)) :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))) else assert_exp False (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> exit0 () ))" @@ -4007,29 +4045,29 @@ definition FPNeg :: "('N::len)Word.word \<Rightarrow>((register_value),(('N::le definition FPAbs :: "('N::len)Word.word \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPAbs op1 = ( - (let l__302 = (int (size op1)) in - if (((l__302 = (( 16 :: int)::ii)))) then + (let p00 = (int (size op1)) in + if (((p00 = (( 16 :: int)::ii)))) then (let (op1 :: 16 Word.word) = ((Word.ucast op1 :: 16 Word.word)) in assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> return ((Word.ucast ((concat_vec (vec_of_bits [B0] :: 1 Word.word) - ((slice0 op1 (( 0 :: int)::ii) (((( 16 :: int)::ii) - (( 1 :: int)::ii))) :: 15 Word.word)) + ((slice op1 (( 0 :: int)::ii) (((( 16 :: int)::ii) - (( 1 :: int)::ii))) :: 15 Word.word)) :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))) - else if (((l__302 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then (let (op1 :: 32 Word.word) = ((Word.ucast op1 :: 32 Word.word)) in assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> return ((Word.ucast ((concat_vec (vec_of_bits [B0] :: 1 Word.word) - ((slice0 op1 (( 0 :: int)::ii) (((( 32 :: int)::ii) - (( 1 :: int)::ii))) :: 31 Word.word)) + ((slice op1 (( 0 :: int)::ii) (((( 32 :: int)::ii) - (( 1 :: int)::ii))) :: 31 Word.word)) :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))) - else if (((l__302 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then (let (op1 :: 64 Word.word) = ((Word.ucast op1 :: 64 Word.word)) in assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> return ((Word.ucast ((concat_vec (vec_of_bits [B0] :: 1 Word.word) - ((slice0 op1 (( 0 :: int)::ii) (((( 64 :: int)::ii) - (( 1 :: int)::ii))) :: 63 Word.word)) + ((slice op1 (( 0 :: int)::ii) (((( 64 :: int)::ii) - (( 1 :: int)::ii))) :: 63 Word.word)) :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))) else assert_exp False (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> exit0 () ))" @@ -4114,23 +4152,6 @@ definition EncodeLDFSC :: " Fault \<Rightarrow> int \<Rightarrow>((register_val )))" -(*val BigEndianReverse : forall 'width . Size 'width => mword 'width -> M (mword 'width)*) - -definition BigEndianReverse :: "('width::len)Word.word \<Rightarrow>((register_value),(('width::len)Word.word),(exception))monad " where - " BigEndianReverse value_name = ( - assert_exp ((((((((int (size value_name))) = (( 8 :: int)::ii)))) \<or> ((((((((int (size value_name))) = (( 16 :: int)::ii)))) \<or> ((((((((int (size value_name))) = (( 32 :: int)::ii)))) \<or> ((((((((int (size value_name))) = (( 64 :: int)::ii)))) \<or> (((((int (size value_name))) = (( 128 :: int)::ii)))))))))))))))) ('''') \<then> - ((let (result :: 'width bits) = - ((replicate_bits (vec_of_bits [B0] :: 1 Word.word) ((int (size value_name))) :: ( 'width::len)Word.word)) in - (let (result :: 'width bits) = - (foreach (index_list (( 0 :: int)::ii) ((((int (size result))) - (( 1 :: int)::ii))) (( 8 :: int)::ii)) result - (\<lambda> i result . - (update_subrange_vec_dec result ((i + (( 7 :: int)::ii))) i - ((subrange_vec_dec value_name - ((((((int (size result))) - i)) - (( 1 :: int)::ii))) - ((((((int (size result))) - i)) - (( 8 :: int)::ii))) - :: 8 Word.word)) - :: ( 'width::len)Word.word))) in - return result))))" (*val AArch32_ReportHypEntry : ExceptionRecord -> M unit*) @@ -4156,25 +4177,25 @@ definition AArch32_ReportHypEntry :: " ExceptionRecord \<Rightarrow>((register_ :: 7 Word.word)) iss :: 32 Word.word)) \<then> (if ((((((typ1 = Exception_InstructionAbort))) \<or> (((typ1 = Exception_PCAlignment)))))) then - (write_reg HIFAR_ref ((slice0(ExceptionRecord_vaddress exception) (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> + (write_reg HIFAR_ref ((slice(ExceptionRecord_vaddress exception) (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> (undefined_bitvector (( 32 :: int)::ii) :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__0 :: 32 bits) . write_reg HDFAR_ref w__0) else if (((typ1 = Exception_DataAbort))) then (undefined_bitvector (( 32 :: int)::ii) :: ( 32 Word.word) M) \<bind> (\<lambda> (w__1 :: 32 bits) . write_reg HIFAR_ref w__1 \<then> - write_reg HDFAR_ref ((slice0(ExceptionRecord_vaddress exception) (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word))) + write_reg HDFAR_ref ((slice(ExceptionRecord_vaddress exception) (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word))) else return () )) \<then> (if(ExceptionRecord_ipavalid exception) then (read_reg HPFAR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__2 :: 32 Word.word) . write_reg HPFAR_ref - ((set_slice0 (( 32 :: int)::ii) (( 28 :: int)::ii) w__2 (( 4 :: int)::ii) - ((slice0(ExceptionRecord_ipaddress exception) (( 12 :: int)::ii) (( 28 :: int)::ii) :: 28 Word.word)) + ((set_slice (( 32 :: int)::ii) (( 28 :: int)::ii) w__2 (( 4 :: int)::ii) + ((slice(ExceptionRecord_ipaddress exception) (( 12 :: int)::ii) (( 28 :: int)::ii) :: 28 Word.word)) :: 32 Word.word))) else (read_reg HPFAR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__3 :: 32 Word.word) . (undefined_bitvector (( 28 :: int)::ii) :: ( 28 Word.word) M) \<bind> (\<lambda> (w__4 :: 28 Word.word) . - write_reg HPFAR_ref ((set_slice0 (( 32 :: int)::ii) (( 28 :: int)::ii) w__3 (( 4 :: int)::ii) w__4 :: 32 Word.word)))))))))))))))" + write_reg HPFAR_ref ((set_slice (( 32 :: int)::ii) (( 28 :: int)::ii) w__3 (( 4 :: int)::ii) w__4 :: 32 Word.word)))))))))))))))" (*val aset_Elem__0 : forall 'N 'size . Size 'N, Size 'size => mword 'N -> ii -> itself 'size -> mword 'size -> M (mword 'N)*) @@ -4187,7 +4208,7 @@ definition aset_Elem__0 :: "('N::len)Word.word \<Rightarrow> int \<Rightarrow>( (let vector_name = vector_name__arg in assert_exp (((((e \<ge> (( 0 :: int)::ii))) \<and> ((((((e + (( 1 :: int)::ii))) * size1)) \<le> ((int (size vector_name)))))))) (''((e >= 0) && (((e + 1) * size) <= N))'') \<then> ((let (vector_name :: ( 'N::len)Word.word) = - ((set_slice0 ((int (size vector_name))) size1 vector_name ((e * size1)) value_name + ((set_slice ((int (size vector_name))) size1 vector_name ((e * size1)) value_name :: ( 'N::len)Word.word)) in return vector_name)))))" @@ -4207,7 +4228,7 @@ definition aget_Elem__0 :: "('N::len)Word.word \<Rightarrow> int \<Rightarrow>( " aget_Elem__0 vector_name e size1 = ( (let size1 = (size_itself_int size1) in assert_exp (((((e \<ge> (( 0 :: int)::ii))) \<and> ((((((e + (( 1 :: int)::ii))) * size1)) \<le> ((int (size vector_name)))))))) (''((e >= 0) && (((e + 1) * size) <= N))'') \<then> - return ((slice0 vector_name ((e * size1)) size1 :: ( 'size::len)Word.word))))" + return ((slice vector_name ((e * size1)) size1 :: ( 'size::len)Word.word))))" definition aget_Elem__1 :: " int \<Rightarrow>('N::len)Word.word \<Rightarrow> int \<Rightarrow>((register_value),(('size::len)Word.word),(exception))monad " where @@ -4286,7 +4307,8 @@ definition SatQ :: " int \<Rightarrow>('N::len)itself \<Rightarrow> bool \<Righ definition Replicate :: " int \<Rightarrow>('M::len)Word.word \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " Replicate (N__tv :: int) x = ( assert_exp (((((N__tv mod ((int (size x))))) = (( 0 :: int)::ii)))) (''((N MOD M) == 0)'') \<then> - return ((replicate_bits x ((N__tv div ((int (size x))))) :: ( 'N::len)Word.word)))" + ((let O1 = (N__tv div ((int (size x)))) in + assert_exp True ('''') \<then> return ((replicate_bits x ((N__tv div ((int (size x))))) :: ( 'N::len)Word.word)))))" (*val Zeros__0 : forall 'N . Size 'N => itself 'N -> mword 'N*) @@ -4382,8 +4404,8 @@ definition aset_SP :: "('width::len)Word.word \<Rightarrow>((register_value),(u write_reg SP_EL0_ref w__1) else read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (let p__612 = ((ProcState_EL w__2)) in - (let pat0 = p__612 in + (let p__299 = ((ProcState_EL w__2)) in + (let pat0 = p__299 in if (((pat0 = EL0))) then (ZeroExtend__1 (( 64 :: int)::ii) value_name :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . write_reg SP_EL0_ref w__3) @@ -4439,7 +4461,7 @@ definition Poly32Mod2 :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Right (or_vec data ((sub_vec_int ((shiftl poly' i :: ( 'N::len)Word.word)) (( 32 :: int)::ii) :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word) else data)) in - return ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)))))))" + return ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)))))))" (*val LSL_C : forall 'N . Size 'N => mword 'N -> ii -> M (mword 'N * mword ty1)*) @@ -4474,7 +4496,7 @@ definition LSL :: "('N::len)Word.word \<Rightarrow> int \<Rightarrow>((register definition AArch32_ITAdvance :: " unit \<Rightarrow>((register_value),(unit),(exception))monad " where " AArch32_ITAdvance _ = ( read_reg PSTATE_ref \<bind> (\<lambda> (w__0 :: ProcState) . - if (((((slice0(ProcState_IT w__0) (( 0 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B0,B0,B0] :: 3 Word.word)))) then + if (((((slice(ProcState_IT w__0) (( 0 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B0,B0,B0] :: 3 Word.word)))) then read_reg PSTATE_ref \<bind> (\<lambda> (w__1 :: ProcState) . write_reg PSTATE_ref @@ -4483,9 +4505,9 @@ definition AArch32_ITAdvance :: " unit \<Rightarrow>((register_value),(unit),(e read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . (let (tmp_2760 :: 8 bits) = ((ProcState_IT w__2)) in read_reg PSTATE_ref \<bind> (\<lambda> (w__3 :: ProcState) . - (LSL ((slice0(ProcState_IT w__3) (( 0 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) (( 1 :: int)::ii) :: ( 5 Word.word) M) \<bind> (\<lambda> (w__4 :: + (LSL ((slice(ProcState_IT w__3) (( 0 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) (( 1 :: int)::ii) :: ( 5 Word.word) M) \<bind> (\<lambda> (w__4 :: 5 Word.word) . - (let tmp_2760 = ((set_slice0 (( 8 :: int)::ii) (( 5 :: int)::ii) tmp_2760 (( 0 :: int)::ii) w__4 :: 8 Word.word)) in + (let tmp_2760 = ((set_slice (( 8 :: int)::ii) (( 5 :: int)::ii) tmp_2760 (( 0 :: int)::ii) w__4 :: 8 Word.word)) in read_reg PSTATE_ref \<bind> (\<lambda> (w__5 :: ProcState) . write_reg PSTATE_ref (w__5 (| ProcState_IT := tmp_2760 |))))))))))" @@ -4608,22 +4630,22 @@ definition GetPSRFromPSTATE :: " unit \<Rightarrow>((register_value),((32)Word. definition FPZero :: " int \<Rightarrow>(1)Word.word \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPZero (N__tv :: int) sign = ( - (let l__299 = N__tv in - if (((l__299 = (( 16 :: int)::ii)))) then + (let p00 = N__tv in + if (((p00 = (( 16 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 16 :: int)::ii) - (( 5 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 5 bits) = ((Zeros__0 ((make_the_value (( 5 :: int)::ii) :: 5 itself)) :: 5 Word.word)) in (let (frac :: 10 bits) = ((Zeros__0 ((make_the_value F :: 10 itself)) :: 10 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 6 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word)))))) - else if (((l__299 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 32 :: int)::ii) - (( 8 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 8 bits) = ((Zeros__0 ((make_the_value (( 8 :: int)::ii) :: 8 itself)) :: 8 Word.word)) in (let (frac :: 23 bits) = ((Zeros__0 ((make_the_value F :: 23 itself)) :: 23 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 9 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word)))))) - else if (((l__299 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 64 :: int)::ii) - (( 11 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 11 bits) = ((Zeros__0 ((make_the_value (( 11 :: int)::ii) :: 11 itself)) :: 11 Word.word)) in @@ -4698,8 +4720,8 @@ definition AArch32_PhysicalSErrorSyndrome :: " unit \<Rightarrow>((register_val definition VFPExpandImm :: " int \<Rightarrow>(8)Word.word \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " VFPExpandImm (N__tv :: int) imm8 = ( - (let l__296 = N__tv in - if (((l__296 = (( 16 :: int)::ii)))) then + (let p00 = N__tv in + if (((p00 = (( 16 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 16 :: int)::ii) - (( 5 :: int)::ii))) - (( 1 :: int)::ii)) in (let (sign :: 1 bits) = ((vec_of_bits [access_vec_dec imm8 (( 7 :: int)::ii)] :: 1 Word.word)) in @@ -4718,7 +4740,7 @@ definition VFPExpandImm :: " int \<Rightarrow>(8)Word.word \<Rightarrow>((regis :: 10 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 6 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))))))) - else if (((l__296 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 32 :: int)::ii) - (( 8 :: int)::ii))) - (( 1 :: int)::ii)) in (let (sign :: 1 bits) = ((vec_of_bits [access_vec_dec imm8 (( 7 :: int)::ii)] :: 1 Word.word)) in @@ -4737,7 +4759,7 @@ definition VFPExpandImm :: " int \<Rightarrow>(8)Word.word \<Rightarrow>((regis :: 23 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 9 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))))))) - else if (((l__296 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 64 :: int)::ii) - (( 11 :: int)::ii))) - (( 1 :: int)::ii)) in (let (sign :: 1 bits) = ((vec_of_bits [access_vec_dec imm8 (( 7 :: int)::ii)] :: 1 Word.word)) in @@ -4842,8 +4864,8 @@ definition IsOnes :: "('N::len)Word.word \<Rightarrow> bool " where definition FPMaxNormal :: " int \<Rightarrow>(1)Word.word \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPMaxNormal (N__tv :: int) sign = ( - (let l__293 = N__tv in - if (((l__293 = (( 16 :: int)::ii)))) then + (let p00 = N__tv in + if (((p00 = (( 16 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 16 :: int)::ii) - (( 5 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 5 bits) = @@ -4854,7 +4876,7 @@ definition FPMaxNormal :: " int \<Rightarrow>(1)Word.word \<Rightarrow>((regist (let (frac :: 10 bits) = ((Ones__0 ((make_the_value F :: 10 itself)) :: 10 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 6 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word)))))) - else if (((l__293 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 32 :: int)::ii) - (( 8 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 8 bits) = @@ -4865,7 +4887,7 @@ definition FPMaxNormal :: " int \<Rightarrow>(1)Word.word \<Rightarrow>((regist (let (frac :: 23 bits) = ((Ones__0 ((make_the_value F :: 23 itself)) :: 23 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 9 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word)))))) - else if (((l__293 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 64 :: int)::ii) - (( 11 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 11 bits) = @@ -4883,22 +4905,22 @@ definition FPMaxNormal :: " int \<Rightarrow>(1)Word.word \<Rightarrow>((regist definition FPInfinity :: " int \<Rightarrow>(1)Word.word \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPInfinity (N__tv :: int) sign = ( - (let l__290 = N__tv in - if (((l__290 = (( 16 :: int)::ii)))) then + (let p00 = N__tv in + if (((p00 = (( 16 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 16 :: int)::ii) - (( 5 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 5 bits) = ((Ones__0 ((make_the_value (( 5 :: int)::ii) :: 5 itself)) :: 5 Word.word)) in (let (frac :: 10 bits) = ((Zeros__0 ((make_the_value F :: 10 itself)) :: 10 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 6 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word)))))) - else if (((l__290 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 32 :: int)::ii) - (( 8 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 8 bits) = ((Ones__0 ((make_the_value (( 8 :: int)::ii) :: 8 itself)) :: 8 Word.word)) in (let (frac :: 23 bits) = ((Zeros__0 ((make_the_value F :: 23 itself)) :: 23 Word.word)) in return ((Word.ucast ((concat_vec ((concat_vec sign exp :: 9 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word)))))) - else if (((l__290 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 64 :: int)::ii) - (( 11 :: int)::ii))) - (( 1 :: int)::ii)) in (let (exp :: 11 bits) = ((Ones__0 ((make_the_value (( 11 :: int)::ii) :: 11 itself)) :: 11 Word.word)) in @@ -4912,8 +4934,8 @@ definition FPInfinity :: " int \<Rightarrow>(1)Word.word \<Rightarrow>((registe definition FPDefaultNaN :: " int \<Rightarrow> unit \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPDefaultNaN (N__tv :: int) _ = ( - (let l__287 = N__tv in - if (((l__287 = (( 16 :: int)::ii)))) then + (let p00 = N__tv in + if (((p00 = (( 16 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 16 :: int)::ii) - (( 5 :: int)::ii))) - (( 1 :: int)::ii)) in (let (sign :: 1 bits) = ((vec_of_bits [B0] :: 1 Word.word)) in @@ -4926,7 +4948,7 @@ definition FPDefaultNaN :: " int \<Rightarrow> unit \<Rightarrow>((register_val ((concat_vec ((concat_vec (vec_of_bits [B0] :: 1 Word.word) exp :: 6 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))))))) - else if (((l__287 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 32 :: int)::ii) - (( 8 :: int)::ii))) - (( 1 :: int)::ii)) in (let (sign :: 1 bits) = ((vec_of_bits [B0] :: 1 Word.word)) in @@ -4939,7 +4961,7 @@ definition FPDefaultNaN :: " int \<Rightarrow> unit \<Rightarrow>((register_val ((concat_vec ((concat_vec (vec_of_bits [B0] :: 1 Word.word) exp :: 9 Word.word)) frac :: ( 'N::len)Word.word)) :: ( 'N::len)Word.word))))))) - else if (((l__287 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then assert_exp True (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> ((let (F :: int) = ((((( 64 :: int)::ii) - (( 11 :: int)::ii))) - (( 1 :: int)::ii)) in (let (sign :: 1 bits) = ((vec_of_bits [B0] :: 1 Word.word)) in @@ -4965,40 +4987,40 @@ definition FPConvertNaN :: " int \<Rightarrow>('N::len)Word.word \<Rightarrow>( (undefined_bitvector (( 51 :: int)::ii) :: ( 51 Word.word) M) \<bind> (\<lambda> (frac :: 51 bits) . (let (sign :: 1 bits) = ((vec_of_bits [access_vec_dec op1 ((((int (size op1))) - (( 1 :: int)::ii)))] :: 1 Word.word)) in - (let l__281 = (int (size op1)) in + (let p00 = (int (size op1)) in (let (frac :: 51 bits) = - (if (((l__281 = (( 64 :: int)::ii)))) then + (if (((p00 = (( 64 :: int)::ii)))) then (let (op1 :: 64 Word.word) = ((Word.ucast op1 :: 64 Word.word)) in - (slice0 op1 (( 0 :: int)::ii) (( 51 :: int)::ii) :: 51 Word.word)) - else if (((l__281 = (( 32 :: int)::ii)))) then + (slice op1 (( 0 :: int)::ii) (( 51 :: int)::ii) :: 51 Word.word)) + else if (((p00 = (( 32 :: int)::ii)))) then (let (op1 :: 32 Word.word) = ((Word.ucast op1 :: 32 Word.word)) in - (concat_vec ((slice0 op1 (( 0 :: int)::ii) (( 22 :: int)::ii) :: 22 Word.word)) + (concat_vec ((slice op1 (( 0 :: int)::ii) (( 22 :: int)::ii) :: 22 Word.word)) ((Zeros__0 ((make_the_value (( 29 :: int)::ii) :: 29 itself)) :: 29 Word.word)) :: 51 Word.word)) else (let (op1 :: 16 Word.word) = ((Word.ucast op1 :: 16 Word.word)) in - (concat_vec ((slice0 op1 (( 0 :: int)::ii) (( 9 :: int)::ii) :: 9 Word.word)) + (concat_vec ((slice op1 (( 0 :: int)::ii) (( 9 :: int)::ii) :: 9 Word.word)) ((Zeros__0 ((make_the_value (( 42 :: int)::ii) :: 42 itself)) :: 42 Word.word)) :: 51 Word.word))) in - (let l__284 = (int (size result)) in + (let p00 = (int (size result)) in (let (result :: 'M bits) = - (if (((l__284 = (( 64 :: int)::ii)))) then + (if (((p00 = (( 64 :: int)::ii)))) then (concat_vec ((concat_vec sign ((Ones__0 ((make_the_value (((( 64 :: int)::ii) - (( 52 :: int)::ii))) )) :: 12 Word.word)) :: 13 Word.word)) frac :: ( 'M::len)Word.word) - else if (((l__284 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then (concat_vec ((concat_vec sign ((Ones__0 ((make_the_value (((( 32 :: int)::ii) - (( 23 :: int)::ii))) )) :: 9 Word.word)) - :: 10 Word.word)) ((slice0 frac (( 29 :: int)::ii) (( 22 :: int)::ii) :: 22 Word.word)) + :: 10 Word.word)) ((slice frac (( 29 :: int)::ii) (( 22 :: int)::ii) :: 22 Word.word)) :: ( 'M::len)Word.word) else (concat_vec ((concat_vec sign - ((Ones__0 ((make_the_value ((l__284 - (( 10 :: int)::ii))) )) :: 6 Word.word)) - :: 7 Word.word)) ((slice0 frac (( 42 :: int)::ii) (( 9 :: int)::ii) :: 9 Word.word)) + ((Ones__0 ((make_the_value ((p00 - (( 10 :: int)::ii))) )) :: 6 Word.word)) + :: 7 Word.word)) ((slice frac (( 42 :: int)::ii) (( 9 :: int)::ii) :: 9 Word.word)) :: ( 'M::len)Word.word)) in return result))))))))" @@ -5014,7 +5036,7 @@ definition ExcVectorBase :: " unit \<Rightarrow>((register_value),((32)Word.wor :: 32 Word.word)) else (read_reg VBAR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__1 :: 32 bits) . - return ((concat_vec ((slice0 w__1 (( 5 :: int)::ii) (( 27 :: int)::ii) :: 27 Word.word)) + return ((concat_vec ((slice w__1 (( 5 :: int)::ii) (( 27 :: int)::ii) :: 27 Word.word)) ((Zeros__0 ((make_the_value (( 5 :: int)::ii) :: 5 itself)) :: 5 Word.word)) :: 32 Word.word)))))" @@ -5027,69 +5049,69 @@ definition PACSub :: "(64)Word.word \<Rightarrow>((register_value),((64)Word.wo (let (Toutput :: 64 bits) = (foreach (index_list (( 0 :: int)::ii) (( 15 :: int)::ii) (( 1 :: int)::ii)) Toutput (\<lambda> i Toutput . - (let b__0 = ((slice0 Tinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) in + (let b__0 = ((slice Tinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) in if (((b__0 = (vec_of_bits [B0,B0,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B1,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B0,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B1,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B0,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B0,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B1,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B1,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B1,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B0,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B1,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B0,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B1,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B1,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B0,B1] :: 4 Word.word) :: 64 Word.word) else - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B1,B0] :: 4 Word.word) :: 64 Word.word)))) in return Toutput)))" @@ -5104,78 +5126,80 @@ definition PACMult :: "(64)Word.word \<Rightarrow>((register_value),((64)Word.w (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (t2 :: 4 bits) . (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (t3 :: 4 bits) . (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) \<bind> (\<lambda> (Soutput :: 64 bits) . - (foreachM (index_list (( 0 :: int)::ii) (( 3 :: int)::ii) (( 1 :: int)::ii)) Soutput - (\<lambda> i Soutput . - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (foreachM (index_list (( 0 :: int)::ii) (( 3 :: int)::ii) (( 1 :: int)::ii)) (Soutput, t0, t1, t2, t3) + (\<lambda> i varstup . (let (Soutput, t0, t1, t2, t3) = varstup in + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__0 :: 4 Word.word) . - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 2 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__1 :: 4 Word.word) . - (let t0 = ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t0 (( 0 :: int)::ii) ((xor_vec w__0 w__1 :: 4 Word.word)) :: 4 Word.word)) in - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) + (let t0 = ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t0 (( 0 :: int)::ii) ((xor_vec w__0 w__1 :: 4 Word.word)) :: 4 Word.word)) in + (RotCell ((slice Sinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__2 :: 4 Word.word) . (let t0 = - ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t0 (( 0 :: int)::ii) - ((xor_vec ((slice0 t0 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__2 :: 4 Word.word)) + ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t0 (( 0 :: int)::ii) + ((xor_vec ((slice t0 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__2 :: 4 Word.word)) :: 4 Word.word)) in - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__3 :: 4 Word.word) . - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__4 :: 4 Word.word) . - (let t1 = ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t1 (( 0 :: int)::ii) ((xor_vec w__3 w__4 :: 4 Word.word)) :: 4 Word.word)) in - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) (( 2 :: int)::ii) + (let t1 = ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t1 (( 0 :: int)::ii) ((xor_vec w__3 w__4 :: 4 Word.word)) :: 4 Word.word)) in + (RotCell ((slice Sinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) (( 2 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__5 :: 4 Word.word) . (let t1 = - ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t1 (( 0 :: int)::ii) - ((xor_vec ((slice0 t1 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__5 :: 4 Word.word)) + ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t1 (( 0 :: int)::ii) + ((xor_vec ((slice t1 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__5 :: 4 Word.word)) :: 4 Word.word)) in - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 2 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__6 :: 4 Word.word) . - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__7 :: 4 Word.word) . - (let t2 = ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t2 (( 0 :: int)::ii) ((xor_vec w__6 w__7 :: 4 Word.word)) :: 4 Word.word)) in - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) + (let t2 = ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t2 (( 0 :: int)::ii) ((xor_vec w__6 w__7 :: 4 Word.word)) :: 4 Word.word)) in + (RotCell ((slice Sinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__8 :: 4 Word.word) . (let t2 = - ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t2 (( 0 :: int)::ii) - ((xor_vec ((slice0 t2 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__8 :: 4 Word.word)) + ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t2 (( 0 :: int)::ii) + ((xor_vec ((slice t2 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__8 :: 4 Word.word)) :: 4 Word.word)) in - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__9 :: 4 Word.word) . - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 2 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__10 :: 4 Word.word) . - (let t3 = ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t3 (( 0 :: int)::ii) ((xor_vec w__9 w__10 :: 4 Word.word)) :: 4 Word.word)) in - (RotCell ((slice0 Sinput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) + (let t3 = ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t3 (( 0 :: int)::ii) ((xor_vec w__9 w__10 :: 4 Word.word)) :: 4 Word.word)) in + (RotCell ((slice Sinput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) (( 4 :: int)::ii) :: 4 Word.word)) (( 1 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__11 :: 4 Word.word) . (let (t3 :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 4 :: int)::ii) t3 (( 0 :: int)::ii) - ((xor_vec ((slice0 t3 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__11 :: 4 Word.word)) + ((set_slice (( 4 :: int)::ii) (( 4 :: int)::ii) t3 (( 0 :: int)::ii) + ((xor_vec ((slice t3 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) w__11 :: 4 Word.word)) :: 4 Word.word)) in (let (Soutput :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * i)) - ((slice0 t3 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * i)) + ((slice t3 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (Soutput :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) - ((slice0 t2 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * ((i + (( 4 :: int)::ii))))) + ((slice t2 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (Soutput :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) - ((slice0 t1 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * ((i + (( 8 :: int)::ii))))) + ((slice t1 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in (let (Soutput :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) - ((slice0 t0 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Soutput (((( 4 :: int)::ii) * ((i + (( 12 :: int)::ii))))) + ((slice t0 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) :: 64 Word.word)) in - return Soutput))))))))))))))))))))))))))))))))" + return (Soutput, t0, t1, t2, t3)))))))))))))))))))))))))))) \<bind> (\<lambda> varstup . (let ((Soutput :: 64 bits), (t0 :: 4 + bits), (t1 :: 4 bits), (t2 :: 4 bits), (t3 :: 4 bits)) = varstup in + return Soutput))))))))" (*val PACInvSub : mword ty64 -> M (mword ty64)*) @@ -5186,69 +5210,69 @@ definition PACInvSub :: "(64)Word.word \<Rightarrow>((register_value),((64)Word (let (Toutput :: 64 bits) = (foreach (index_list (( 0 :: int)::ii) (( 15 :: int)::ii) (( 1 :: int)::ii)) Toutput (\<lambda> i Toutput . - (let b__0 = ((slice0 Tinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) in + (let b__0 = ((slice Tinput (((( 4 :: int)::ii) * i)) (( 4 :: int)::ii) :: 4 Word.word)) in if (((b__0 = (vec_of_bits [B0,B0,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B0,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B0,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B0,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B0,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B1,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B1,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B0,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B0,B1,B1,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B0,B0,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B1,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B1,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B0,B1,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B1,B0,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B1,B0,B1] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B1,B1,B0,B0] :: 4 Word.word) :: 64 Word.word) else if (((b__0 = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B1,B1,B1] :: 4 Word.word) :: 64 Word.word) else - (set_slice0 (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) + (set_slice (( 64 :: int)::ii) (( 4 :: int)::ii) Toutput (((( 4 :: int)::ii) * i)) (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word) :: 64 Word.word)))) in return Toutput)))" @@ -5281,7 +5305,7 @@ definition ComputePAC :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow ((let modk0 = ((concat_vec ((concat_vec (vec_of_bits [access_vec_dec key0 (( 0 :: int)::ii)] :: 1 Word.word) - ((slice0 key0 (( 2 :: int)::ii) (( 62 :: int)::ii) :: 62 Word.word)) + ((slice key0 (( 2 :: int)::ii) (( 62 :: int)::ii) :: 62 Word.word)) :: 63 Word.word)) ((xor_vec (vec_of_bits [access_vec_dec key0 (( 63 :: int)::ii)] :: 1 Word.word) (vec_of_bits [access_vec_dec key0 (( 1 :: int)::ii)] :: 1 Word.word) @@ -5302,7 +5326,7 @@ definition ComputePAC :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow else return workingval) \<bind> (\<lambda> (workingval :: 64 bits) . (PACSub workingval :: ( 64 Word.word) M) \<bind> (\<lambda> (w__13 :: 64 bits) . (let workingval = w__13 in - (TweakShuffle ((slice0 runningmod (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__14 :: 64 + (TweakShuffle ((slice runningmod (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__14 :: 64 bits) . (let (runningmod :: 64 bits) = w__14 in return (roundkey, runningmod, workingval))))))))))))) \<bind> (\<lambda> varstup . (let ((roundkey :: 64 bits), (runningmod :: 64 @@ -5330,8 +5354,8 @@ definition ComputePAC :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow (let workingval = w__23 in (let workingval = ((xor_vec workingval key0 :: 64 Word.word)) in (let workingval = ((xor_vec workingval runningmod :: 64 Word.word)) in - (foreachM (index_list (( 0 :: int)::ii) (( 4 :: int)::ii) (( 1 :: int)::ii)) workingval - (\<lambda> i workingval . + (foreachM (index_list (( 0 :: int)::ii) (( 4 :: int)::ii) (( 1 :: int)::ii)) (roundkey, runningmod, workingval) + (\<lambda> i varstup . (let (roundkey, runningmod, workingval) = varstup in (PACInvSub workingval :: ( 64 Word.word) M) \<bind> (\<lambda> (w__24 :: 64 bits) . (let workingval = w__24 in (if ((i < (( 4 :: int)::ii))) then @@ -5339,7 +5363,7 @@ definition ComputePAC :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow (let workingval = w__25 in (PACCellInvShuffle workingval :: ( 64 Word.word) M))) else return workingval) \<bind> (\<lambda> (workingval :: 64 bits) . - (TweakInvShuffle ((slice0 runningmod (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__27 :: 64 + (TweakInvShuffle ((slice runningmod (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__27 :: 64 bits) . (let runningmod = w__27 in (let roundkey = ((xor_vec key1 runningmod :: 64 Word.word)) in @@ -5349,9 +5373,10 @@ definition ComputePAC :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow :: 64 Word.word)) in (let (workingval :: 64 bits) = ((xor_vec workingval roundkey :: 64 Word.word)) in (let (workingval :: 64 bits) = ((xor_vec workingval Alpha :: 64 Word.word)) in - return workingval)))))))))))) \<bind> (\<lambda> (workingval :: 64 bits) . + return (roundkey, runningmod, workingval)))))))))))))) \<bind> (\<lambda> varstup . (let ((roundkey :: 64 bits), (runningmod :: 64 + bits), (workingval :: 64 bits)) = varstup in (let (workingval :: 64 bits) = ((xor_vec workingval modk0 :: 64 Word.word)) in - return workingval)))))))))))))))))))))))))))))))))))))))))))))))" + return workingval))))))))))))))))))))))))))))))))))))))))))))))))" (*val Align__0 : ii -> ii -> ii*) @@ -5378,12 +5403,12 @@ definition aset__Mem :: " AddressDescriptor \<Rightarrow> int \<Rightarrow> Acc (hex_slice (''0x13000000'') (( 52 :: int)::ii) (( 0 :: int)::ii) :: ( 52 Word.word) M)) \<bind> (\<lambda> (w__0 :: 52 Word.word) . if (((address = w__0))) then if (((((Word.uint value_name)) = (( 4 :: int)::ii)))) then - (let (_ :: unit) = (prerr_endline ([(CHR ''P''), (CHR ''r''), (CHR ''o''), (CHR ''g''), (CHR ''r''), (CHR ''a''), (CHR ''m''), (CHR '' ''), (CHR ''e''), (CHR ''x''), (CHR ''i''), (CHR ''t''), (CHR ''e''), (CHR ''d''), (CHR '' ''), (CHR ''b''), (CHR ''y''), (CHR '' ''), (CHR ''w''), (CHR ''r''), (CHR ''i''), (CHR ''t''), (CHR ''i''), (CHR ''n''), (CHR ''g''), (CHR '' ''), (CHR ''^''), (CHR ''D''), (CHR '' ''), (CHR ''t''), (CHR ''o''), (CHR '' ''), (CHR ''T''), (CHR ''U''), (CHR ''B''), (CHR ''E''), (char_of_nat 10)])) in + (let (_ :: unit) = (prerr ([(CHR ''P''), (CHR ''r''), (CHR ''o''), (CHR ''g''), (CHR ''r''), (CHR ''a''), (CHR ''m''), (CHR '' ''), (CHR ''e''), (CHR ''x''), (CHR ''i''), (CHR ''t''), (CHR ''e''), (CHR ''d''), (CHR '' ''), (CHR ''b''), (CHR ''y''), (CHR '' ''), (CHR ''w''), (CHR ''r''), (CHR ''i''), (CHR ''t''), (CHR ''i''), (CHR ''n''), (CHR ''g''), (CHR '' ''), (CHR ''^''), (CHR ''D''), (CHR '' ''), (CHR ''t''), (CHR ''o''), (CHR '' ''), (CHR ''T''), (CHR ''U''), (CHR ''B''), (CHR ''E''), (char_of_nat 10)])) in exit0 () ) - else return ((putchar ((Word.uint ((slice0 value_name (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)))))) + else return ((putchar ((Word.uint ((slice value_name (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)))))) else (read_reg Memory_ref :: ( 52 Word.word) M) \<bind> (\<lambda> (w__1 :: 52 Word.word) . - write_ram (( 52 :: int)::ii) size1 w__1 address value_name)))))" + WriteRAM ((make_the_value (( 52 :: int)::ii) :: 52 itself)) size1 w__1 address value_name)))))" (*val aget__Mem : forall 'p8_times_size_ . Size 'p8_times_size_ => AddressDescriptor -> integer -> AccessDescriptor -> M (mword 'p8_times_size_)*) @@ -5394,7 +5419,8 @@ definition aget__Mem :: " AddressDescriptor \<Rightarrow> int \<Rightarrow> Acc ((let (address :: 52 bits) = ((FullAddress_physicaladdress (AddressDescriptor_paddress desc))) in (assert_exp (((address = ((Align__1 address size1 :: 52 Word.word))))) (''(address == Align(address, size))'') \<then> (read_reg Memory_ref :: ( 52 Word.word) M)) \<bind> (\<lambda> (w__0 :: 52 Word.word) . - (read_ram (( 52 :: int)::ii) size1 w__0 address :: (( 'p8_times_size_::len)Word.word) M)))))" + (ReadRAM ((make_the_value (( 52 :: int)::ii) :: 52 itself)) size1 w__0 address + :: (( 'p8_times_size_::len)Word.word) M)))))" (*val aset_X : forall 'width . Size 'width => ii -> mword 'width -> M unit*) @@ -5418,7 +5444,7 @@ definition aarch64_integer_arithmetic_address_pcrel :: " int \<Rightarrow>(64)W (aget_PC () :: ( 64 Word.word) M) \<bind> (\<lambda> (base :: 64 bits) . (let (base :: 64 bits) = (if page then - (set_slice0 (( 64 :: int)::ii) (( 12 :: int)::ii) base (( 0 :: int)::ii) + (set_slice (( 64 :: int)::ii) (( 12 :: int)::ii) base (( 0 :: int)::ii) ((Zeros__0 ((make_the_value (( 12 :: int)::ii) :: 12 itself)) :: 12 Word.word)) :: 64 Word.word) else base) in @@ -5484,7 +5510,7 @@ definition aget_X :: " int \<Rightarrow> int \<Rightarrow>((register_value),((' assert_exp ((((((width__tv = (( 8 :: int)::ii)))) \<or> ((((((width__tv = (( 16 :: int)::ii)))) \<or> ((((((width__tv = (( 32 :: int)::ii)))) \<or> (((width__tv = (( 64 :: int)::ii))))))))))))) (''((width == 8) || ((width == 16) || ((width == 32) || (width == 64))))'')) \<then> (if (((n \<noteq> (( 31 :: int)::ii)))) then read_reg R_ref \<bind> (\<lambda> (w__0 :: ( 64 bits) list) . - return ((slice0 ((access_list_dec w__0 n :: 64 Word.word)) (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) + return ((slice ((access_list_dec w__0 n :: 64 Word.word)) (( 0 :: int)::ii) width__tv :: ( 'width::len)Word.word))) else return ((Zeros__0 ((make_the_value width__tv :: ( 'width::len)itself)) :: ( 'width::len)Word.word))))" @@ -5517,8 +5543,8 @@ definition aarch64_system_register_system :: " bool \<Rightarrow> int \<Rightar (*val aarch64_integer_insext_insert_movewide : ii -> ii -> mword ty16 -> MoveWideOp -> ii -> M unit*) definition aarch64_integer_insext_insert_movewide :: " int \<Rightarrow> int \<Rightarrow>(16)Word.word \<Rightarrow> MoveWideOp \<Rightarrow> int \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_insext_insert_movewide d l__276 imm opcode pos = ( - if (((l__276 = (( 8 :: int)::ii)))) then + " aarch64_integer_insext_insert_movewide d l__267 imm opcode pos = ( + if (((l__267 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5527,12 +5553,12 @@ definition aarch64_integer_insext_insert_movewide :: " int \<Rightarrow> int \< else (let (result :: 8 bits) = ((Zeros__1 (( 8 :: int)::ii) () :: 8 Word.word)) in return result)) \<bind> (\<lambda> (result :: 8 bits) . - (let result = ((set_slice0 (( 8 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 8 Word.word)) in + (let result = ((set_slice (( 8 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 8 Word.word)) in (let (result :: 8 bits) = (if (((opcode = MoveWideOp_N))) then (not_vec result :: 8 Word.word) else result) in aset_X d result))))) - else if (((l__276 = (( 16 :: int)::ii)))) then + else if (((l__267 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5541,12 +5567,12 @@ definition aarch64_integer_insext_insert_movewide :: " int \<Rightarrow> int \< else (let (result :: 16 bits) = ((Zeros__1 (( 16 :: int)::ii) () :: 16 Word.word)) in return result)) \<bind> (\<lambda> (result :: 16 bits) . - (let result = ((set_slice0 (( 16 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 16 Word.word)) in + (let result = ((set_slice (( 16 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 16 Word.word)) in (let (result :: 16 bits) = (if (((opcode = MoveWideOp_N))) then (not_vec result :: 16 Word.word) else result) in aset_X d result))))) - else if (((l__276 = (( 32 :: int)::ii)))) then + else if (((l__267 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5555,12 +5581,12 @@ definition aarch64_integer_insext_insert_movewide :: " int \<Rightarrow> int \< else (let (result :: 32 bits) = ((Zeros__1 (( 32 :: int)::ii) () :: 32 Word.word)) in return result)) \<bind> (\<lambda> (result :: 32 bits) . - (let result = ((set_slice0 (( 32 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 32 Word.word)) in + (let result = ((set_slice (( 32 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 32 Word.word)) in (let (result :: 32 bits) = (if (((opcode = MoveWideOp_N))) then (not_vec result :: 32 Word.word) else result) in aset_X d result))))) - else if (((l__276 = (( 64 :: int)::ii)))) then + else if (((l__267 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5569,12 +5595,12 @@ definition aarch64_integer_insext_insert_movewide :: " int \<Rightarrow> int \< else (let (result :: 64 bits) = ((Zeros__1 (( 64 :: int)::ii) () :: 64 Word.word)) in return result)) \<bind> (\<lambda> (result :: 64 bits) . - (let result = ((set_slice0 (( 64 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 64 Word.word)) in + (let result = ((set_slice (( 64 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 64 Word.word)) in (let (result :: 64 bits) = (if (((opcode = MoveWideOp_N))) then (not_vec result :: 64 Word.word) else result) in aset_X d result))))) - else if (((l__276 = (( 128 :: int)::ii)))) then + else if (((l__267 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5583,21 +5609,21 @@ definition aarch64_integer_insext_insert_movewide :: " int \<Rightarrow> int \< else (let (result :: 128 bits) = ((Zeros__1 (( 128 :: int)::ii) () :: 128 Word.word)) in return result)) \<bind> (\<lambda> (result :: 128 bits) . - (let result = ((set_slice0 (( 128 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 128 Word.word)) in + (let result = ((set_slice (( 128 :: int)::ii) (( 16 :: int)::ii) result pos imm :: 128 Word.word)) in (let (result :: 128 bits) = (if (((opcode = MoveWideOp_N))) then (not_vec result :: 128 Word.word) else result) in aset_X d result))))) else - (let dbytes = (ex_int ((l__276 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__267 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" (*val aarch64_integer_insext_extract_immediate : ii -> ii -> ii -> ii -> ii -> M unit*) definition aarch64_integer_insext_extract_immediate :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_insext_extract_immediate d l__271 lsb1 m n = ( - if (((l__271 = (( 8 :: int)::ii)))) then + " aarch64_integer_insext_extract_immediate d l__262 lsb1 m n = ( + if (((l__262 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5605,9 +5631,9 @@ definition aarch64_integer_insext_extract_immediate :: " int \<Rightarrow> int (aget_X (( 8 :: int)::ii) n :: ( 8 Word.word) M) \<bind> (\<lambda> (operand1 :: 8 bits) . (aget_X (( 8 :: int)::ii) m :: ( 8 Word.word) M) \<bind> (\<lambda> (operand2 :: 8 bits) . (let (concat1 :: 16 bits) = ((concat_vec operand1 operand2 :: 16 Word.word)) in - (let result = ((slice0 concat1 lsb1 (( 8 :: int)::ii) :: 8 Word.word)) in + (let result = ((slice concat1 lsb1 (( 8 :: int)::ii) :: 8 Word.word)) in aset_X d result)))))) - else if (((l__271 = (( 16 :: int)::ii)))) then + else if (((l__262 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5615,9 +5641,9 @@ definition aarch64_integer_insext_extract_immediate :: " int \<Rightarrow> int (aget_X (( 16 :: int)::ii) n :: ( 16 Word.word) M) \<bind> (\<lambda> (operand1 :: 16 bits) . (aget_X (( 16 :: int)::ii) m :: ( 16 Word.word) M) \<bind> (\<lambda> (operand2 :: 16 bits) . (let (concat1 :: 32 bits) = ((concat_vec operand1 operand2 :: 32 Word.word)) in - (let result = ((slice0 concat1 lsb1 (( 16 :: int)::ii) :: 16 Word.word)) in + (let result = ((slice concat1 lsb1 (( 16 :: int)::ii) :: 16 Word.word)) in aset_X d result)))))) - else if (((l__271 = (( 32 :: int)::ii)))) then + else if (((l__262 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5625,9 +5651,9 @@ definition aarch64_integer_insext_extract_immediate :: " int \<Rightarrow> int (aget_X (( 32 :: int)::ii) n :: ( 32 Word.word) M) \<bind> (\<lambda> (operand1 :: 32 bits) . (aget_X (( 32 :: int)::ii) m :: ( 32 Word.word) M) \<bind> (\<lambda> (operand2 :: 32 bits) . (let (concat1 :: 64 bits) = ((concat_vec operand1 operand2 :: 64 Word.word)) in - (let result = ((slice0 concat1 lsb1 (( 32 :: int)::ii) :: 32 Word.word)) in + (let result = ((slice concat1 lsb1 (( 32 :: int)::ii) :: 32 Word.word)) in aset_X d result)))))) - else if (((l__271 = (( 64 :: int)::ii)))) then + else if (((l__262 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5635,9 +5661,9 @@ definition aarch64_integer_insext_extract_immediate :: " int \<Rightarrow> int (aget_X (( 64 :: int)::ii) n :: ( 64 Word.word) M) \<bind> (\<lambda> (operand1 :: 64 bits) . (aget_X (( 64 :: int)::ii) m :: ( 64 Word.word) M) \<bind> (\<lambda> (operand2 :: 64 bits) . (let (concat1 :: 128 bits) = ((concat_vec operand1 operand2 :: 128 Word.word)) in - (let result = ((slice0 concat1 lsb1 (( 64 :: int)::ii) :: 64 Word.word)) in + (let result = ((slice concat1 lsb1 (( 64 :: int)::ii) :: 64 Word.word)) in aset_X d result)))))) - else if (((l__271 = (( 128 :: int)::ii)))) then + else if (((l__262 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5645,18 +5671,18 @@ definition aarch64_integer_insext_extract_immediate :: " int \<Rightarrow> int (aget_X (( 128 :: int)::ii) n :: ( 128 Word.word) M) \<bind> (\<lambda> (operand1 :: 128 bits) . (aget_X (( 128 :: int)::ii) m :: ( 128 Word.word) M) \<bind> (\<lambda> (operand2 :: 128 bits) . (let (concat1 :: 256 bits) = ((concat_vec operand1 operand2 :: 256 Word.word)) in - (let result = ((slice0 concat1 lsb1 (( 128 :: int)::ii) :: 128 Word.word)) in + (let result = ((slice concat1 lsb1 (( 128 :: int)::ii) :: 128 Word.word)) in aset_X d result)))))) else - (let dbytes = (ex_int ((l__271 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__262 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" (*val aarch64_integer_arithmetic_rev : ii -> ii -> ii -> ii -> M unit*) definition aarch64_integer_arithmetic_rev :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_rev container_size d l__266 n = ( - if (((l__266 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_rev container_size d l__257 n = ( + if (((l__257 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5666,23 +5692,29 @@ definition aarch64_integer_arithmetic_rev :: " int \<Rightarrow> int \<Rightarr (let (elements_per_container :: ii) = (container_size div (( 8 :: int)::ii)) in (let (index1 :: ii) = ((( 0 :: int)::ii)) in undefined_int () \<bind> (\<lambda> (rev_index :: ii) . - (let (result :: 8 bits) = - (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> c result . + (let ((index1 :: ii), (result :: 8 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> c varstup . (let (index1, result, rev_index) = varstup in (let (rev_index :: ii) = (((ex_int index1)) + ((((((ex_int elements_per_container)) - (( 1 :: int)::ii))) * (( 8 :: int)::ii)))) in - (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> e result . - (let (result :: 8 bits) = - ((set_slice0 (( 8 :: int)::ii) (( 8 :: int)::ii) result rev_index - ((slice0 operand index1 (( 8 :: int)::ii) :: 8 Word.word)) - :: 8 Word.word)) in - (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in - (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in - result)))))))) in + (let ((index1 :: ii), (result :: 8 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> e varstup . (let (index1, result, rev_index) = varstup in + (let (result :: 8 bits) = + ((set_slice (( 8 :: int)::ii) (( 8 :: int)::ii) result rev_index + ((slice operand index1 (( 8 :: int)::ii) :: 8 Word.word)) + :: 8 Word.word)) in + (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in + (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in + (index1, result, rev_index))))))) in + (index1, result, rev_index)))))) in aset_X d result)))))))) - else if (((l__266 = (( 16 :: int)::ii)))) then + else if (((l__257 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5692,23 +5724,29 @@ definition aarch64_integer_arithmetic_rev :: " int \<Rightarrow> int \<Rightarr (let (elements_per_container :: ii) = (container_size div (( 8 :: int)::ii)) in (let (index1 :: ii) = ((( 0 :: int)::ii)) in undefined_int () \<bind> (\<lambda> (rev_index :: ii) . - (let (result :: 16 bits) = - (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> c result . + (let ((index1 :: ii), (result :: 16 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> c varstup . (let (index1, result, rev_index) = varstup in (let (rev_index :: ii) = (((ex_int index1)) + ((((((ex_int elements_per_container)) - (( 1 :: int)::ii))) * (( 8 :: int)::ii)))) in - (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> e result . - (let (result :: 16 bits) = - ((set_slice0 (( 16 :: int)::ii) (( 8 :: int)::ii) result rev_index - ((slice0 operand index1 (( 8 :: int)::ii) :: 8 Word.word)) - :: 16 Word.word)) in - (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in - (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in - result)))))))) in + (let ((index1 :: ii), (result :: 16 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> e varstup . (let (index1, result, rev_index) = varstup in + (let (result :: 16 bits) = + ((set_slice (( 16 :: int)::ii) (( 8 :: int)::ii) result rev_index + ((slice operand index1 (( 8 :: int)::ii) :: 8 Word.word)) + :: 16 Word.word)) in + (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in + (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in + (index1, result, rev_index))))))) in + (index1, result, rev_index)))))) in aset_X d result)))))))) - else if (((l__266 = (( 32 :: int)::ii)))) then + else if (((l__257 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5718,23 +5756,29 @@ definition aarch64_integer_arithmetic_rev :: " int \<Rightarrow> int \<Rightarr (let (elements_per_container :: ii) = (container_size div (( 8 :: int)::ii)) in (let (index1 :: ii) = ((( 0 :: int)::ii)) in undefined_int () \<bind> (\<lambda> (rev_index :: ii) . - (let (result :: 32 bits) = - (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> c result . + (let ((index1 :: ii), (result :: 32 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> c varstup . (let (index1, result, rev_index) = varstup in (let (rev_index :: ii) = (((ex_int index1)) + ((((((ex_int elements_per_container)) - (( 1 :: int)::ii))) * (( 8 :: int)::ii)))) in - (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> e result . - (let (result :: 32 bits) = - ((set_slice0 (( 32 :: int)::ii) (( 8 :: int)::ii) result rev_index - ((slice0 operand index1 (( 8 :: int)::ii) :: 8 Word.word)) - :: 32 Word.word)) in - (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in - (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in - result)))))))) in + (let ((index1 :: ii), (result :: 32 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> e varstup . (let (index1, result, rev_index) = varstup in + (let (result :: 32 bits) = + ((set_slice (( 32 :: int)::ii) (( 8 :: int)::ii) result rev_index + ((slice operand index1 (( 8 :: int)::ii) :: 8 Word.word)) + :: 32 Word.word)) in + (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in + (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in + (index1, result, rev_index))))))) in + (index1, result, rev_index)))))) in aset_X d result)))))))) - else if (((l__266 = (( 64 :: int)::ii)))) then + else if (((l__257 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5744,23 +5788,29 @@ definition aarch64_integer_arithmetic_rev :: " int \<Rightarrow> int \<Rightarr (let (elements_per_container :: ii) = (container_size div (( 8 :: int)::ii)) in (let (index1 :: ii) = ((( 0 :: int)::ii)) in undefined_int () \<bind> (\<lambda> (rev_index :: ii) . - (let (result :: 64 bits) = - (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> c result . + (let ((index1 :: ii), (result :: 64 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> c varstup . (let (index1, result, rev_index) = varstup in (let (rev_index :: ii) = (((ex_int index1)) + ((((((ex_int elements_per_container)) - (( 1 :: int)::ii))) * (( 8 :: int)::ii)))) in - (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> e result . - (let (result :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 8 :: int)::ii) result rev_index - ((slice0 operand index1 (( 8 :: int)::ii) :: 8 Word.word)) - :: 64 Word.word)) in - (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in - (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in - result)))))))) in + (let ((index1 :: ii), (result :: 64 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> e varstup . (let (index1, result, rev_index) = varstup in + (let (result :: 64 bits) = + ((set_slice (( 64 :: int)::ii) (( 8 :: int)::ii) result rev_index + ((slice operand index1 (( 8 :: int)::ii) :: 8 Word.word)) + :: 64 Word.word)) in + (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in + (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in + (index1, result, rev_index))))))) in + (index1, result, rev_index)))))) in aset_X d result)))))))) - else if (((l__266 = (( 128 :: int)::ii)))) then + else if (((l__257 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5770,32 +5820,38 @@ definition aarch64_integer_arithmetic_rev :: " int \<Rightarrow> int \<Rightarr (let (elements_per_container :: ii) = (container_size div (( 8 :: int)::ii)) in (let (index1 :: ii) = ((( 0 :: int)::ii)) in undefined_int () \<bind> (\<lambda> (rev_index :: ii) . - (let (result :: 128 bits) = - (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> c result . + (let ((index1 :: ii), (result :: 128 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int containers)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> c varstup . (let (index1, result, rev_index) = varstup in (let (rev_index :: ii) = (((ex_int index1)) + ((((((ex_int elements_per_container)) - (( 1 :: int)::ii))) * (( 8 :: int)::ii)))) in - (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result - (\<lambda> e result . - (let (result :: 128 bits) = - ((set_slice0 (( 128 :: int)::ii) (( 8 :: int)::ii) result rev_index - ((slice0 operand index1 (( 8 :: int)::ii) :: 8 Word.word)) - :: 128 Word.word)) in - (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in - (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in - result)))))))) in + (let ((index1 :: ii), (result :: 128 bits), (rev_index :: ii)) = + (foreach (index_list (( 0 :: int)::ii) ((((ex_int elements_per_container)) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (index1, + result, + rev_index) + (\<lambda> e varstup . (let (index1, result, rev_index) = varstup in + (let (result :: 128 bits) = + ((set_slice (( 128 :: int)::ii) (( 8 :: int)::ii) result rev_index + ((slice operand index1 (( 8 :: int)::ii) :: 8 Word.word)) + :: 128 Word.word)) in + (let (index1 :: ii) = (((ex_int index1)) + (( 8 :: int)::ii)) in + (let (rev_index :: ii) = (((ex_int rev_index)) - (( 8 :: int)::ii)) in + (index1, result, rev_index))))))) in + (index1, result, rev_index)))))) in aset_X d result)))))))) else - (let dbytes = (ex_int ((l__266 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__257 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" (*val aarch64_integer_arithmetic_rbit : ii -> ii -> ii -> M unit*) definition aarch64_integer_arithmetic_rbit :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_rbit d l__261 n = ( - if (((l__261 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_rbit d l__252 n = ( + if (((l__252 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5804,11 +5860,11 @@ definition aarch64_integer_arithmetic_rbit :: " int \<Rightarrow> int \<Rightar (let (result :: 8 bits) = (foreach (index_list (( 0 :: int)::ii) (((( 8 :: int)::ii) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result (\<lambda> i result . - (set_slice0 (( 8 :: int)::ii) (( 1 :: int)::ii) result (((((( 8 :: int)::ii) - (( 1 :: int)::ii))) - i)) + (set_slice (( 8 :: int)::ii) (( 1 :: int)::ii) result (((((( 8 :: int)::ii) - (( 1 :: int)::ii))) - i)) (vec_of_bits [access_vec_dec operand i] :: 1 Word.word) :: 8 Word.word))) in aset_X d result)))) - else if (((l__261 = (( 16 :: int)::ii)))) then + else if (((l__252 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5817,11 +5873,11 @@ definition aarch64_integer_arithmetic_rbit :: " int \<Rightarrow> int \<Rightar (let (result :: 16 bits) = (foreach (index_list (( 0 :: int)::ii) (((( 16 :: int)::ii) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result (\<lambda> i result . - (set_slice0 (( 16 :: int)::ii) (( 1 :: int)::ii) result (((((( 16 :: int)::ii) - (( 1 :: int)::ii))) - i)) + (set_slice (( 16 :: int)::ii) (( 1 :: int)::ii) result (((((( 16 :: int)::ii) - (( 1 :: int)::ii))) - i)) (vec_of_bits [access_vec_dec operand i] :: 1 Word.word) :: 16 Word.word))) in aset_X d result)))) - else if (((l__261 = (( 32 :: int)::ii)))) then + else if (((l__252 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5830,11 +5886,11 @@ definition aarch64_integer_arithmetic_rbit :: " int \<Rightarrow> int \<Rightar (let (result :: 32 bits) = (foreach (index_list (( 0 :: int)::ii) (((( 32 :: int)::ii) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result (\<lambda> i result . - (set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) result (((((( 32 :: int)::ii) - (( 1 :: int)::ii))) - i)) + (set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) result (((((( 32 :: int)::ii) - (( 1 :: int)::ii))) - i)) (vec_of_bits [access_vec_dec operand i] :: 1 Word.word) :: 32 Word.word))) in aset_X d result)))) - else if (((l__261 = (( 64 :: int)::ii)))) then + else if (((l__252 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5843,11 +5899,11 @@ definition aarch64_integer_arithmetic_rbit :: " int \<Rightarrow> int \<Rightar (let (result :: 64 bits) = (foreach (index_list (( 0 :: int)::ii) (((( 64 :: int)::ii) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result (\<lambda> i result . - (set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) result (((((( 64 :: int)::ii) - (( 1 :: int)::ii))) - i)) + (set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) result (((((( 64 :: int)::ii) - (( 1 :: int)::ii))) - i)) (vec_of_bits [access_vec_dec operand i] :: 1 Word.word) :: 64 Word.word))) in aset_X d result)))) - else if (((l__261 = (( 128 :: int)::ii)))) then + else if (((l__252 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5856,12 +5912,12 @@ definition aarch64_integer_arithmetic_rbit :: " int \<Rightarrow> int \<Rightar (let (result :: 128 bits) = (foreach (index_list (( 0 :: int)::ii) (((( 128 :: int)::ii) - (( 1 :: int)::ii))) (( 1 :: int)::ii)) result (\<lambda> i result . - (set_slice0 (( 128 :: int)::ii) (( 1 :: int)::ii) result (((((( 128 :: int)::ii) - (( 1 :: int)::ii))) - i)) + (set_slice (( 128 :: int)::ii) (( 1 :: int)::ii) result (((((( 128 :: int)::ii) - (( 1 :: int)::ii))) - i)) (vec_of_bits [access_vec_dec operand i] :: 1 Word.word) :: 128 Word.word))) in aset_X d result)))) else - (let dbytes = (ex_int ((l__261 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__252 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -5881,8 +5937,8 @@ definition integer_arithmetic_rbit_decode :: "(1)Word.word \<Rightarrow>(1)Word (*val aarch64_integer_arithmetic_mul_widening_64128hi : ii -> ii -> ii -> ii -> bool -> M unit*) definition aarch64_integer_arithmetic_mul_widening_64128hi :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_mul_widening_64128hi d l__256 m n unsigned = ( - if (((l__256 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_mul_widening_64128hi d l__247 m n unsigned = ( + if (((l__247 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5892,7 +5948,7 @@ definition aarch64_integer_arithmetic_mul_widening_64128hi :: " int \<Rightarro (((ex_int ((asl_Int operand1 unsigned)))) * ((ex_int ((asl_Int operand2 unsigned))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 64 :: int)::ii) :: 64 Word.word)))))) - else if (((l__256 = (( 16 :: int)::ii)))) then + else if (((l__247 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5902,7 +5958,7 @@ definition aarch64_integer_arithmetic_mul_widening_64128hi :: " int \<Rightarro (((ex_int ((asl_Int operand1 unsigned)))) * ((ex_int ((asl_Int operand2 unsigned))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 64 :: int)::ii) :: 64 Word.word)))))) - else if (((l__256 = (( 32 :: int)::ii)))) then + else if (((l__247 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5912,7 +5968,7 @@ definition aarch64_integer_arithmetic_mul_widening_64128hi :: " int \<Rightarro (((ex_int ((asl_Int operand1 unsigned)))) * ((ex_int ((asl_Int operand2 unsigned))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 64 :: int)::ii) :: 64 Word.word)))))) - else if (((l__256 = (( 64 :: int)::ii)))) then + else if (((l__247 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5922,7 +5978,7 @@ definition aarch64_integer_arithmetic_mul_widening_64128hi :: " int \<Rightarro (((ex_int ((asl_Int operand1 unsigned)))) * ((ex_int ((asl_Int operand2 unsigned))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 64 :: int)::ii) :: 64 Word.word)))))) - else if (((l__256 = (( 128 :: int)::ii)))) then + else if (((l__247 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -5933,7 +5989,7 @@ definition aarch64_integer_arithmetic_mul_widening_64128hi :: " int \<Rightarro aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 64 :: int)::ii) :: 64 Word.word)))))) else - (let dbytes = (ex_int ((l__256 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__247 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -5955,8 +6011,8 @@ definition integer_arithmetic_mul_widening_64128hi_decode :: "(1)Word.word \<Ri (*val aarch64_integer_arithmetic_mul_widening_3264 : ii -> ii -> ii -> ii -> ii -> ii -> bool -> bool -> M unit*) definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow> bool \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_mul_widening_3264 a d l__229 l__230 m n sub_op unsigned = ( - if ((((((l__229 = (( 8 :: int)::ii)))) \<and> (((l__230 = (( 32 :: int)::ii))))))) then + " aarch64_integer_arithmetic_mul_widening_3264 a d l__220 l__221 m n sub_op unsigned = ( + if ((((((l__220 = (( 8 :: int)::ii)))) \<and> (((l__221 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -5976,7 +6032,7 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if ((((((l__229 = (( 8 :: int)::ii)))) \<and> (((l__230 = (( 64 :: int)::ii))))))) then + else if ((((((l__220 = (( 8 :: int)::ii)))) \<and> (((l__221 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -5996,8 +6052,8 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__229 = (( 8 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__229 = (( 16 :: int)::ii)))) \<and> (((l__230 = (( 32 :: int)::ii))))))) then + else if (((l__220 = (( 8 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__220 = (( 16 :: int)::ii)))) \<and> (((l__221 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6017,7 +6073,7 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if ((((((l__229 = (( 16 :: int)::ii)))) \<and> (((l__230 = (( 64 :: int)::ii))))))) then + else if ((((((l__220 = (( 16 :: int)::ii)))) \<and> (((l__221 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6037,8 +6093,8 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__229 = (( 16 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__229 = (( 32 :: int)::ii)))) \<and> (((l__230 = (( 32 :: int)::ii))))))) then + else if (((l__220 = (( 16 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__220 = (( 32 :: int)::ii)))) \<and> (((l__221 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6058,7 +6114,7 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if ((((((l__229 = (( 32 :: int)::ii)))) \<and> (((l__230 = (( 64 :: int)::ii))))))) then + else if ((((((l__220 = (( 32 :: int)::ii)))) \<and> (((l__221 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6078,8 +6134,8 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__229 = (( 32 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__229 = (( 64 :: int)::ii)))) \<and> (((l__230 = (( 32 :: int)::ii))))))) then + else if (((l__220 = (( 32 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__220 = (( 64 :: int)::ii)))) \<and> (((l__221 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6099,7 +6155,7 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if ((((((l__229 = (( 64 :: int)::ii)))) \<and> (((l__230 = (( 64 :: int)::ii))))))) then + else if ((((((l__220 = (( 64 :: int)::ii)))) \<and> (((l__221 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6119,8 +6175,8 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__229 = (( 64 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__229 = (( 128 :: int)::ii)))) \<and> (((l__230 = (( 32 :: int)::ii))))))) then + else if (((l__220 = (( 64 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__220 = (( 128 :: int)::ii)))) \<and> (((l__221 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6140,7 +6196,7 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if ((((((l__229 = (( 128 :: int)::ii)))) \<and> (((l__230 = (( 64 :: int)::ii))))))) then + else if ((((((l__220 = (( 128 :: int)::ii)))) \<and> (((l__221 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6160,14 +6216,14 @@ definition aarch64_integer_arithmetic_mul_widening_3264 :: " int \<Rightarrow> ((ex_int ((asl_Int operand2 unsigned))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__229 = (( 128 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if (((l__230 = (( 32 :: int)::ii)))) then + else if (((l__220 = (( 128 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if (((l__221 = (( 32 :: int)::ii)))) then assert_exp True (''destsize constraint'') \<then> - ((let dbytes = (ex_int ((l__229 div (( 8 :: int)::ii)))) in + ((let dbytes = (ex_int ((l__220 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint''))) - else if (((l__230 = (( 64 :: int)::ii)))) then + else if (((l__221 = (( 64 :: int)::ii)))) then assert_exp True (''destsize constraint'') \<then> - ((let dbytes = (ex_int ((l__229 div (( 8 :: int)::ii)))) in + ((let dbytes = (ex_int ((l__220 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint''))) else assert_exp True (''destsize constraint''))" @@ -6191,8 +6247,8 @@ definition integer_arithmetic_mul_widening_3264_decode :: "(1)Word.word \<Right (*val aarch64_integer_arithmetic_mul_uniform_addsub : ii -> ii -> ii -> ii -> ii -> ii -> bool -> M unit*) definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_mul_uniform_addsub a d l__202 l__203 m n sub_op = ( - if ((((((l__202 = (( 8 :: int)::ii)))) \<and> (((l__203 = (( 32 :: int)::ii))))))) then + " aarch64_integer_arithmetic_mul_uniform_addsub a d l__193 l__194 m n sub_op = ( + if ((((((l__193 = (( 8 :: int)::ii)))) \<and> (((l__194 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6207,7 +6263,7 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 32 :: int)::ii) :: 32 itself)) result (( 0 :: int)::ii) :: 32 Word.word))))))))) - else if ((((((l__202 = (( 8 :: int)::ii)))) \<and> (((l__203 = (( 64 :: int)::ii))))))) then + else if ((((((l__193 = (( 8 :: int)::ii)))) \<and> (((l__194 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6222,8 +6278,8 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__202 = (( 8 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__202 = (( 16 :: int)::ii)))) \<and> (((l__203 = (( 32 :: int)::ii))))))) then + else if (((l__193 = (( 8 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__193 = (( 16 :: int)::ii)))) \<and> (((l__194 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6238,7 +6294,7 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 32 :: int)::ii) :: 32 itself)) result (( 0 :: int)::ii) :: 32 Word.word))))))))) - else if ((((((l__202 = (( 16 :: int)::ii)))) \<and> (((l__203 = (( 64 :: int)::ii))))))) then + else if ((((((l__193 = (( 16 :: int)::ii)))) \<and> (((l__194 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6253,8 +6309,8 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__202 = (( 16 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__202 = (( 32 :: int)::ii)))) \<and> (((l__203 = (( 32 :: int)::ii))))))) then + else if (((l__193 = (( 16 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__193 = (( 32 :: int)::ii)))) \<and> (((l__194 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6269,7 +6325,7 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 32 :: int)::ii) :: 32 itself)) result (( 0 :: int)::ii) :: 32 Word.word))))))))) - else if ((((((l__202 = (( 32 :: int)::ii)))) \<and> (((l__203 = (( 64 :: int)::ii))))))) then + else if ((((((l__193 = (( 32 :: int)::ii)))) \<and> (((l__194 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6284,8 +6340,8 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__202 = (( 32 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__202 = (( 64 :: int)::ii)))) \<and> (((l__203 = (( 32 :: int)::ii))))))) then + else if (((l__193 = (( 32 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__193 = (( 64 :: int)::ii)))) \<and> (((l__194 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6300,7 +6356,7 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 32 :: int)::ii) :: 32 itself)) result (( 0 :: int)::ii) :: 32 Word.word))))))))) - else if ((((((l__202 = (( 64 :: int)::ii)))) \<and> (((l__203 = (( 64 :: int)::ii))))))) then + else if ((((((l__193 = (( 64 :: int)::ii)))) \<and> (((l__194 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6315,8 +6371,8 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__202 = (( 64 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if ((((((l__202 = (( 128 :: int)::ii)))) \<and> (((l__203 = (( 32 :: int)::ii))))))) then + else if (((l__193 = (( 64 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if ((((((l__193 = (( 128 :: int)::ii)))) \<and> (((l__194 = (( 32 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6331,7 +6387,7 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 32 :: int)::ii) :: 32 itself)) result (( 0 :: int)::ii) :: 32 Word.word))))))))) - else if ((((((l__202 = (( 128 :: int)::ii)))) \<and> (((l__203 = (( 64 :: int)::ii))))))) then + else if ((((((l__193 = (( 128 :: int)::ii)))) \<and> (((l__194 = (( 64 :: int)::ii))))))) then assert_exp True (''destsize constraint'') \<then> ((let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> @@ -6346,14 +6402,14 @@ definition aarch64_integer_arithmetic_mul_uniform_addsub :: " int \<Rightarrow> else ((Word.uint operand3)) + ((((Word.uint operand1)) * ((Word.uint operand2))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))))) - else if (((l__202 = (( 128 :: int)::ii)))) then assert_exp True (''destsize constraint'') - else if (((l__203 = (( 32 :: int)::ii)))) then + else if (((l__193 = (( 128 :: int)::ii)))) then assert_exp True (''destsize constraint'') + else if (((l__194 = (( 32 :: int)::ii)))) then assert_exp True (''destsize constraint'') \<then> - ((let dbytes = (ex_int ((l__202 div (( 8 :: int)::ii)))) in + ((let dbytes = (ex_int ((l__193 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint''))) - else if (((l__203 = (( 64 :: int)::ii)))) then + else if (((l__194 = (( 64 :: int)::ii)))) then assert_exp True (''destsize constraint'') \<then> - ((let dbytes = (ex_int ((l__202 div (( 8 :: int)::ii)))) in + ((let dbytes = (ex_int ((l__193 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint''))) else assert_exp True (''destsize constraint''))" @@ -6378,8 +6434,8 @@ definition integer_arithmetic_mul_uniform_addsub_decode :: "(1)Word.word \<Righ (*val aarch64_integer_arithmetic_div : ii -> ii -> ii -> ii -> bool -> M unit*) definition aarch64_integer_arithmetic_div :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_div d l__197 m n unsigned = ( - if (((l__197 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_div d l__188 m n unsigned = ( + if (((l__188 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6393,7 +6449,7 @@ definition aarch64_integer_arithmetic_div :: " int \<Rightarrow> int \<Rightarr (((((real_of_int ((asl_Int operand1 unsigned))))) div (((real_of_int ((asl_Int operand2 unsigned)))))))) in aset_X d ((GetSlice_int ((make_the_value (( 8 :: int)::ii) :: 8 itself)) result (( 0 :: int)::ii) :: 8 Word.word))))))) - else if (((l__197 = (( 16 :: int)::ii)))) then + else if (((l__188 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6408,7 +6464,7 @@ definition aarch64_integer_arithmetic_div :: " int \<Rightarrow> int \<Rightarr (((real_of_int ((asl_Int operand2 unsigned)))))))) in aset_X d ((GetSlice_int ((make_the_value (( 16 :: int)::ii) :: 16 itself)) result (( 0 :: int)::ii) :: 16 Word.word))))))) - else if (((l__197 = (( 32 :: int)::ii)))) then + else if (((l__188 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6423,7 +6479,7 @@ definition aarch64_integer_arithmetic_div :: " int \<Rightarrow> int \<Rightarr (((real_of_int ((asl_Int operand2 unsigned)))))))) in aset_X d ((GetSlice_int ((make_the_value (( 32 :: int)::ii) :: 32 itself)) result (( 0 :: int)::ii) :: 32 Word.word))))))) - else if (((l__197 = (( 64 :: int)::ii)))) then + else if (((l__188 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6438,7 +6494,7 @@ definition aarch64_integer_arithmetic_div :: " int \<Rightarrow> int \<Rightarr (((real_of_int ((asl_Int operand2 unsigned)))))))) in aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word))))))) - else if (((l__197 = (( 128 :: int)::ii)))) then + else if (((l__188 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6454,7 +6510,7 @@ definition aarch64_integer_arithmetic_div :: " int \<Rightarrow> int \<Rightarr aset_X d ((GetSlice_int ((make_the_value (( 128 :: int)::ii) :: 128 itself)) result (( 0 :: int)::ii) :: 128 Word.word))))))) else - (let dbytes = (ex_int ((l__197 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__188 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -6476,8 +6532,8 @@ definition integer_arithmetic_div_decode :: "(1)Word.word \<Rightarrow>(1)Word. (*val aarch64_integer_arithmetic_cnt : ii -> ii -> ii -> CountOp -> M unit*) definition aarch64_integer_arithmetic_cnt :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> CountOp \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_cnt d l__192 n opcode = ( - if (((l__192 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_cnt d l__183 n opcode = ( + if (((l__183 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6486,7 +6542,7 @@ definition aarch64_integer_arithmetic_cnt :: " int \<Rightarrow> int \<Rightarr (if (((opcode = CountOp_CLZ))) then CountLeadingZeroBits operand1 else CountLeadingSignBits operand1) \<bind> (\<lambda> (result :: ii) . aset_X d ((GetSlice_int ((make_the_value (( 8 :: int)::ii) :: 8 itself)) result (( 0 :: int)::ii) :: 8 Word.word)))))) - else if (((l__192 = (( 16 :: int)::ii)))) then + else if (((l__183 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6496,7 +6552,7 @@ definition aarch64_integer_arithmetic_cnt :: " int \<Rightarrow> int \<Rightarr else CountLeadingSignBits operand1) \<bind> (\<lambda> (result :: ii) . aset_X d ((GetSlice_int ((make_the_value (( 16 :: int)::ii) :: 16 itself)) result (( 0 :: int)::ii) :: 16 Word.word)))))) - else if (((l__192 = (( 32 :: int)::ii)))) then + else if (((l__183 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6506,7 +6562,7 @@ definition aarch64_integer_arithmetic_cnt :: " int \<Rightarrow> int \<Rightarr else CountLeadingSignBits operand1) \<bind> (\<lambda> (result :: ii) . aset_X d ((GetSlice_int ((make_the_value (( 32 :: int)::ii) :: 32 itself)) result (( 0 :: int)::ii) :: 32 Word.word)))))) - else if (((l__192 = (( 64 :: int)::ii)))) then + else if (((l__183 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6516,7 +6572,7 @@ definition aarch64_integer_arithmetic_cnt :: " int \<Rightarrow> int \<Rightarr else CountLeadingSignBits operand1) \<bind> (\<lambda> (result :: ii) . aset_X d ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) result (( 0 :: int)::ii) :: 64 Word.word)))))) - else if (((l__192 = (( 128 :: int)::ii)))) then + else if (((l__183 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6527,7 +6583,7 @@ definition aarch64_integer_arithmetic_cnt :: " int \<Rightarrow> int \<Rightarr aset_X d ((GetSlice_int ((make_the_value (( 128 :: int)::ii) :: 128 itself)) result (( 0 :: int)::ii) :: 128 Word.word)))))) else - (let dbytes = (ex_int ((l__192 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__183 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -6550,8 +6606,8 @@ definition integer_arithmetic_cnt_decode :: "(1)Word.word \<Rightarrow>(1)Word. (*val aarch64_integer_arithmetic_addsub_carry : ii -> ii -> ii -> ii -> bool -> bool -> M unit*) definition aarch64_integer_arithmetic_addsub_carry :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow> bool \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_addsub_carry d l__187 m n setflags sub_op = ( - if (((l__187 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_addsub_carry d l__178 m n setflags sub_op = ( + if (((l__178 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6581,7 +6637,7 @@ definition aarch64_integer_arithmetic_addsub_carry :: " int \<Rightarrow> int \ write_reg PSTATE_ref (w__4 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__187 = (( 16 :: int)::ii)))) then + else if (((l__178 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6611,7 +6667,7 @@ definition aarch64_integer_arithmetic_addsub_carry :: " int \<Rightarrow> int \ write_reg PSTATE_ref (w__9 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__187 = (( 32 :: int)::ii)))) then + else if (((l__178 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6641,7 +6697,7 @@ definition aarch64_integer_arithmetic_addsub_carry :: " int \<Rightarrow> int \ write_reg PSTATE_ref (w__14 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__187 = (( 64 :: int)::ii)))) then + else if (((l__178 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6671,7 +6727,7 @@ definition aarch64_integer_arithmetic_addsub_carry :: " int \<Rightarrow> int \ write_reg PSTATE_ref (w__19 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__187 = (( 128 :: int)::ii)))) then + else if (((l__178 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6702,7 +6758,7 @@ definition aarch64_integer_arithmetic_addsub_carry :: " int \<Rightarrow> int \ else return () ) \<then> aset_X d result)))))))))) else - (let dbytes = (ex_int ((l__187 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__178 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -6859,8 +6915,8 @@ definition ShiftReg :: " int \<Rightarrow> int \<Rightarrow> ShiftType \<Righta (*val aarch64_integer_shift_variable : ii -> ii -> ii -> ii -> ShiftType -> M unit*) definition aarch64_integer_shift_variable :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> ShiftType \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_shift_variable d l__182 m n shift_type = ( - if (((l__182 = (( 8 :: int)::ii)))) then + " aarch64_integer_shift_variable d l__173 m n shift_type = ( + if (((l__173 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6870,7 +6926,7 @@ definition aarch64_integer_shift_variable :: " int \<Rightarrow> int \<Rightarr bits) . (let result = w__0 in aset_X d result))))) - else if (((l__182 = (( 16 :: int)::ii)))) then + else if (((l__173 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6880,7 +6936,7 @@ definition aarch64_integer_shift_variable :: " int \<Rightarrow> int \<Rightarr bits) . (let result = w__1 in aset_X d result))))) - else if (((l__182 = (( 32 :: int)::ii)))) then + else if (((l__173 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6890,7 +6946,7 @@ definition aarch64_integer_shift_variable :: " int \<Rightarrow> int \<Rightarr bits) . (let result = w__2 in aset_X d result))))) - else if (((l__182 = (( 64 :: int)::ii)))) then + else if (((l__173 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6900,7 +6956,7 @@ definition aarch64_integer_shift_variable :: " int \<Rightarrow> int \<Rightarr bits) . (let result = w__3 in aset_X d result))))) - else if (((l__182 = (( 128 :: int)::ii)))) then + else if (((l__173 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6911,7 +6967,7 @@ definition aarch64_integer_shift_variable :: " int \<Rightarrow> int \<Rightarr (let result = w__4 in aset_X d result))))) else - (let dbytes = (ex_int ((l__182 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__173 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -6933,8 +6989,8 @@ definition integer_shift_variable_decode :: "(1)Word.word \<Rightarrow>(1)Word. (*val aarch64_integer_logical_shiftedreg : ii -> ii -> bool -> ii -> ii -> LogicalOp -> bool -> ii -> ShiftType -> M unit*) definition aarch64_integer_logical_shiftedreg :: " int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow> int \<Rightarrow> int \<Rightarrow> LogicalOp \<Rightarrow> bool \<Rightarrow> int \<Rightarrow> ShiftType \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_logical_shiftedreg d l__177 invert m n op1 setflags shift_amount shift_type = ( - if (((l__177 = (( 8 :: int)::ii)))) then + " aarch64_integer_logical_shiftedreg d l__168 invert m n op1 setflags shift_amount shift_type = ( + if (((l__168 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -6971,7 +7027,7 @@ definition aarch64_integer_logical_shiftedreg :: " int \<Rightarrow> int \<Righ write_reg PSTATE_ref (w__3 (| ProcState_V := tup__3 |)))))))) else return () ) \<then> aset_X d result)))))) - else if (((l__177 = (( 16 :: int)::ii)))) then + else if (((l__168 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7008,7 +7064,7 @@ definition aarch64_integer_logical_shiftedreg :: " int \<Rightarrow> int \<Righ write_reg PSTATE_ref (w__7 (| ProcState_V := tup__3 |)))))))) else return () ) \<then> aset_X d result)))))) - else if (((l__177 = (( 32 :: int)::ii)))) then + else if (((l__168 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7045,7 +7101,7 @@ definition aarch64_integer_logical_shiftedreg :: " int \<Rightarrow> int \<Righ write_reg PSTATE_ref (w__11 (| ProcState_V := tup__3 |)))))))) else return () ) \<then> aset_X d result)))))) - else if (((l__177 = (( 64 :: int)::ii)))) then + else if (((l__168 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7082,7 +7138,7 @@ definition aarch64_integer_logical_shiftedreg :: " int \<Rightarrow> int \<Righ write_reg PSTATE_ref (w__15 (| ProcState_V := tup__3 |)))))))) else return () ) \<then> aset_X d result)))))) - else if (((l__177 = (( 128 :: int)::ii)))) then + else if (((l__168 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7120,15 +7176,15 @@ definition aarch64_integer_logical_shiftedreg :: " int \<Rightarrow> int \<Righ else return () ) \<then> aset_X d result)))))) else - (let dbytes = (ex_int ((l__177 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__168 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" (*val aarch64_integer_arithmetic_addsub_shiftedreg : ii -> ii -> ii -> ii -> bool -> ii -> ShiftType -> bool -> M unit*) definition aarch64_integer_arithmetic_addsub_shiftedreg :: " int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow> int \<Rightarrow> ShiftType \<Rightarrow> bool \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_addsub_shiftedreg d l__172 m n setflags shift_amount shift_type sub_op = ( - if (((l__172 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_addsub_shiftedreg d l__163 m n setflags shift_amount shift_type sub_op = ( + if (((l__163 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7164,7 +7220,7 @@ definition aarch64_integer_arithmetic_addsub_shiftedreg :: " int \<Rightarrow> write_reg PSTATE_ref (w__3 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__172 = (( 16 :: int)::ii)))) then + else if (((l__163 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7200,7 +7256,7 @@ definition aarch64_integer_arithmetic_addsub_shiftedreg :: " int \<Rightarrow> write_reg PSTATE_ref (w__7 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__172 = (( 32 :: int)::ii)))) then + else if (((l__163 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7236,7 +7292,7 @@ definition aarch64_integer_arithmetic_addsub_shiftedreg :: " int \<Rightarrow> write_reg PSTATE_ref (w__11 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__172 = (( 64 :: int)::ii)))) then + else if (((l__163 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7272,7 +7328,7 @@ definition aarch64_integer_arithmetic_addsub_shiftedreg :: " int \<Rightarrow> write_reg PSTATE_ref (w__15 (| ProcState_V := tup__3 |))))))) else return () ) \<then> aset_X d result)))))))))) - else if (((l__172 = (( 128 :: int)::ii)))) then + else if (((l__163 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7309,7 +7365,7 @@ definition aarch64_integer_arithmetic_addsub_shiftedreg :: " int \<Rightarrow> else return () ) \<then> aset_X d result)))))))))) else - (let dbytes = (ex_int ((l__172 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__163 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -7320,13 +7376,13 @@ definition Prefetch :: "(64)Word.word \<Rightarrow>(5)Word.word \<Rightarrow>(( undefined_PrefetchHint () \<bind> (\<lambda> (hint :: PrefetchHint) . undefined_int () \<bind> (\<lambda> (target :: ii) . undefined_bool () \<bind> (\<lambda> (stream :: bool) . - (let b__0 = ((slice0 prfop (( 3 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let b__0 = ((slice prfop (( 3 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in (let (hint :: PrefetchHint) = (if (((b__0 = (vec_of_bits [B0,B0] :: 2 Word.word)))) then Prefetch_READ else if (((b__0 = (vec_of_bits [B0,B1] :: 2 Word.word)))) then Prefetch_EXEC else if (((b__0 = (vec_of_bits [B1,B0] :: 2 Word.word)))) then Prefetch_WRITE else hint) in - (let (target :: ii) = (Word.uint ((slice0 prfop (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in + (let (target :: ii) = (Word.uint ((slice prfop (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in (let (stream :: bool) = ((vec_of_bits [access_vec_dec prfop (( 0 :: int)::ii)] :: 1 Word.word) \<noteq> (vec_of_bits [B0] :: 1 Word.word)) in (let (_ :: unit) = (Hint_Prefetch address hint target stream) in @@ -7555,8 +7611,8 @@ definition aarch64_integer_arithmetic_addsub_immediate :: " int \<Rightarrow>(' (*val aarch64_integer_arithmetic_addsub_extendedreg : ii -> ii -> ExtendType -> ii -> ii -> bool -> ii -> bool -> M unit*) definition aarch64_integer_arithmetic_addsub_extendedreg :: " int \<Rightarrow> int \<Rightarrow> ExtendType \<Rightarrow> int \<Rightarrow> int \<Rightarrow> bool \<Rightarrow> int \<Rightarrow> bool \<Rightarrow>((register_value),(unit),(exception))monad " where - " aarch64_integer_arithmetic_addsub_extendedreg d l__167 extend_type m n setflags shift sub_op = ( - if (((l__167 = (( 8 :: int)::ii)))) then + " aarch64_integer_arithmetic_addsub_extendedreg d l__158 extend_type m n setflags shift sub_op = ( + if (((l__158 = (( 8 :: int)::ii)))) then (let dbytes = (ex_int (((( 8 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7594,7 +7650,7 @@ definition aarch64_integer_arithmetic_addsub_extendedreg :: " int \<Rightarrow> else return () ) \<then> (if ((((((d = (( 31 :: int)::ii)))) \<and> ((\<not> setflags))))) then aset_SP result else aset_X d result))))))))))) - else if (((l__167 = (( 16 :: int)::ii)))) then + else if (((l__158 = (( 16 :: int)::ii)))) then (let dbytes = (ex_int (((( 16 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7632,7 +7688,7 @@ definition aarch64_integer_arithmetic_addsub_extendedreg :: " int \<Rightarrow> else return () ) \<then> (if ((((((d = (( 31 :: int)::ii)))) \<and> ((\<not> setflags))))) then aset_SP result else aset_X d result))))))))))) - else if (((l__167 = (( 32 :: int)::ii)))) then + else if (((l__158 = (( 32 :: int)::ii)))) then (let dbytes = (ex_int (((( 32 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7670,7 +7726,7 @@ definition aarch64_integer_arithmetic_addsub_extendedreg :: " int \<Rightarrow> else return () ) \<then> (if ((((((d = (( 31 :: int)::ii)))) \<and> ((\<not> setflags))))) then aset_SP result else aset_X d result))))))))))) - else if (((l__167 = (( 64 :: int)::ii)))) then + else if (((l__158 = (( 64 :: int)::ii)))) then (let dbytes = (ex_int (((( 64 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7708,7 +7764,7 @@ definition aarch64_integer_arithmetic_addsub_extendedreg :: " int \<Rightarrow> else return () ) \<then> (if ((((((d = (( 31 :: int)::ii)))) \<and> ((\<not> setflags))))) then aset_SP result else aset_X d result))))))))))) - else if (((l__167 = (( 128 :: int)::ii)))) then + else if (((l__158 = (( 128 :: int)::ii)))) then (let dbytes = (ex_int (((( 128 :: int)::ii) div (( 8 :: int)::ii)))) in ((assert_exp True (''datasize constraint'') \<then> assert_exp True (''dbytes constraint'')) \<then> @@ -7747,7 +7803,7 @@ definition aarch64_integer_arithmetic_addsub_extendedreg :: " int \<Rightarrow> (if ((((((d = (( 31 :: int)::ii)))) \<and> ((\<not> setflags))))) then aset_SP result else aset_X d result))))))))))) else - (let dbytes = (ex_int ((l__167 div (( 8 :: int)::ii)))) in + (let dbytes = (ex_int ((l__158 div (( 8 :: int)::ii)))) in assert_exp True (''datasize constraint'')))" @@ -7882,52 +7938,52 @@ definition CalculateBottomPACBit :: "(64)Word.word \<Rightarrow>(1)Word.word \< if w__1 then (if (((top_bit = (vec_of_bits [B1] :: 1 Word.word)))) then (read_reg TCR_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__2 :: 64 bits) . - return ((Word.uint ((slice0 w__2 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) + return ((Word.uint ((slice w__2 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) else (read_reg TCR_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . - return ((Word.uint ((slice0 w__3 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)))))) \<bind> (\<lambda> (w__4 :: ii) . + return ((Word.uint ((slice w__3 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)))))) \<bind> (\<lambda> (w__4 :: ii) . (let tsz_field = w__4 in (if (((top_bit = (vec_of_bits [B1] :: 1 Word.word)))) then (read_reg TCR_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . - return (((((slice0 w__5 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word))))) + return (((((slice w__5 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word))))) else (read_reg TCR_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__6 :: 64 bits) . - return (((((slice0 w__6 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) \<bind> (\<lambda> (w__7 :: bool) . + return (((((slice w__6 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) \<bind> (\<lambda> (w__7 :: bool) . (let (using64k :: bool) = w__7 in return (tsz_field, using64k))))) else (assert_exp ((HaveEL EL2)) (''HaveEL(EL2)'') \<then> (if (((top_bit = (vec_of_bits [B1] :: 1 Word.word)))) then (read_reg TCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__8 :: 64 bits) . - return ((Word.uint ((slice0 w__8 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) + return ((Word.uint ((slice w__8 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) else (read_reg TCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__9 :: 64 bits) . - return ((Word.uint ((slice0 w__9 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))))) \<bind> (\<lambda> (w__10 :: ii) . + return ((Word.uint ((slice w__9 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))))) \<bind> (\<lambda> (w__10 :: ii) . (let tsz_field = w__10 in (if (((top_bit = (vec_of_bits [B1] :: 1 Word.word)))) then (read_reg TCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . - return (((((slice0 w__11 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word))))) + return (((((slice w__11 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word))))) else (read_reg TCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__12 :: 64 bits) . - return (((((slice0 w__12 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) \<bind> (\<lambda> (w__13 :: bool) . + return (((((slice w__12 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) \<bind> (\<lambda> (w__13 :: bool) . (let (using64k :: bool) = w__13 in return (tsz_field, using64k)))))) else read_reg PSTATE_ref \<bind> (\<lambda> (w__14 :: ProcState) . (if ((((ProcState_EL w__14) = EL2))) then (read_reg TCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__15 :: 64 bits) . - return ((Word.uint ((slice0 w__15 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) + return ((Word.uint ((slice w__15 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) else (read_reg TCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__16 :: 32 bits) . - return ((Word.uint ((slice0 w__16 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)))))) \<bind> (\<lambda> (w__17 :: ii) . + return ((Word.uint ((slice w__16 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)))))) \<bind> (\<lambda> (w__17 :: ii) . (let tsz_field = w__17 in read_reg PSTATE_ref \<bind> (\<lambda> (w__18 :: ProcState) . (if ((((ProcState_EL w__18) = EL2))) then (read_reg TCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__19 :: 64 bits) . - return (((((slice0 w__19 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word))))) + return (((((slice w__19 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word))))) else (read_reg TCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . - return (((((slice0 w__20 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + return (((((slice w__20 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . (let (using64k :: bool) = w__21 in return (tsz_field, using64k)))))))) \<bind> (\<lambda> varstup . (let ((tsz_field :: ii), (using64k :: bool)) = varstup in (let (max_limit_tsz_field :: ii) = ((( 39 :: int)::ii)) in @@ -8071,8 +8127,8 @@ definition aset_SPSR :: "(32)Word.word \<Rightarrow>((register_value),(unit),(e UsingAArch32 () \<bind> (\<lambda> (w__0 :: bool) . if w__0 then read_reg PSTATE_ref \<bind> (\<lambda> (w__1 :: ProcState) . - (let p__611 = ((ProcState_M w__1)) in - (let pat0 = p__611 in + (let p__298 = ((ProcState_M w__1)) in + (let pat0 = p__298 in if (((pat0 = M32_FIQ))) then write_reg SPSR_fiq_ref value_name else if (((pat0 = M32_IRQ))) then write_reg SPSR_irq_ref value_name else if (((pat0 = M32_Svc))) then write_reg SPSR_svc_ref value_name @@ -8083,8 +8139,8 @@ definition aset_SPSR :: "(32)Word.word \<Rightarrow>((register_value),(unit),(e else Unreachable () ))) else read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (let p__610 = ((ProcState_EL w__2)) in - (let pat0 = p__610 in + (let p__297 = ((ProcState_EL w__2)) in + (let pat0 = p__297 in if (((pat0 = EL1))) then write_reg SPSR_EL1_ref value_name else if (((pat0 = EL2))) then write_reg SPSR_EL2_ref value_name else if (((pat0 = EL3))) then write_reg SPSR_EL3_ref value_name @@ -8099,8 +8155,8 @@ definition aget_SPSR :: " unit \<Rightarrow>((register_value),((32)Word.word),( UsingAArch32 () \<bind> (\<lambda> (w__0 :: bool) . if w__0 then read_reg PSTATE_ref \<bind> (\<lambda> (w__1 :: ProcState) . - (let p__609 = ((ProcState_M w__1)) in - (let pat0 = p__609 in + (let p__296 = ((ProcState_M w__1)) in + (let pat0 = p__296 in if (((pat0 = M32_FIQ))) then (read_reg SPSR_fiq_ref :: ( 32 Word.word) M) else if (((pat0 = M32_IRQ))) then (read_reg SPSR_irq_ref :: ( 32 Word.word) M) else if (((pat0 = M32_Svc))) then (read_reg SPSR_svc_ref :: ( 32 Word.word) M) @@ -8111,8 +8167,8 @@ definition aget_SPSR :: " unit \<Rightarrow>((register_value),((32)Word.word),( else Unreachable () \<then> return result))) else read_reg PSTATE_ref \<bind> (\<lambda> (w__9 :: ProcState) . - (let p__608 = ((ProcState_EL w__9)) in - (let pat0 = p__608 in + (let p__295 = ((ProcState_EL w__9)) in + (let pat0 = p__295 in if (((pat0 = EL1))) then (read_reg SPSR_EL1_ref :: ( 32 Word.word) M) else if (((pat0 = EL2))) then (read_reg SPSR_EL2_ref :: ( 32 Word.word) M) else if (((pat0 = EL3))) then (read_reg SPSR_EL3_ref :: ( 32 Word.word) M) @@ -8160,20 +8216,20 @@ definition FPProcessException :: " FPExc \<Rightarrow>(32)Word.word \<Rightarro (read_reg FPSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__1 :: 32 Word.word) . write_reg FPSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__1 cumul (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__1 cumul (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) else (read_reg FPSR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__2 :: 32 Word.word) . write_reg FPSR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__2 cumul (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))))))))" + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__2 cumul (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))))))))" (*val FPRoundBase : forall 'N . Size 'N => integer -> real -> mword ty32 -> FPRounding -> M (mword 'N)*) definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \<Rightarrow> FPRounding \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPRoundBase (N__tv :: int) op1 fpcr rounding = ( - (let l__164 = N__tv in - if (((l__164 = (( 16 :: int)::ii)))) then + (let p00 = N__tv in + if (((p00 = (( 16 :: int)::ii)))) then (((assert_exp True ('''') \<then> assert_exp (((op1 \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) ('''')) \<then> assert_exp (((rounding \<noteq> FPRounding_TIEAWAY))) ('''')) \<then> @@ -8217,12 +8273,12 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ (read_reg FPSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__1 :: 32 Word.word) . write_reg FPSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__1 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__1 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) else (read_reg FPSR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__2 :: 32 Word.word) . write_reg FPSR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__2 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)))) \<then> + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__2 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)))) \<then> (FPZero (( 16 :: int)::ii) sign :: (( 'N::len)Word.word) M)) \<bind> (\<lambda> (w__3 :: ( 'N::len)Word.word) . return ((Word.ucast w__3 :: ( 'N::len)Word.word)))) else @@ -8288,7 +8344,7 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ else (biased_exp, int_mant)) in (let (int_mant :: ii) = (if ((((((error \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) \<and> (((rounding = FPRounding_ODD)))))) then - set_slice_int0 (( 1 :: int)::ii) int_mant (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + set_slice_int (( 1 :: int)::ii) int_mant (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) else int_mant) in (if (((False \<or> ((((vec_of_bits [access_vec_dec fpcr (( 26 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) then if ((((ex_int biased_exp)) \<ge> ((((pow2 (( 5 :: int)::ii))) - (( 1 :: int)::ii))))) then @@ -8336,7 +8392,7 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ (if (((error \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) then FPProcessException FPExc_Inexact fpcr else return () ) \<then> return ((Word.ucast result :: ( 'N::len)Word.word)))))))))))))))))))))))))) - else if (((l__164 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then (((assert_exp True ('''') \<then> assert_exp (((op1 \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) ('''')) \<then> assert_exp (((rounding \<noteq> FPRounding_TIEAWAY))) ('''')) \<then> @@ -8380,12 +8436,12 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ (read_reg FPSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__9 :: 32 Word.word) . write_reg FPSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__9 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__9 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) else (read_reg FPSR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__10 :: 32 Word.word) . write_reg FPSR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__10 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)))) \<then> + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__10 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)))) \<then> (FPZero (( 32 :: int)::ii) sign :: (( 'N::len)Word.word) M)) \<bind> (\<lambda> (w__11 :: ( 'N::len)Word.word) . return ((Word.ucast w__11 :: ( 'N::len)Word.word)))) else @@ -8451,38 +8507,15 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ else (biased_exp, int_mant)) in (let (int_mant :: ii) = (if ((((((error \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) \<and> (((rounding = FPRounding_ODD)))))) then - set_slice_int0 (( 1 :: int)::ii) int_mant (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + set_slice_int (( 1 :: int)::ii) int_mant (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) else int_mant) in - (if (((True \<or> ((((vec_of_bits [access_vec_dec fpcr (( 26 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) then - if ((((ex_int biased_exp)) \<ge> ((((pow2 (( 8 :: int)::ii))) - (( 1 :: int)::ii))))) then - (if overflow_to_inf then (FPInfinity (( 32 :: int)::ii) sign :: ( 32 Word.word) M) - else (FPMaxNormal (( 32 :: int)::ii) sign :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__14 :: 32 Word.word) . - (let result = w__14 in - FPProcessException FPExc_Overflow fpcr \<then> - ((let (error :: real) = (realFromFrac(( 10 :: int))(( 10 :: int))) in - return (error, result))))) - else - (let (result :: 32 bits) = - ((concat_vec - ((concat_vec sign - ((GetSlice_int - ((make_the_value (((((( 32 :: int)::ii) - (( 23 :: int)::ii))) - (( 1 :: int)::ii))) - :: 8 itself)) biased_exp (( 0 :: int)::ii) - :: 8 Word.word)) - :: 9 Word.word)) - ((GetSlice_int ((make_the_value (( 23 :: int)::ii) :: 23 itself)) int_mant (( 0 :: int)::ii) - :: 23 Word.word)) - :: 32 Word.word)) in - return (error, result)) - else if ((((ex_int biased_exp)) \<ge> ((pow2 (( 8 :: int)::ii))))) then - (let result = - ((concat_vec sign - ((Ones__0 ((make_the_value (((( 32 :: int)::ii) - (( 1 :: int)::ii))) :: 31 itself)) - :: 31 Word.word)) - :: 32 Word.word)) in - FPProcessException FPExc_InvalidOp fpcr \<then> - ((let (error :: real) = (realFromFrac(( 0 :: int))(( 10 :: int))) in - return (error, result)))) + (if ((((ex_int biased_exp)) \<ge> ((((pow2 (( 8 :: int)::ii))) - (( 1 :: int)::ii))))) then + (if overflow_to_inf then (FPInfinity (( 32 :: int)::ii) sign :: ( 32 Word.word) M) + else (FPMaxNormal (( 32 :: int)::ii) sign :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__14 :: 32 Word.word) . + (let result = w__14 in + FPProcessException FPExc_Overflow fpcr \<then> + ((let (error :: real) = (realFromFrac(( 10 :: int))(( 10 :: int))) in + return (error, result))))) else (let (result :: 32 bits) = ((concat_vec @@ -8499,7 +8532,7 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ (if (((error \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) then FPProcessException FPExc_Inexact fpcr else return () ) \<then> return ((Word.ucast result :: ( 'N::len)Word.word)))))))))))))))))))))))))) - else if (((l__164 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then (((assert_exp True ('''') \<then> assert_exp (((op1 \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) ('''')) \<then> assert_exp (((rounding \<noteq> FPRounding_TIEAWAY))) ('''')) \<then> @@ -8543,12 +8576,12 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ (read_reg FPSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__17 :: 32 Word.word) . write_reg FPSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__17 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__17 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word))) else (read_reg FPSR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__18 :: 32 Word.word) . write_reg FPSR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__18 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)))) \<then> + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__18 (( 3 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)))) \<then> (FPZero (( 64 :: int)::ii) sign :: (( 'N::len)Word.word) M)) \<bind> (\<lambda> (w__19 :: ( 'N::len)Word.word) . return ((Word.ucast w__19 :: ( 'N::len)Word.word)))) else @@ -8614,38 +8647,15 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ else (biased_exp, int_mant)) in (let (int_mant :: ii) = (if ((((((error \<noteq> (realFromFrac(( 0 :: int))(( 10 :: int)))))) \<and> (((rounding = FPRounding_ODD)))))) then - set_slice_int0 (( 1 :: int)::ii) int_mant (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + set_slice_int (( 1 :: int)::ii) int_mant (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) else int_mant) in - (if (((True \<or> ((((vec_of_bits [access_vec_dec fpcr (( 26 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) then - if ((((ex_int biased_exp)) \<ge> ((((pow2 (( 11 :: int)::ii))) - (( 1 :: int)::ii))))) then - (if overflow_to_inf then (FPInfinity (( 64 :: int)::ii) sign :: ( 64 Word.word) M) - else (FPMaxNormal (( 64 :: int)::ii) sign :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__22 :: 64 Word.word) . - (let result = w__22 in - FPProcessException FPExc_Overflow fpcr \<then> - ((let (error :: real) = (realFromFrac(( 10 :: int))(( 10 :: int))) in - return (error, result))))) - else - (let (result :: 64 bits) = - ((concat_vec - ((concat_vec sign - ((GetSlice_int - ((make_the_value (((((( 64 :: int)::ii) - (( 52 :: int)::ii))) - (( 1 :: int)::ii))) - :: 11 itself)) biased_exp (( 0 :: int)::ii) - :: 11 Word.word)) - :: 12 Word.word)) - ((GetSlice_int ((make_the_value (( 52 :: int)::ii) :: 52 itself)) int_mant (( 0 :: int)::ii) - :: 52 Word.word)) - :: 64 Word.word)) in - return (error, result)) - else if ((((ex_int biased_exp)) \<ge> ((pow2 (( 11 :: int)::ii))))) then - (let result = - ((concat_vec sign - ((Ones__0 ((make_the_value (((( 64 :: int)::ii) - (( 1 :: int)::ii))) :: 63 itself)) - :: 63 Word.word)) - :: 64 Word.word)) in - FPProcessException FPExc_InvalidOp fpcr \<then> - ((let (error :: real) = (realFromFrac(( 0 :: int))(( 10 :: int))) in - return (error, result)))) + (if ((((ex_int biased_exp)) \<ge> ((((pow2 (( 11 :: int)::ii))) - (( 1 :: int)::ii))))) then + (if overflow_to_inf then (FPInfinity (( 64 :: int)::ii) sign :: ( 64 Word.word) M) + else (FPMaxNormal (( 64 :: int)::ii) sign :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__22 :: 64 Word.word) . + (let result = w__22 in + FPProcessException FPExc_Overflow fpcr \<then> + ((let (error :: real) = (realFromFrac(( 10 :: int))(( 10 :: int))) in + return (error, result))))) else (let (result :: 64 bits) = ((concat_vec @@ -8670,7 +8680,7 @@ definition FPRoundBase :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \ definition FPRoundCV :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \<Rightarrow> FPRounding \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPRoundCV (N__tv :: int) op1 fpcr__arg rounding = ( (let fpcr = fpcr__arg in - (let fpcr = ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 19 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in + (let fpcr = ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 19 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in (FPRoundBase N__tv op1 fpcr rounding :: (( 'N::len)Word.word) M))))" @@ -8681,7 +8691,7 @@ definition FPRoundCV :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \<R definition FPRound__0 :: " int \<Rightarrow> real \<Rightarrow>(32)Word.word \<Rightarrow> FPRounding \<Rightarrow>((register_value),(('N::len)Word.word),(exception))monad " where " FPRound__0 (N__tv :: int) op1 fpcr__arg rounding = ( (let fpcr = fpcr__arg in - (let fpcr = ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 26 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in + (let fpcr = ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 26 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in (FPRoundBase N__tv op1 fpcr rounding :: (( 'N::len)Word.word) M))))" @@ -8714,12 +8724,12 @@ definition FPProcessNaN :: " FPType \<Rightarrow>('N::len)Word.word \<Rightarro ((assert_exp ((((((((int (size op1))) = (( 16 :: int)::ii)))) \<or> ((((((((int (size op1))) = (( 32 :: int)::ii)))) \<or> (((((int (size op1))) = (( 64 :: int)::ii)))))))))) (''((N == 16) || ((N == 32) || (N == 64)))'') \<then> assert_exp ((((((typ1 = FPType_QNaN))) \<or> (((typ1 = FPType_SNaN)))))) (''((type == FPType_QNaN) || (type == FPType_SNaN))'')) \<then> undefined_int () ) \<bind> (\<lambda> (topfrac :: ii) . - (let l__161 = (int (size op1)) in + (let p00 = (int (size op1)) in (let (topfrac :: ii) = - (if (((l__161 = (( 16 :: int)::ii)))) then + (if (((p00 = (( 16 :: int)::ii)))) then (let (op1 :: 16 Word.word) = ((Word.ucast op1 :: 16 Word.word)) in (( 9 :: int)::ii)) - else if (((l__161 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then (let (op1 :: 32 Word.word) = ((Word.ucast op1 :: 32 Word.word)) in (( 22 :: int)::ii)) else @@ -8728,7 +8738,7 @@ definition FPProcessNaN :: " FPType \<Rightarrow>('N::len)Word.word \<Rightarro (let (result :: 'N bits) = op1 in (if (((typ1 = FPType_SNaN))) then (let result = - ((set_slice0 ((int (size op1))) (( 1 :: int)::ii) result topfrac (vec_of_bits [B1] :: 1 Word.word) :: ( 'N::len)Word.word)) in + ((set_slice ((int (size op1))) (( 1 :: int)::ii) result topfrac (vec_of_bits [B1] :: 1 Word.word) :: ( 'N::len)Word.word)) in FPProcessException FPExc_InvalidOp fpcr \<then> return result) else return result) \<bind> (\<lambda> (result :: 'N bits) . if ((((vec_of_bits [access_vec_dec fpcr (( 25 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then @@ -8835,13 +8845,13 @@ definition AArch32_ExecutingLSMInstr :: " unit \<Rightarrow>((register_value),( CurrentInstrSet () \<bind> (\<lambda> (instr_set :: InstrSet) . assert_exp ((((((instr_set = InstrSet_A32))) \<or> (((instr_set = InstrSet_T32)))))) (''((instr_set == InstrSet_A32) || (instr_set == InstrSet_T32))'') \<then> (if (((instr_set = InstrSet_A32))) then - return ((((((((slice0 instr (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) \<noteq> (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word)))) \<and> (((((slice0 instr (( 25 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B1,B0,B0] :: 3 Word.word))))))) + return ((((((((slice instr (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) \<noteq> (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word)))) \<and> (((((slice instr (( 25 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B1,B0,B0] :: 3 Word.word))))))) else ThisInstrLength () \<bind> (\<lambda> (w__0 :: ii) . return (if (((((ex_int w__0)) = (( 16 :: int)::ii)))) then - (((slice0 instr (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B0,B0] :: 4 Word.word)) + (((slice instr (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B0,B0] :: 4 Word.word)) else - ((((((slice0 instr (( 25 :: int)::ii) (( 7 :: int)::ii) :: 7 Word.word)) = (vec_of_bits [B1,B1,B1,B0,B1,B0,B0] :: 7 Word.word)))) \<and> ((((vec_of_bits [access_vec_dec instr (( 22 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))))))))" + ((((((slice instr (( 25 :: int)::ii) (( 7 :: int)::ii) :: 7 Word.word)) = (vec_of_bits [B1,B1,B1,B0,B1,B0,B0] :: 7 Word.word)))) \<and> ((((vec_of_bits [access_vec_dec instr (( 22 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))))))))" (*val AArch32_ExecutingCP10or11Instr : unit -> M bool*) @@ -8852,13 +8862,13 @@ definition AArch32_ExecutingCP10or11Instr :: " unit \<Rightarrow>((register_val CurrentInstrSet () \<bind> (\<lambda> (instr_set :: InstrSet) . assert_exp ((((((instr_set = InstrSet_A32))) \<or> (((instr_set = InstrSet_T32)))))) (''((instr_set == InstrSet_A32) || (instr_set == InstrSet_T32))'') \<then> return (if (((instr_set = InstrSet_A32))) then - (((((((((slice0 instr (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) \<or> (((((slice0 instr (( 25 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B1,B1,B0] :: 3 Word.word))))))) \<and> (((((and_vec ((slice0 instr (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + (((((((((slice instr (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) \<or> (((((slice instr (( 25 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B1,B1,B0] :: 3 Word.word))))))) \<and> (((((and_vec ((slice instr (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) :: 4 Word.word)) = (vec_of_bits [B1,B0,B1,B0] :: 4 Word.word))))) else - (((((((((and_vec ((slice0 instr (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + (((((((((and_vec ((slice instr (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) - :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) \<and> ((((((((slice0 instr (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) \<or> (((((slice0 instr (( 25 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B1,B1,B0] :: 3 Word.word)))))))))) \<and> (((((and_vec ((slice0 instr (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) \<and> ((((((((slice instr (( 24 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word)))) \<or> (((((slice instr (( 25 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) = (vec_of_bits [B1,B1,B0] :: 3 Word.word)))))))))) \<and> (((((and_vec ((slice instr (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) :: 4 Word.word)) = (vec_of_bits [B1,B0,B1,B0] :: 4 Word.word)))))))))" @@ -8875,7 +8885,7 @@ definition AArch32_ReportDeferredSError :: "(2)Word.word \<Rightarrow>(1)Word.w " AArch32_ReportDeferredSError AET ExT = ( (undefined_bitvector (( 32 :: int)::ii) :: ( 32 Word.word) M) \<bind> (\<lambda> (target :: 32 bits) . (let (target :: 32 bits) = - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) target (( 31 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)) in + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) target (( 31 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 32 Word.word)) in (let (syndrome :: 16 bits) = ((Zeros__0 ((make_the_value (( 16 :: int)::ii) :: 16 itself)) :: 16 Word.word)) in read_reg PSTATE_ref \<bind> (\<lambda> (w__0 :: ProcState) . (if ((((ProcState_EL w__0) = EL2))) then @@ -8982,9 +8992,9 @@ definition Halted :: " unit \<Rightarrow>((register_value),(bool),(exception))m " Halted _ = ( or_boolM ((read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__0 :: 32 bits) . - return (((((slice0 w__0 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)) = (vec_of_bits [B0,B0,B0,B0,B0,B1] :: 6 Word.word)))))) + return (((((slice w__0 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)) = (vec_of_bits [B0,B0,B0,B0,B0,B1] :: 6 Word.word)))))) ((read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__1 :: 32 bits) . - return (((((slice0 w__1 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)) = (vec_of_bits [B0,B0,B0,B0,B1,B0] :: 6 Word.word)))))) \<bind> (\<lambda> (w__2 :: bool) . + return (((((slice w__1 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word)) = (vec_of_bits [B0,B0,B0,B0,B1,B0] :: 6 Word.word)))))) \<bind> (\<lambda> (w__2 :: bool) . return ((\<not> w__2))))" @@ -9004,8 +9014,8 @@ definition FPUnpackBase :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Rig (undefined_bitvector (( 1 :: int)::ii) :: ( 1 Word.word) M) \<bind> (\<lambda> (sign :: 1 bits) . (if (((((int (size fpval))) = (( 16 :: int)::ii)))) then (let (sign :: 1 bits) = ((vec_of_bits [access_vec_dec fpval (( 15 :: int)::ii)] :: 1 Word.word)) in - (let (exp16 :: 5 bits) = ((slice0 fpval (( 10 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) in - (let (frac16 :: 10 bits) = ((slice0 fpval (( 0 :: int)::ii) (( 10 :: int)::ii) :: 10 Word.word)) in + (let (exp16 :: 5 bits) = ((slice fpval (( 10 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) in + (let (frac16 :: 10 bits) = ((slice fpval (( 0 :: int)::ii) (( 10 :: int)::ii) :: 10 Word.word)) in (let ((typ1 :: FPType), (value_name :: real)) = (if ((IsZero exp16)) then (let ((typ1 :: FPType), (value_name :: real)) = @@ -9050,8 +9060,8 @@ definition FPUnpackBase :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Rig return (sign, typ1, value_name))))) else if (((((int (size fpval))) = (( 32 :: int)::ii)))) then (let sign = ((vec_of_bits [access_vec_dec fpval (( 31 :: int)::ii)] :: 1 Word.word)) in - (let exp32 = ((slice0 fpval (( 23 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) in - (let frac32 = ((slice0 fpval (( 0 :: int)::ii) (( 23 :: int)::ii) :: 23 Word.word)) in + (let exp32 = ((slice fpval (( 23 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) in + (let frac32 = ((slice fpval (( 0 :: int)::ii) (( 23 :: int)::ii) :: 23 Word.word)) in (if ((IsZero exp32)) then if (((((IsZero frac32)) \<or> ((((vec_of_bits [access_vec_dec fpcr (( 24 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word))))))) then (let typ1 = FPType_Zero in @@ -9095,8 +9105,8 @@ definition FPUnpackBase :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Rig return (sign, typ1, value_name)))))) else (let sign = ((vec_of_bits [access_vec_dec fpval (( 63 :: int)::ii)] :: 1 Word.word)) in - (let exp64 = ((slice0 fpval (( 52 :: int)::ii) (( 11 :: int)::ii) :: 11 Word.word)) in - (let frac64 = ((slice0 fpval (( 0 :: int)::ii) (( 52 :: int)::ii) :: 52 Word.word)) in + (let exp64 = ((slice fpval (( 52 :: int)::ii) (( 11 :: int)::ii) :: 11 Word.word)) in + (let frac64 = ((slice fpval (( 0 :: int)::ii) (( 52 :: int)::ii) :: 52 Word.word)) in (if ((IsZero exp64)) then if (((((IsZero frac64)) \<or> ((((vec_of_bits [access_vec_dec fpcr (( 24 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word))))))) then (let typ1 = FPType_Zero in @@ -9150,7 +9160,7 @@ definition FPUnpackBase :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Rig definition FPUnpackCV :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Rightarrow>((register_value),(FPType*(1)Word.word*real),(exception))monad " where " FPUnpackCV fpval fpcr__arg = ( (let fpcr = fpcr__arg in - (let fpcr = ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 19 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in + (let fpcr = ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 19 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in undefined_real () \<bind> (\<lambda> (value_name :: real) . (undefined_bitvector (( 1 :: int)::ii) :: ( 1 Word.word) M) \<bind> (\<lambda> (sign :: 1 bits) . undefined_FPType () \<bind> (\<lambda> (fp_type :: FPType) . @@ -9167,8 +9177,8 @@ definition FPUnpackCV :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Right definition FPConvert__0 :: " int \<Rightarrow>('N::len)Word.word \<Rightarrow>(32)Word.word \<Rightarrow> FPRounding \<Rightarrow>((register_value),(('M::len)Word.word),(exception))monad " where " FPConvert__0 (M__tv :: int) op1 fpcr rounding = ( - (let l__158 = M__tv in - if (((l__158 = (( 16 :: int)::ii)))) then + (let p00 = M__tv in + if (((p00 = (( 16 :: int)::ii)))) then ((assert_exp True ('''') \<then> assert_exp ((((((((int (size op1))) = (( 16 :: int)::ii)))) \<or> ((((((((int (size op1))) = (( 32 :: int)::ii)))) \<or> (((((int (size op1))) = (( 64 :: int)::ii)))))))))) ('''')) \<then> (undefined_bitvector (( 16 :: int)::ii) :: ( 16 Word.word) M)) \<bind> (\<lambda> (result :: 16 bits) . @@ -9202,7 +9212,7 @@ definition FPConvert__0 :: " int \<Rightarrow>('N::len)Word.word \<Rightarrow>( else (FPRoundCV (( 16 :: int)::ii) value_name fpcr rounding :: ( 16 Word.word) M)) \<bind> (\<lambda> (result :: 16 bits) . return ((Word.ucast result :: ( 'M::len)Word.word))))))))))))) - else if (((l__158 = (( 32 :: int)::ii)))) then + else if (((p00 = (( 32 :: int)::ii)))) then ((assert_exp True ('''') \<then> assert_exp ((((((((int (size op1))) = (( 16 :: int)::ii)))) \<or> ((((((((int (size op1))) = (( 32 :: int)::ii)))) \<or> (((((int (size op1))) = (( 64 :: int)::ii)))))))))) ('''')) \<then> (undefined_bitvector (( 32 :: int)::ii) :: ( 32 Word.word) M)) \<bind> (\<lambda> (result :: 32 bits) . @@ -9236,7 +9246,7 @@ definition FPConvert__0 :: " int \<Rightarrow>('N::len)Word.word \<Rightarrow>( else (FPRoundCV (( 32 :: int)::ii) value_name fpcr rounding :: ( 32 Word.word) M)) \<bind> (\<lambda> (result :: 32 bits) . return ((Word.ucast result :: ( 'M::len)Word.word))))))))))))) - else if (((l__158 = (( 64 :: int)::ii)))) then + else if (((p00 = (( 64 :: int)::ii)))) then ((assert_exp True ('''') \<then> assert_exp ((((((((int (size op1))) = (( 16 :: int)::ii)))) \<or> ((((((((int (size op1))) = (( 32 :: int)::ii)))) \<or> (((((int (size op1))) = (( 64 :: int)::ii)))))))))) ('''')) \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M)) \<bind> (\<lambda> (result :: 64 bits) . @@ -9283,7 +9293,7 @@ definition FPConvert__1 :: " int \<Rightarrow>('N::len)Word.word \<Rightarrow>( definition FPUnpack :: "('N::len)Word.word \<Rightarrow>(32)Word.word \<Rightarrow>((register_value),(FPType*(1)Word.word*real),(exception))monad " where " FPUnpack fpval fpcr__arg = ( (let fpcr = fpcr__arg in - (let fpcr = ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 26 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in + (let fpcr = ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) fpcr (( 26 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word)) in undefined_real () \<bind> (\<lambda> (value_name :: real) . (undefined_bitvector (( 1 :: int)::ii) :: ( 1 Word.word) M) \<bind> (\<lambda> (sign :: 1 bits) . undefined_FPType () \<bind> (\<lambda> (fp_type :: FPType) . @@ -9369,7 +9379,7 @@ definition FPToFixedJS :: " int \<Rightarrow>('M::len)Word.word \<Rightarrow>(3 (read_reg FPSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__4 :: 32 Word.word) . write_reg FPSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 4 :: int)::ii) w__4 (( 28 :: int)::ii) + ((set_slice (( 32 :: int)::ii) (( 4 :: int)::ii) w__4 (( 28 :: int)::ii) ((concat_vec ((concat_vec (vec_of_bits [B0] :: 1 Word.word) Z :: 2 Word.word)) (vec_of_bits [B0,B0] :: 2 Word.word) :: 4 Word.word)) @@ -10008,11 +10018,11 @@ definition ExternalDebugInterruptsDisabled :: "(2)Word.word \<Rightarrow>((regi if (((pat0 = EL3))) then and_boolM ((read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__0 :: 32 bits) . - return (((((slice0 w__0 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) ((ExternalSecureInvasiveDebugEnabled () )) + return (((((slice w__0 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)))))) ((ExternalSecureInvasiveDebugEnabled () )) else if (((pat0 = EL2))) then and_boolM ((read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__3 :: 32 bits) . - return (((((and_vec ((slice0 w__3 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + return (((((and_vec ((slice w__3 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (vec_of_bits [B1,B0] :: 2 Word.word) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)))))) ((ExternalInvasiveDebugEnabled () )) @@ -10021,14 +10031,14 @@ definition ExternalDebugInterruptsDisabled :: "(2)Word.word \<Rightarrow>((regi if w__6 then and_boolM ((read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . - return (((((and_vec ((slice0 w__7 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + return (((((and_vec ((slice w__7 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (vec_of_bits [B1,B0] :: 2 Word.word) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)))))) ((ExternalSecureInvasiveDebugEnabled () )) else and_boolM ((read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__10 :: 32 bits) . - return (((((slice0 w__10 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) \<noteq> (vec_of_bits [B0,B0] :: 2 Word.word)))))) ((ExternalInvasiveDebugEnabled () ))))))" + return (((((slice w__10 (( 22 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) \<noteq> (vec_of_bits [B0,B0] :: 2 Word.word)))))) ((ExternalInvasiveDebugEnabled () ))))))" (*val ELStateUsingAArch32K : mword ty2 -> bool -> M (bool * bool)*) @@ -10115,44 +10125,44 @@ definition UpdateEDSCRFields :: " unit \<Rightarrow>((register_value),(unit),(e (read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__1 :: 32 Word.word) . (write_reg EDSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 2 :: int)::ii) w__1 (( 8 :: int)::ii) (vec_of_bits [B0,B0] :: 2 Word.word) :: 32 Word.word)) \<then> + ((set_slice (( 32 :: int)::ii) (( 2 :: int)::ii) w__1 (( 8 :: int)::ii) (vec_of_bits [B0,B0] :: 2 Word.word) :: 32 Word.word)) \<then> (read_reg EDSCR_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__2 :: 32 Word.word) . (undefined_bitvector (( 1 :: int)::ii) :: ( 1 Word.word) M) \<bind> (\<lambda> (w__3 :: 1 Word.word) . - (write_reg EDSCR_ref ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__2 (( 18 :: int)::ii) w__3 :: 32 Word.word)) \<then> + (write_reg EDSCR_ref ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__2 (( 18 :: int)::ii) w__3 :: 32 Word.word)) \<then> (read_reg EDSCR_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__4 :: 32 Word.word) . write_reg EDSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 4 :: int)::ii) w__4 (( 10 :: int)::ii) (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word) + ((set_slice (( 32 :: int)::ii) (( 4 :: int)::ii) w__4 (( 10 :: int)::ii) (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word) :: 32 Word.word)))))) else (read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__5 :: 32 Word.word) . read_reg PSTATE_ref \<bind> (\<lambda> (w__6 :: ProcState) . - (write_reg EDSCR_ref ((set_slice0 (( 32 :: int)::ii) (( 2 :: int)::ii) w__5 (( 8 :: int)::ii)(ProcState_EL w__6) :: 32 Word.word)) \<then> + (write_reg EDSCR_ref ((set_slice (( 32 :: int)::ii) (( 2 :: int)::ii) w__5 (( 8 :: int)::ii)(ProcState_EL w__6) :: 32 Word.word)) \<then> (read_reg EDSCR_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__7 :: 32 Word.word) . IsSecure () \<bind> (\<lambda> (w__8 :: bool) . (write_reg EDSCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__7 (( 18 :: int)::ii) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__7 (( 18 :: int)::ii) (if w__8 then (vec_of_bits [B0] :: 1 Word.word) else (vec_of_bits [B1] :: 1 Word.word)) :: 32 Word.word)) \<then> (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M)) \<bind> (\<lambda> (RW :: 4 bits) . ELUsingAArch32 EL1 \<bind> (\<lambda> (w__9 :: bool) . (let (RW :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 1 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 1 :: int)::ii) (if w__9 then (vec_of_bits [B0] :: 1 Word.word) else (vec_of_bits [B1] :: 1 Word.word)) :: 4 Word.word)) in read_reg PSTATE_ref \<bind> (\<lambda> (w__10 :: ProcState) . (if ((((ProcState_EL w__10) \<noteq> EL0))) then (let (RW :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 0 :: int)::ii) (vec_of_bits [access_vec_dec RW (( 1 :: int)::ii)] :: 1 Word.word) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 0 :: int)::ii) (vec_of_bits [access_vec_dec RW (( 1 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in return RW) else UsingAArch32 () \<bind> (\<lambda> (w__11 :: bool) . (let (RW :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 0 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 0 :: int)::ii) (if w__11 then (vec_of_bits [B0] :: 1 Word.word) else (vec_of_bits [B1] :: 1 Word.word)) :: 4 Word.word)) in @@ -10163,45 +10173,45 @@ definition UpdateEDSCRFields :: " unit \<Rightarrow>((register_value),(unit),(e return ((((vec_of_bits [access_vec_dec w__12 (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) \<bind> (\<lambda> (w__14 :: bool) . (if w__14 then (let (RW :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 2 :: int)::ii) (vec_of_bits [access_vec_dec RW (( 1 :: int)::ii)] :: 1 Word.word) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 2 :: int)::ii) (vec_of_bits [access_vec_dec RW (( 1 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in return RW) else ELUsingAArch32 EL2 \<bind> (\<lambda> (w__15 :: bool) . (let (RW :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 2 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 2 :: int)::ii) (if w__15 then (vec_of_bits [B0] :: 1 Word.word) else (vec_of_bits [B1] :: 1 Word.word)) :: 4 Word.word)) in return RW))) \<bind> (\<lambda> (RW :: 4 bits) . (if ((\<not> ((HaveEL EL3)))) then (let (RW :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 3 :: int)::ii) (vec_of_bits [access_vec_dec RW (( 2 :: int)::ii)] :: 1 Word.word) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 3 :: int)::ii) (vec_of_bits [access_vec_dec RW (( 2 :: int)::ii)] :: 1 Word.word) :: 4 Word.word)) in return RW) else ELUsingAArch32 EL3 \<bind> (\<lambda> (w__16 :: bool) . (let (RW :: 4 bits) = - ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 3 :: int)::ii) + ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 3 :: int)::ii) (if w__16 then (vec_of_bits [B0] :: 1 Word.word) else (vec_of_bits [B1] :: 1 Word.word)) :: 4 Word.word)) in return RW))) \<bind> (\<lambda> (RW :: 4 bits) . (if ((((vec_of_bits [access_vec_dec RW (( 3 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then (undefined_bitvector (( 3 :: int)::ii) :: ( 3 Word.word) M) \<bind> (\<lambda> (w__17 :: 3 Word.word) . - (let (RW :: 4 bits) = ((set_slice0 (( 4 :: int)::ii) (( 3 :: int)::ii) RW (( 0 :: int)::ii) w__17 :: 4 Word.word)) in + (let (RW :: 4 bits) = ((set_slice (( 4 :: int)::ii) (( 3 :: int)::ii) RW (( 0 :: int)::ii) w__17 :: 4 Word.word)) in return RW)) else if ((((vec_of_bits [access_vec_dec RW (( 2 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then (undefined_bitvector (( 2 :: int)::ii) :: ( 2 Word.word) M) \<bind> (\<lambda> (w__18 :: 2 Word.word) . - (let (RW :: 4 bits) = ((set_slice0 (( 4 :: int)::ii) (( 2 :: int)::ii) RW (( 0 :: int)::ii) w__18 :: 4 Word.word)) in + (let (RW :: 4 bits) = ((set_slice (( 4 :: int)::ii) (( 2 :: int)::ii) RW (( 0 :: int)::ii) w__18 :: 4 Word.word)) in return RW)) else if ((((vec_of_bits [access_vec_dec RW (( 1 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then (undefined_bitvector (( 1 :: int)::ii) :: ( 1 Word.word) M) \<bind> (\<lambda> (w__19 :: 1 Word.word) . - (let (RW :: 4 bits) = ((set_slice0 (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 0 :: int)::ii) w__19 :: 4 Word.word)) in + (let (RW :: 4 bits) = ((set_slice (( 4 :: int)::ii) (( 1 :: int)::ii) RW (( 0 :: int)::ii) w__19 :: 4 Word.word)) in return RW)) else return RW) \<bind> (\<lambda> (RW :: 4 bits) . (read_reg EDSCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 Word.word) . - write_reg EDSCR_ref ((set_slice0 (( 32 :: int)::ii) (( 4 :: int)::ii) w__20 (( 10 :: int)::ii) RW :: 32 Word.word))))))))))))))))))" + write_reg EDSCR_ref ((set_slice (( 32 :: int)::ii) (( 4 :: int)::ii) w__20 (( 10 :: int)::ii) RW :: 32 Word.word))))))))))))))))))" (*val Halt : mword ty6 -> M unit*) @@ -10370,9 +10380,9 @@ definition S2ConvertAttrsHints :: "(2)Word.word \<Rightarrow> AccType \<Rightar definition S2AttrDecode :: "(2)Word.word \<Rightarrow>(4)Word.word \<Rightarrow> AccType \<Rightarrow>((register_value),(MemoryAttributes),(exception))monad " where " S2AttrDecode SH attr acctype = ( undefined_MemoryAttributes () \<bind> (\<lambda> (memattrs :: MemoryAttributes) . - (if (((((slice0 attr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B0] :: 2 Word.word)))) then + (if (((((slice attr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B0] :: 2 Word.word)))) then (let (memattrs :: MemoryAttributes) = ((memattrs (| MemoryAttributes_typ := MemType_Device |))) in - (let b__0 = ((slice0 attr (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let b__0 = ((slice attr (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in (let (memattrs :: MemoryAttributes) = (if (((b__0 = (vec_of_bits [B0,B0] :: 2 Word.word)))) then (memattrs (| MemoryAttributes_device := DeviceType_nGnRnE |)) @@ -10382,13 +10392,13 @@ definition S2AttrDecode :: "(2)Word.word \<Rightarrow>(4)Word.word \<Rightarrow (memattrs (| MemoryAttributes_device := DeviceType_nGRE |)) else (memattrs (| MemoryAttributes_device := DeviceType_GRE |))) in return memattrs))) - else if (((((slice0 attr (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) \<noteq> (vec_of_bits [B0,B0] :: 2 Word.word)))) + else if (((((slice attr (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) \<noteq> (vec_of_bits [B0,B0] :: 2 Word.word)))) then (let memattrs = ((memattrs (| MemoryAttributes_typ := MemType_Normal |))) in - S2ConvertAttrsHints ((slice0 attr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) acctype \<bind> (\<lambda> (w__0 :: + S2ConvertAttrsHints ((slice attr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) acctype \<bind> (\<lambda> (w__0 :: MemAttrHints) . (let memattrs = ((memattrs (| MemoryAttributes_outer := w__0 |))) in - S2ConvertAttrsHints ((slice0 attr (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) acctype \<bind> (\<lambda> (w__1 :: + S2ConvertAttrsHints ((slice attr (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) acctype \<bind> (\<lambda> (w__1 :: MemAttrHints) . (let (memattrs :: MemoryAttributes) = ((memattrs (| MemoryAttributes_inner := w__1 |))) in (let (memattrs :: MemoryAttributes) = @@ -10661,25 +10671,25 @@ definition LongConvertAttrsHints :: "(4)Word.word \<Rightarrow> AccType \<Right (if w__0 then (let (result :: MemAttrHints) = ((result (| MemAttrHints_attrs := MemAttr_NC |))) in (result (| MemAttrHints_hints := MemHint_No |))) - else if (((((slice0 attrfield (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B0] :: 2 Word.word)))) then + else if (((((slice attrfield (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B0] :: 2 Word.word)))) then (let (result :: MemAttrHints) = ((result (| MemAttrHints_attrs := MemAttr_WT |))) in (let (result :: MemAttrHints) = - ((result (| MemAttrHints_hints := ((slice0 attrfield (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in + ((result (| MemAttrHints_hints := ((slice attrfield (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in (result (| MemAttrHints_transient := True |)))) - else if (((((slice0 attrfield (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B0,B1,B0,B0] :: 4 Word.word)))) then + else if (((((slice attrfield (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B0,B1,B0,B0] :: 4 Word.word)))) then (let (result :: MemAttrHints) = ((result (| MemAttrHints_attrs := MemAttr_NC |))) in (let (result :: MemAttrHints) = ((result (| MemAttrHints_hints := MemHint_No |))) in (result (| MemAttrHints_transient := False |)))) - else if (((((slice0 attrfield (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) then + else if (((((slice attrfield (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) then (let (result :: MemAttrHints) = - ((result (| MemAttrHints_attrs := ((slice0 attrfield (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in + ((result (| MemAttrHints_attrs := ((slice attrfield (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in (let (result :: MemAttrHints) = ((result (| MemAttrHints_hints := MemAttr_WB |))) in (result (| MemAttrHints_transient := True |)))) else (let (result :: MemAttrHints) = - ((result (| MemAttrHints_attrs := ((slice0 attrfield (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in + ((result (| MemAttrHints_attrs := ((slice attrfield (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in (let (result :: MemAttrHints) = - ((result (| MemAttrHints_hints := ((slice0 attrfield (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in + ((result (| MemAttrHints_hints := ((slice attrfield (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|))) in (result (| MemAttrHints_transient := False |))))) in return result))))" @@ -10804,11 +10814,11 @@ definition AArch64_CheckAndUpdateDescriptor_SecondStage :: " DescriptorUpdate \ (let desc = w__1 in (let (desc :: 64 bits) = (if hw_update_AF then - (set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 10 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word) + (set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 10 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word) else desc) in (let (desc :: 64 bits) = (if hw_update_AP then - (set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word) + (set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word) else desc) in aset__Mem descaddr2 (( 8 :: int)::ii) accdesc desc))))))) else return () ) \<then> @@ -10902,10 +10912,10 @@ definition ZeroExtend_slice_append :: " int \<Rightarrow>('n::len)Word.word \<R " ZeroExtend_slice_append (o__tv :: int) xs i l ys = ( assert_exp True ('''') \<then> ((let xs = ((and_vec xs ((slice_mask ((int (size xs))) i l :: ( 'n::len)Word.word)) :: ( 'n::len)Word.word)) in - (ZeroExtend__1 o__tv ((shiftr xs i :: ( 'n::len)Word.word)) :: (( 'o::len)Word.word) M) \<bind> (\<lambda> (w__0 :: ( 'o::len)Word.word) . - (let (xs :: 'o bits) = ((shiftl w__0 ((int (size ys))) :: ( 'o::len)Word.word)) in - (ZeroExtend__1 ((int (size xs))) ys :: (( 'o::len)Word.word) M) \<bind> (\<lambda> (ys :: 'o bits) . - return ((or_vec xs ys :: ( 'o::len)Word.word))))))))" + (let (xs :: 'o bits) = + ((shiftl ((extzv o__tv ((shiftr xs i :: ( 'n::len)Word.word)) :: ( 'o::len)Word.word)) ((int (size ys))) :: ( 'o::len)Word.word)) in + (let (ys :: 'o bits) = ((extzv ((int (size xs))) ys :: ( 'o::len)Word.word)) in + return ((or_vec xs ys :: ( 'o::len)Word.word)))))))" definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightarrow>(64)Word.word \<Rightarrow> AccType \<Rightarrow> bool \<Rightarrow> bool \<Rightarrow> int \<Rightarrow>((register_value),(TLBRecord),(exception))monad " where @@ -10951,13 +10961,13 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar liftR ((ZeroExtend__1 (( 64 :: int)::ii) ipaddress :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__6 :: 64 bits) . (let inputaddr = w__6 in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__7 :: 32 bits) . - (let inputsize = ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__7 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + (let inputsize = ((( 64 :: int)::ii) - ((Word.uint ((slice w__7 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__8 :: 32 bits) . (let largegrain = - (((slice0 w__8 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__8 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__9 :: 32 bits) . (let midgrain = - (((slice0 w__9 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in + (((slice w__9 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in (if ((((ex_int inputsize)) > ((ex_int inputsize_max)))) then (let c = (ConstrainUnpredictable Unpredictable_RESTnSZ) in @@ -10973,7 +10983,7 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar return inputsize))) else return inputsize) \<bind> (\<lambda> (inputsize :: ii) . liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__10 :: 32 bits) . - (let ps = ((slice0 w__10 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let ps = ((slice w__10 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in and_boolM (return (((((((ex_int inputsize)) \<ge> ((ex_int inputsize_min)))) \<and> ((((ex_int inputsize)) \<le> ((ex_int inputsize_max)))))))) (liftR ((IsZero_slice inputaddr inputsize @@ -10986,9 +10996,9 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__14 :: 32 bits) . liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__15 :: 32 bits) . liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__16 :: 32 bits) . - liftR (WalkAttrDecode ((slice0 w__14 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__15 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__16 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) True) \<bind> (\<lambda> (w__17 :: MemoryAttributes) . + liftR (WalkAttrDecode ((slice w__14 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__15 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__16 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) True) \<bind> (\<lambda> (w__17 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__17 |))) in liftR ((read_reg SCTLR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__18 :: 32 bits) . (let reversedescriptors = @@ -11004,7 +11014,7 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar return ((((vec_of_bits [access_vec_dec w__21 (( 22 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))))) \<bind> (\<lambda> (w__22 :: bool) . (let update_AP = w__22 in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__23 :: 32 bits) . - (let startlevel = (Word.uint ((slice0 w__23 (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in + (let startlevel = (Word.uint ((slice w__23 (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in (let ((firstblocklevel :: ii), (grainsize :: ii), (level :: ii)) = (if largegrain then (let (grainsize :: ii) = ((( 16 :: int)::ii)) in @@ -11117,7 +11127,7 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar (let z = (if ((baselowerbound < (( 6 :: int)::ii))) then (( 6 :: int)::ii) else baselowerbound) in liftR (assert_exp True ('''')) \<then> ((let (baseaddress :: 52 bits) = - ((concat_vec ((slice0 baseregister (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((concat_vec ((slice baseregister (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) ((slice_zeros_concat ((((((- z)) + (( 48 :: int)::ii))) + z)) baseregister z ((((- z)) + (( 48 :: int)::ii))) z :: 48 Word.word)) @@ -11148,10 +11158,39 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar liftR (undefined_bool () ) \<bind> (\<lambda> (hwupdatewalk :: bool) . liftR (undefined_AddressDescriptor () ) \<bind> (\<lambda> (descaddr2 :: AddressDescriptor) . liftR (undefined_int () ) \<bind> (\<lambda> (addrselectbottom :: ii) . - (untilM (addrselectbottom, desc, descaddr, level, result) - (\<lambda> varstup . (let (addrselectbottom, desc, descaddr, level, result) = varstup in + (untilM (accdesc, + addrselectbottom, + addrselecttop, + baseaddress, + blocktranslate, + desc, + descaddr, + descaddr2, + level, + result) + (\<lambda> varstup . + (let (accdesc, + addrselectbottom, + addrselecttop, + baseaddress, + blocktranslate, + desc, + descaddr, + descaddr2, + level, + result) = varstup in return blocktranslate)) - (\<lambda> varstup . (let (addrselectbottom, desc, descaddr, level, result) = varstup in + (\<lambda> varstup . + (let (accdesc, + addrselectbottom, + addrselecttop, + baseaddress, + blocktranslate, + desc, + descaddr, + descaddr2, + level, + result) = varstup in (let addrselectbottom = ((((((( 3 :: int)::ii) - ((ex_int level)))) * ((ex_int stride)))) + @@ -11180,21 +11219,22 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar (let desc = w__36 in (if reversedescriptors then liftR ((BigEndianReverse desc :: ( 64 Word.word) M)) else return desc) \<bind> (\<lambda> (desc :: 64 bits) . - (if (((((((vec_of_bits [access_vec_dec desc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) \<or> ((((((((slice0 desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<and> (((((ex_int level)) = (( 3 :: int)::ii)))))))))) + (if (((((((vec_of_bits [access_vec_dec desc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) \<or> ((((((((slice desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<and> (((((ex_int level)) = (( 3 :: int)::ii)))))))))) then (let (tmp_240 :: AddressDescriptor) = ((TLBRecord_addrdesc result)) in liftR (AArch64_TranslationFault ipaddress level acctype iswrite True s2fs1walk) \<bind> (\<lambda> (w__38 :: FaultRecord) . (let tmp_240 = ((tmp_240 (| AddressDescriptor_fault := w__38 |))) in (let result = ((result (| TLBRecord_addrdesc := tmp_240 |))) in - (early_return result :: (unit, TLBRecord) MR) \<then> return (level, result))))) - else if ((((((((slice0 desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<or> (((((ex_int level)) = (( 3 :: int)::ii))))))) + (early_return result :: (unit, TLBRecord) MR) \<then> + return (addrselecttop, baseaddress, blocktranslate, level, result))))) + else if ((((((((slice desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<or> (((((ex_int level)) = (( 3 :: int)::ii))))))) then (let (blocktranslate :: bool) = True in - return (level, result)) + return (addrselecttop, baseaddress, blocktranslate, level, result)) else or_boolM - (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) + (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) (and_boolM (return ((((ex_int outputsize)) < (( 48 :: int)::ii)))) (liftR (IsZero_slice desc outputsize ((((- ((ex_int outputsize)))) + (( 48 :: int)::ii)))) \<bind> (\<lambda> (w__39 :: @@ -11206,32 +11246,41 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar FaultRecord) . (let tmp_250 = ((tmp_250 (| AddressDescriptor_fault := w__42 |))) in (let result = ((result (| TLBRecord_addrdesc := tmp_250 |))) in - (early_return result :: (unit, TLBRecord) MR) \<then> return (level, result))))) + (early_return result :: (unit, TLBRecord) MR) \<then> + return (addrselecttop, baseaddress, blocktranslate, level, result))))) else (let gsz = grainsize in liftR (assert_exp True ('''')) \<then> - ((let (_ :: unit) = + ((let (baseaddress :: 52 bits) = (if (((((ex_int outputsize)) = (( 52 :: int)::ii)))) then - (let (baseaddress :: 52 bits) = - ((concat_vec ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) - ((slice_zeros_concat - ((((((- gsz)) + (( 48 :: int)::ii))) + gsz)) desc - gsz ((((- gsz)) + (( 48 :: int)::ii))) gsz - :: 48 Word.word)) - :: 52 Word.word)) in - () ) + (concat_vec ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((slice_zeros_concat + ((((((- gsz)) + (( 48 :: int)::ii))) + gsz)) desc + gsz ((((- gsz)) + (( 48 :: int)::ii))) gsz + :: 48 Word.word)) + :: 52 Word.word) else - (let (baseaddress :: 52 bits) = - ((place_slice (( 52 :: int)::ii) desc gsz ((((- gsz)) + (( 48 :: int)::ii))) - gsz - :: 52 Word.word)) in - () )) in + (place_slice (( 52 :: int)::ii) desc gsz ((((- gsz)) + (( 48 :: int)::ii))) + gsz + :: 52 Word.word)) in (let (level :: ii) = (((ex_int level)) + (( 1 :: int)::ii)) in (let (addrselecttop :: ii) = (((ex_int addrselectbottom)) - (( 1 :: int)::ii)) in (let (blocktranslate :: bool) = False in - return (level, result))))))))) \<bind> (\<lambda> varstup . (let ((level :: ii), (result :: TLBRecord)) = varstup in - return (addrselectbottom, desc, descaddr, level, result)))))))))))))))))))))) \<bind> (\<lambda> varstup . (let ((addrselectbottom :: - ii), (desc :: 64 bits), (descaddr :: AddressDescriptor), (level :: ii), (result :: + return (addrselecttop, baseaddress, blocktranslate, level, result))))))))) \<bind> (\<lambda> varstup . (let ((addrselecttop :: + ii), (baseaddress :: 52 bits), (blocktranslate :: bool), (level :: ii), (result :: + TLBRecord)) = varstup in + return (accdesc, + addrselectbottom, + addrselecttop, + baseaddress, + blocktranslate, + desc, + descaddr, + descaddr2, + level, + result)))))))))))))))))))))) \<bind> (\<lambda> varstup . (let ((accdesc :: AccessDescriptor), (addrselectbottom :: + ii), (addrselecttop :: ii), (baseaddress :: 52 bits), (blocktranslate :: bool), (desc :: 64 + bits), (descaddr :: AddressDescriptor), (descaddr2 :: AddressDescriptor), (level :: ii), (result :: TLBRecord)) = varstup in if ((((ex_int level)) < ((ex_int firstblocklevel)))) then (let (tmp_260 :: AddressDescriptor) = ((TLBRecord_addrdesc result)) in @@ -11260,7 +11309,7 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar else return result) else return result) \<bind> (\<lambda> (result :: TLBRecord) . or_boolM - (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) + (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) (and_boolM (return ((((ex_int outputsize)) < (( 48 :: int)::ii)))) (liftR (IsZero_slice desc outputsize ((((- ((ex_int outputsize)))) + (( 48 :: int)::ii)))) \<bind> (\<lambda> (w__46 :: @@ -11280,7 +11329,7 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar liftR (assert_exp True ('''')) \<then> ((let (outputaddress :: 52 bits) = (if (((((ex_int outputsize)) = (( 52 :: int)::ii)))) then - (concat_vec ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + (concat_vec ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) ((slice_slice_concat (( 48 :: int)::ii) desc asb ((((- asb)) + (( 48 :: int)::ii))) inputaddr (( 0 :: int)::ii) asb :: 48 Word.word)) @@ -11308,7 +11357,7 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar (let ((desc :: 64 bits), (result :: TLBRecord)) = (if ((((vec_of_bits [access_vec_dec desc (( 7 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then (let (desc :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + ((set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word)) in (let (tmp_320 :: DescriptorUpdate) = ((TLBRecord_descupdate result)) in (let (tmp_320 :: DescriptorUpdate) = @@ -11334,7 +11383,7 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar (let (contiguousbit :: 1 bits) = ((vec_of_bits [access_vec_dec desc (( 52 :: int)::ii)] :: 1 Word.word)) in (let (nG :: 1 bits) = ((vec_of_bits [access_vec_dec desc (( 11 :: int)::ii)] :: 1 Word.word)) in - (let (sh :: 2 bits) = ((slice0 desc (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let (sh :: 2 bits) = ((slice desc (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in liftR ((undefined_bitvector (( 3 :: int)::ii) :: ( 3 Word.word) M)) \<bind> (\<lambda> (ap :: 3 bits) . (let (ap :: 3 bits) = (if apply_nvnv1_effect then @@ -11342,10 +11391,10 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar (vec_of_bits [B0,B1] :: 2 Word.word) :: 3 Word.word) else - (concat_vec ((slice0 desc (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + (concat_vec ((slice desc (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (vec_of_bits [B1] :: 1 Word.word) :: 3 Word.word)) in - (let (memattr :: 4 bits) = ((slice0 desc (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in + (let (memattr :: 4 bits) = ((slice desc (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in liftR ((undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M)) \<bind> (\<lambda> (w__51 :: 4 bits) . (let result = ((result (| TLBRecord_domain := w__51 |))) in (let result = ((result (| TLBRecord_level := level |))) in @@ -11358,14 +11407,14 @@ definition AArch64_TranslationTableWalk_SecondStage :: "(52)Word.word \<Rightar ((ex_int grainsize))))))|))) in (let (tmp_480 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let tmp_480 = - ((set_slice0 (( 3 :: int)::ii) (( 2 :: int)::ii) tmp_480 (( 1 :: int)::ii) ((slice0 ap (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((set_slice (( 3 :: int)::ii) (( 2 :: int)::ii) tmp_480 (( 1 :: int)::ii) ((slice ap (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) :: 3 Word.word)) in (let (tmp_490 :: Permissions) = ((TLBRecord_perms result)) in (let tmp_490 = ((tmp_490 (| Permissions_ap := tmp_480 |))) in (let result = ((result (| TLBRecord_perms := tmp_490 |))) in (let (tmp_500 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let tmp_500 = - ((set_slice0 (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_500 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + ((set_slice (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_500 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 3 Word.word)) in (let (tmp_510 :: Permissions) = ((TLBRecord_perms result)) in (let tmp_510 = ((tmp_510 (| Permissions_ap := tmp_500 |))) in @@ -11429,7 +11478,7 @@ definition AArch64_SecondStageTranslate :: " AddressDescriptor \<Rightarrow>(64 (undefined_bitvector (( 52 :: int)::ii) :: ( 52 Word.word) M) \<bind> (\<lambda> (ipaddress :: 52 bits) . if s2_enabled then (let ipaddress = - ((slice0(FullAddress_physicaladdress (AddressDescriptor_paddress S1)) (( 0 :: int)::ii) (( 52 :: int)::ii) :: 52 Word.word)) in + ((slice(FullAddress_physicaladdress (AddressDescriptor_paddress S1)) (( 0 :: int)::ii) (( 52 :: int)::ii) :: 52 Word.word)) in AArch64_TranslationTableWalk_SecondStage ipaddress vaddress acctype iswrite s2fs1walk size1 \<bind> (\<lambda> (w__3 :: TLBRecord) . (let S2 = w__3 in @@ -11603,7 +11652,7 @@ definition SSAdvance :: " unit \<Rightarrow>((register_value),(unit),(exception definition ConditionHolds :: "(4)Word.word \<Rightarrow>((register_value),(bool),(exception))monad " where " ConditionHolds cond = ( undefined_bool () \<bind> (\<lambda> (result :: bool) . - (let b__0 = ((slice0 cond (( 1 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let b__0 = ((slice cond (( 1 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in (if (((b__0 = (vec_of_bits [B0,B0,B0] :: 3 Word.word)))) then read_reg PSTATE_ref \<bind> (\<lambda> (w__0 :: ProcState) . (let (result :: bool) = ((ProcState_Z w__0) = (vec_of_bits [B1] :: 1 Word.word)) in @@ -12037,31 +12086,31 @@ definition ConditionSyndrome :: " unit \<Rightarrow>((register_value),((5)Word. read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . if ((((ProcState_T w__2) = (vec_of_bits [B0] :: 1 Word.word)))) then (let syndrome = - ((set_slice0 (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 5 Word.word)) in + ((set_slice (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 5 Word.word)) in and_boolM ((ConditionHolds cond)) ((ConstrainUnpredictableBool Unpredictable_ESRCONDPASS)) \<bind> (\<lambda> (w__5 :: bool) . (let (syndrome :: 5 bits) = (if w__5 then - (set_slice0 (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) + (set_slice (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) :: 5 Word.word) - else (set_slice0 (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) cond :: 5 Word.word)) in + else (set_slice (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) cond :: 5 Word.word)) in return syndrome))) else if ((IMPDEF_boolean (''Condition valid for trapped T32''))) then (let (syndrome :: 5 bits) = - ((set_slice0 (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 5 Word.word)) in - (let (syndrome :: 5 bits) = ((set_slice0 (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) cond :: 5 Word.word)) in + ((set_slice (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 5 Word.word)) in + (let (syndrome :: 5 bits) = ((set_slice (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) cond :: 5 Word.word)) in return syndrome)) else (let syndrome = - ((set_slice0 (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 5 Word.word)) in + ((set_slice (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 5 Word.word)) in (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (w__6 :: 4 Word.word) . - (let (syndrome :: 5 bits) = ((set_slice0 (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) w__6 :: 5 Word.word)) in + (let (syndrome :: 5 bits) = ((set_slice (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) w__6 :: 5 Word.word)) in return syndrome)))))) else (let (syndrome :: 5 bits) = - ((set_slice0 (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 5 Word.word)) in + ((set_slice (( 5 :: int)::ii) (( 1 :: int)::ii) syndrome (( 4 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 5 Word.word)) in (let (syndrome :: 5 bits) = - ((set_slice0 (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) + ((set_slice (( 5 :: int)::ii) (( 4 :: int)::ii) syndrome (( 0 :: int)::ii) (vec_of_bits [B1,B1,B1,B0] :: 4 Word.word) :: 5 Word.word)) in return syndrome))))))" @@ -12081,7 +12130,7 @@ definition BranchToAddr :: "('N::len)Word.word \<Rightarrow> BranchType \<Right and_boolM (return (((((int (size target))) = (( 64 :: int)::ii))))) (UsingAArch32 () \<bind> (\<lambda> (w__2 :: bool) . return ((\<not> w__2)))) \<bind> (\<lambda> (w__3 :: bool) . assert_exp w__3 (''((N == 64) && !(UsingAArch32()))'') \<then> - write_reg PC_ref ((slice0 target (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word))))))" + write_reg PC_ref ((slice target (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word))))))" (*val BadMode : mword ty5 -> M bool*) @@ -12231,7 +12280,7 @@ definition ELFromSPSR :: "(32)Word.word \<Rightarrow>((register_value),(bool*(2 undefined_bool () \<bind> (\<lambda> (valid_name :: bool) . (undefined_bitvector (( 2 :: int)::ii) :: ( 2 Word.word) M) \<bind> (\<lambda> (el :: 2 bits) . (if ((((vec_of_bits [access_vec_dec spsr (( 4 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then - (let el = ((slice0 spsr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let el = ((slice spsr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in (if ((HighestELUsingAArch32 () )) then return False else if ((\<not> ((HaveEL el)))) then return False else if ((((vec_of_bits [access_vec_dec spsr (( 1 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then @@ -12249,7 +12298,7 @@ definition ELFromSPSR :: "(32)Word.word \<Rightarrow>((register_value),(bool*(2 (let (valid_name :: bool) = False in return (el, valid_name)) else - (ELFromM32 ((slice0 spsr (( 0 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) :: ((bool * 2 Word.word)) M) \<bind> (\<lambda> varstup . (let (tup__0, tup__1) = varstup in + (ELFromM32 ((slice spsr (( 0 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) :: ((bool * 2 Word.word)) M) \<bind> (\<lambda> varstup . (let (tup__0, tup__1) = varstup in (let (valid_name :: bool) = tup__0 in (let (el :: 2 bits) = tup__1 in return (el, valid_name)))))) \<bind> (\<lambda> varstup . (let ((el :: 2 bits), (valid_name :: bool)) = varstup in @@ -12580,21 +12629,21 @@ definition AArch64_vESBOperation :: " unit \<Rightarrow>((register_value),(unit ((if w__12 then (read_reg VDFSR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . (read_reg VDFSR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__14 :: 32 bits) . - (AArch32_ReportDeferredSError ((slice0 w__13 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + (AArch32_ReportDeferredSError ((slice w__13 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (vec_of_bits [access_vec_dec w__14 (( 12 :: int)::ii)] :: 1 Word.word) :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . (let (VDISR :: 32 bits) = w__15 in return () )))) else (read_reg VSESR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__16 :: 32 bits) . - (AArch64_ReportDeferredSError ((slice0 w__16 (( 0 :: int)::ii) (( 25 :: int)::ii) :: 25 Word.word)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__17 :: 64 + (AArch64_ReportDeferredSError ((slice w__16 (( 0 :: int)::ii) (( 25 :: int)::ii) :: 25 Word.word)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__17 :: 64 bits) . (let (VDISR_EL2 :: 64 bits) = w__17 in return () )))) \<then> (read_reg HCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__18 :: 64 Word.word) . write_reg HCR_EL2_ref - ((set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) w__18 (( 8 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 64 Word.word)))) + ((set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) w__18 (( 8 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 64 Word.word)))) else return () ))))))))" @@ -12732,6 +12781,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR (undefined_AddressDescriptor () ) \<bind> (\<lambda> (descaddr :: AddressDescriptor) . liftR ((undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M)) \<bind> (\<lambda> (baseregister :: 64 bits) . liftR ((undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M)) \<bind> (\<lambda> (inputaddr :: 64 bits) . + (let (tmp_170 :: FaultRecord) = ((AddressDescriptor_fault descaddr)) in + (let tmp_170 = ((tmp_170 (| FaultRecord_typ := Fault_None |))) in + (let descaddr = ((descaddr (| AddressDescriptor_fault := tmp_170 |))) in (let (tmp_180 :: MemoryAttributes) = ((AddressDescriptor_memattrs descaddr)) in (let tmp_180 = ((tmp_180 (| MemoryAttributes_typ := MemType_Normal |))) in (let descaddr = ((descaddr (| AddressDescriptor_memattrs := tmp_180 |))) in @@ -12769,12 +12821,12 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (if ((((ProcState_EL w__11) = EL3))) then liftR ((read_reg TCR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__12 :: 32 bits) . (let largegrain = - (((slice0 w__12 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__12 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in liftR ((read_reg TCR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__13 :: 32 bits) . (let midgrain = - (((slice0 w__13 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in + (((slice w__13 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in liftR ((read_reg TCR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__14 :: 32 bits) . - (let inputsize = ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__14 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + (let inputsize = ((( 64 :: int)::ii) - ((Word.uint ((slice w__14 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in @@ -12792,7 +12844,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word return inputsize))) else return inputsize) \<bind> (\<lambda> (inputsize :: ii) . liftR ((read_reg TCR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__15 :: 32 bits) . - (let ps = ((slice0 w__15 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let ps = ((slice w__15 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in and_boolM (return (((((((ex_int inputsize)) \<ge> ((ex_int inputsize_min)))) \<and> ((((ex_int inputsize)) \<le> ((ex_int inputsize_max)))))))) (liftR ((IsZero_slice inputaddr inputsize @@ -12805,9 +12857,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((read_reg TCR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__19 :: 32 bits) . liftR ((read_reg TCR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__20 :: 32 bits) . liftR ((read_reg TCR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__21 :: 32 bits) . - liftR (WalkAttrDecode ((slice0 w__19 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__20 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__21 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__22 :: + liftR (WalkAttrDecode ((slice w__19 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__20 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__21 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__22 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__22 |))) in liftR ((read_reg SCTLR_EL3_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__23 :: 32 bits) . @@ -12847,13 +12899,13 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (if ((((vec_of_bits [access_vec_dec inputaddr top1] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__31 :: 64 bits) . (let largegrain = - (((slice0 w__31 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__31 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__32 :: 64 bits) . (let midgrain = - (((slice0 w__32 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in + (((slice w__32 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__33 :: 64 bits) . (let inputsize = - ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__33 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + ((( 64 :: int)::ii) - ((Word.uint ((slice w__33 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in @@ -12889,9 +12941,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__38 :: 64 bits) . liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__39 :: 64 bits) . liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__40 :: 64 bits) . - liftR (WalkAttrDecode ((slice0 w__38 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__39 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__40 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__41 :: + liftR (WalkAttrDecode ((slice w__38 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__39 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__40 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__41 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__41 |))) in and_boolM (return ((AArch64_HaveHPDExt () ))) @@ -12909,13 +12961,13 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word else liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__44 :: 64 bits) . (let inputsize = - ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__44 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + ((( 64 :: int)::ii) - ((Word.uint ((slice w__44 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__45 :: 64 bits) . (let largegrain = - (((slice0 w__45 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)) in + (((slice w__45 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)) in liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__46 :: 64 bits) . (let midgrain = - (((slice0 w__46 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__46 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in @@ -12951,9 +13003,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__51 :: 64 bits) . liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__52 :: 64 bits) . liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__53 :: 64 bits) . - liftR (WalkAttrDecode ((slice0 w__51 (( 28 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__52 (( 26 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__53 (( 24 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__54 :: + liftR (WalkAttrDecode ((slice w__51 (( 28 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__52 (( 26 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__53 (( 24 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__54 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__54 |))) in and_boolM (return ((AArch64_HaveHPDExt () ))) @@ -12971,7 +13023,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word bits), (descaddr :: AddressDescriptor), (disabled :: bool), (hierattrsdisabled :: bool), (inputsize :: ii), (largegrain :: bool), (midgrain :: bool)) = varstup in liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__57 :: 64 bits) . - (let ps = ((slice0 w__57 (( 32 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let ps = ((slice w__57 (( 32 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in liftR ((read_reg SCTLR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__58 :: 32 bits) . (let reversedescriptors = ((vec_of_bits [access_vec_dec w__58 (( 25 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)) in @@ -13004,13 +13056,13 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word if ((((ProcState_EL w__63) = EL2))) then liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__64 :: 64 bits) . (let inputsize = - ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__64 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + ((( 64 :: int)::ii) - ((Word.uint ((slice w__64 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__65 :: 64 bits) . (let largegrain = - (((slice0 w__65 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__65 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__66 :: 64 bits) . (let midgrain = - (((slice0 w__66 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in + (((slice w__66 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in @@ -13033,7 +13085,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word return inputsize))) else return inputsize) \<bind> (\<lambda> (inputsize :: ii) . liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__67 :: 64 bits) . - (let ps = ((slice0 w__67 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let ps = ((slice w__67 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in and_boolM (return (((((((ex_int inputsize)) \<ge> ((ex_int inputsize_min)))) \<and> ((((ex_int inputsize)) \<le> ((ex_int inputsize_max)))))))) (liftR ((IsZero_slice inputaddr inputsize @@ -13046,9 +13098,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__71 :: 64 bits) . liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__72 :: 64 bits) . liftR ((read_reg TCR_EL2_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__73 :: 64 bits) . - liftR (WalkAttrDecode ((slice0 w__71 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__72 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__73 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__74 :: + liftR (WalkAttrDecode ((slice w__71 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__72 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__73 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__74 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__74 |))) in liftR ((read_reg SCTLR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__75 :: 32 bits) . @@ -13086,13 +13138,13 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (if ((((vec_of_bits [access_vec_dec inputaddr top1] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__82 :: 64 bits) . (let inputsize = - ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__82 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + ((( 64 :: int)::ii) - ((Word.uint ((slice w__82 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__83 :: 64 bits) . (let largegrain = - (((slice0 w__83 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__83 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__84 :: 64 bits) . (let midgrain = - (((slice0 w__84 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in + (((slice w__84 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in @@ -13128,9 +13180,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__89 :: 64 bits) . liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__90 :: 64 bits) . liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__91 :: 64 bits) . - liftR (WalkAttrDecode ((slice0 w__89 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__90 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__91 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__92 :: + liftR (WalkAttrDecode ((slice w__89 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__90 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__91 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__92 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__92 |))) in and_boolM (return ((AArch64_HaveHPDExt () ))) @@ -13148,13 +13200,13 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word else liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__95 :: 64 bits) . (let inputsize = - ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__95 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + ((( 64 :: int)::ii) - ((Word.uint ((slice w__95 (( 16 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__96 :: 64 bits) . (let largegrain = - (((slice0 w__96 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)) in + (((slice w__96 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B1] :: 2 Word.word)) in liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__97 :: 64 bits) . (let midgrain = - (((slice0 w__97 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__97 (( 30 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in @@ -13190,9 +13242,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__102 :: 64 bits) . liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__103 :: 64 bits) . liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__104 :: 64 bits) . - liftR (WalkAttrDecode ((slice0 w__102 (( 28 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__103 (( 26 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__104 (( 24 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__105 :: + liftR (WalkAttrDecode ((slice w__102 (( 28 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__103 (( 26 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__104 (( 24 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__105 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__105 |))) in and_boolM (return ((AArch64_HaveHPDExt () ))) @@ -13210,7 +13262,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word bits), (descaddr :: AddressDescriptor), (disabled :: bool), (hierattrsdisabled :: bool), (inputsize :: ii), (largegrain :: bool), (midgrain :: bool)) = varstup in liftR ((read_reg TCR_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__108 :: 64 bits) . - (let ps = ((slice0 w__108 (( 32 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let ps = ((slice w__108 (( 32 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in liftR ((read_reg SCTLR_EL1_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__109 :: 32 bits) . (let reversedescriptors = ((vec_of_bits [access_vec_dec w__109 (( 25 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)) in @@ -13289,13 +13341,13 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((ZeroExtend__1 (( 64 :: int)::ii) ipaddress :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__115 :: 64 bits) . (let inputaddr = w__115 in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__116 :: 32 bits) . - (let inputsize = ((( 64 :: int)::ii) - ((Word.uint ((slice0 w__116 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in + (let inputsize = ((( 64 :: int)::ii) - ((Word.uint ((slice w__116 (( 0 :: int)::ii) (( 6 :: int)::ii) :: 6 Word.word))))) in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__117 :: 32 bits) . (let largegrain = - (((slice0 w__117 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice w__117 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__118 :: 32 bits) . (let midgrain = - (((slice0 w__118 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in + (((slice w__118 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B1,B0] :: 2 Word.word)) in (let inputsize_max = (if (((((Have52BitVAExt () )) \<and> largegrain))) then (( 52 :: int)::ii) else (( 48 :: int)::ii)) in @@ -13313,7 +13365,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word return inputsize))) else return inputsize) \<bind> (\<lambda> (inputsize :: ii) . liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__119 :: 32 bits) . - (let ps = ((slice0 w__119 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let ps = ((slice w__119 (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in and_boolM (return (((((((ex_int inputsize)) \<ge> ((ex_int inputsize_min)))) \<and> ((((ex_int inputsize)) \<le> ((ex_int inputsize_max)))))))) (liftR ((IsZero_slice inputaddr inputsize @@ -13326,9 +13378,9 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__123 :: 32 bits) . liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__124 :: 32 bits) . liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__125 :: 32 bits) . - liftR (WalkAttrDecode ((slice0 w__123 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__124 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) - ((slice0 w__125 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__126 :: + liftR (WalkAttrDecode ((slice w__123 (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__124 (( 10 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice w__125 (( 12 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) secondstage) \<bind> (\<lambda> (w__126 :: MemoryAttributes) . (let descaddr = ((descaddr (| AddressDescriptor_memattrs := w__126 |))) in liftR ((read_reg SCTLR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__127 :: 32 bits) . @@ -13345,7 +13397,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word return ((((vec_of_bits [access_vec_dec w__130 (( 22 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))))) \<bind> (\<lambda> (w__131 :: bool) . (let update_AP = w__131 in liftR ((read_reg VTCR_EL2_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__132 :: 32 bits) . - (let startlevel = (Word.uint ((slice0 w__132 (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in + (let startlevel = (Word.uint ((slice w__132 (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in (let ((firstblocklevel :: ii), (grainsize :: ii), (level :: ii)) = (if largegrain then (let (grainsize :: ii) = ((( 16 :: int)::ii)) in @@ -13479,7 +13531,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let z = (if ((baselowerbound < (( 6 :: int)::ii))) then (( 6 :: int)::ii) else baselowerbound) in liftR (assert_exp True ('''')) \<then> ((let (baseaddress :: 52 bits) = - ((concat_vec ((slice0 baseregister (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((concat_vec ((slice baseregister (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) ((slice_zeros_concat ((((((- z)) + (( 48 :: int)::ii))) + z)) baseregister z ((((- z)) + (( 48 :: int)::ii))) z :: 48 Word.word)) @@ -13510,20 +13562,32 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR (undefined_bool () ) \<bind> (\<lambda> (hwupdatewalk :: bool) . liftR (undefined_AddressDescriptor () ) \<bind> (\<lambda> (descaddr2 :: AddressDescriptor) . liftR (undefined_int () ) \<bind> (\<lambda> (addrselectbottom :: ii) . - (untilM (addrselectbottom, + (untilM (accdesc, + addrselectbottom, + addrselecttop, ap_table, + baseaddress, + blocktranslate, desc, descaddr, + descaddr2, + hwupdatewalk, level, ns_table, pxn_table, result, xn_table) (\<lambda> varstup . - (let (addrselectbottom, + (let (accdesc, + addrselectbottom, + addrselecttop, ap_table, + baseaddress, + blocktranslate, desc, descaddr, + descaddr2, + hwupdatewalk, level, ns_table, pxn_table, @@ -13531,10 +13595,16 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word xn_table) = varstup in return blocktranslate)) (\<lambda> varstup . - (let (addrselectbottom, + (let (accdesc, + addrselectbottom, + addrselecttop, ap_table, + baseaddress, + blocktranslate, desc, descaddr, + descaddr2, + hwupdatewalk, level, ns_table, pxn_table, @@ -13562,7 +13632,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word bool) . (if w__144 then (let (descaddr2 :: AddressDescriptor) = descaddr in - return (descaddr2, result)) + return (descaddr2, hwupdatewalk, result)) else (let hwupdatewalk = False in liftR (AArch64_SecondStageWalk descaddr vaddress acctype iswrite (( 8 :: int)::ii) @@ -13575,8 +13645,8 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let result = ((result (| TLBRecord_addrdesc := tmp_230 |))) in (early_return result :: (unit, TLBRecord) MR) \<then> return result))) else return result) \<bind> (\<lambda> (result :: TLBRecord) . - return (descaddr2, result)))))) \<bind> (\<lambda> varstup . (let ((descaddr2 :: AddressDescriptor), (result :: - TLBRecord)) = varstup in + return (descaddr2, hwupdatewalk, result)))))) \<bind> (\<lambda> varstup . (let ((descaddr2 :: + AddressDescriptor), (hwupdatewalk :: bool), (result :: TLBRecord)) = varstup in liftR ((ZeroExtend__1 (( 64 :: int)::ii) vaddress :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__146 :: 64 bits) . (let descaddr2 = ((descaddr2 (| AddressDescriptor_vaddress := w__146 |))) in liftR (CreateAccessDescriptorPTW acctype secondstage s2fs1walk level) \<bind> (\<lambda> (w__147 :: @@ -13587,7 +13657,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let desc = w__148 in (if reversedescriptors then liftR ((BigEndianReverse desc :: ( 64 Word.word) M)) else return desc) \<bind> (\<lambda> (desc :: 64 bits) . - (if (((((((vec_of_bits [access_vec_dec desc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) \<or> ((((((((slice0 desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<and> (((((ex_int level)) = (( 3 :: int)::ii)))))))))) + (if (((((((vec_of_bits [access_vec_dec desc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) \<or> ((((((((slice desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<and> (((((ex_int level)) = (( 3 :: int)::ii)))))))))) then (let (tmp_240 :: AddressDescriptor) = ((TLBRecord_addrdesc result)) in liftR (AArch64_TranslationFault ipaddress level acctype iswrite secondstage @@ -13595,14 +13665,30 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let tmp_240 = ((tmp_240 (| AddressDescriptor_fault := w__150 |))) in (let result = ((result (| TLBRecord_addrdesc := tmp_240 |))) in (early_return result :: (unit, TLBRecord) MR) \<then> - return (ap_table, level, ns_table, pxn_table, result, xn_table))))) - else if ((((((((slice0 desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<or> (((((ex_int level)) = (( 3 :: int)::ii))))))) + return (addrselecttop, + ap_table, + baseaddress, + blocktranslate, + level, + ns_table, + pxn_table, + result, + xn_table))))) + else if ((((((((slice desc (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)))) \<or> (((((ex_int level)) = (( 3 :: int)::ii))))))) then (let (blocktranslate :: bool) = True in - return (ap_table, level, ns_table, pxn_table, result, xn_table)) + return (addrselecttop, + ap_table, + baseaddress, + blocktranslate, + level, + ns_table, + pxn_table, + result, + xn_table)) else or_boolM - (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) + (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) (and_boolM (return ((((ex_int outputsize)) < (( 48 :: int)::ii)))) (liftR (IsZero_slice desc outputsize ((((- ((ex_int outputsize)))) + (( 48 :: int)::ii)))) \<bind> (\<lambda> (w__151 :: @@ -13615,26 +13701,30 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let tmp_250 = ((tmp_250 (| AddressDescriptor_fault := w__154 |))) in (let result = ((result (| TLBRecord_addrdesc := tmp_250 |))) in (early_return result :: (unit, TLBRecord) MR) \<then> - return (ap_table, level, ns_table, pxn_table, result, xn_table))))) + return (addrselecttop, + ap_table, + baseaddress, + blocktranslate, + level, + ns_table, + pxn_table, + result, + xn_table))))) else (let gsz = grainsize in liftR (assert_exp True ('''')) \<then> - ((let (_ :: unit) = + ((let (baseaddress :: 52 bits) = (if (((((ex_int outputsize)) = (( 52 :: int)::ii)))) then - (let (baseaddress :: 52 bits) = - ((concat_vec ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) - ((slice_zeros_concat - ((((((- gsz)) + (( 48 :: int)::ii))) + gsz)) desc - gsz ((((- gsz)) + (( 48 :: int)::ii))) gsz - :: 48 Word.word)) - :: 52 Word.word)) in - () ) + (concat_vec ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + ((slice_zeros_concat + ((((((- gsz)) + (( 48 :: int)::ii))) + gsz)) desc + gsz ((((- gsz)) + (( 48 :: int)::ii))) gsz + :: 48 Word.word)) + :: 52 Word.word) else - (let (baseaddress :: 52 bits) = - ((place_slice (( 52 :: int)::ii) desc gsz ((((- gsz)) + (( 48 :: int)::ii))) - gsz - :: 52 Word.word)) in - () )) in + (place_slice (( 52 :: int)::ii) desc gsz ((((- gsz)) + (( 48 :: int)::ii))) + gsz + :: 52 Word.word)) in (let (ns_table :: 1 bits) = (if ((\<not> secondstage)) then (or_vec ns_table (vec_of_bits [access_vec_dec desc (( 63 :: int)::ii)] :: 1 Word.word) @@ -13643,7 +13733,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let ((ap_table :: 2 bits), (pxn_table :: 1 bits), (xn_table :: 1 bits)) = (if (((((\<not> secondstage)) \<and> ((\<not> hierattrsdisabled))))) then (let (ap_table :: 2 bits) = - ((set_slice0 (( 2 :: int)::ii) (( 1 :: int)::ii) ap_table (( 1 :: int)::ii) + ((set_slice (( 2 :: int)::ii) (( 1 :: int)::ii) ap_table (( 1 :: int)::ii) ((or_vec (vec_of_bits [access_vec_dec ap_table (( 1 :: int)::ii)] :: 1 Word.word) (vec_of_bits [access_vec_dec desc (( 62 :: int)::ii)] :: 1 Word.word) :: 1 Word.word)) @@ -13670,7 +13760,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (vec_of_bits [access_vec_dec desc (( 59 :: int)::ii)] :: 1 Word.word) :: 1 Word.word)) in (let (ap_table :: 2 bits) = - ((set_slice0 (( 2 :: int)::ii) (( 1 :: int)::ii) ap_table (( 0 :: int)::ii) + ((set_slice (( 2 :: int)::ii) (( 1 :: int)::ii) ap_table (( 0 :: int)::ii) ((or_vec (vec_of_bits [access_vec_dec ap_table (( 0 :: int)::ii)] :: 1 Word.word) (vec_of_bits [access_vec_dec desc (( 61 :: int)::ii)] :: 1 Word.word) @@ -13685,20 +13775,36 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let (level :: ii) = (((ex_int level)) + (( 1 :: int)::ii)) in (let (addrselecttop :: ii) = (((ex_int addrselectbottom)) - (( 1 :: int)::ii)) in (let (blocktranslate :: bool) = False in - return (ap_table, level, ns_table, pxn_table, result, xn_table))))))))))) \<bind> (\<lambda> varstup . (let ((ap_table :: 2 - bits), (level :: ii), (ns_table :: 1 bits), (pxn_table :: 1 bits), (result :: - TLBRecord), (xn_table :: 1 bits)) = varstup in - return (addrselectbottom, + return (addrselecttop, + ap_table, + baseaddress, + blocktranslate, + level, + ns_table, + pxn_table, + result, + xn_table))))))))))) \<bind> (\<lambda> varstup . (let ((addrselecttop :: ii), (ap_table :: 2 + bits), (baseaddress :: 52 bits), (blocktranslate :: bool), (level :: ii), (ns_table :: 1 + bits), (pxn_table :: 1 bits), (result :: TLBRecord), (xn_table :: 1 bits)) = varstup in + return (accdesc, + addrselectbottom, + addrselecttop, ap_table, + baseaddress, + blocktranslate, desc, descaddr, + descaddr2, + hwupdatewalk, level, ns_table, pxn_table, result, - xn_table)))))))))))))))))))))))) \<bind> (\<lambda> varstup . (let ((addrselectbottom :: ii), (ap_table :: 2 - bits), (desc :: 64 bits), (descaddr :: AddressDescriptor), (level :: ii), (ns_table :: 1 - bits), (pxn_table :: 1 bits), (result :: TLBRecord), (xn_table :: 1 bits)) = varstup in + xn_table)))))))))))))))))))))))) \<bind> (\<lambda> varstup . (let ((accdesc :: AccessDescriptor), (addrselectbottom :: + ii), (addrselecttop :: ii), (ap_table :: 2 bits), (baseaddress :: 52 bits), (blocktranslate :: + bool), (desc :: 64 bits), (descaddr :: AddressDescriptor), (descaddr2 :: + AddressDescriptor), (hwupdatewalk :: bool), (level :: ii), (ns_table :: 1 bits), (pxn_table :: 1 + bits), (result :: TLBRecord), (xn_table :: 1 bits)) = varstup in if ((((ex_int level)) < ((ex_int firstblocklevel)))) then (let (tmp_260 :: AddressDescriptor) = ((TLBRecord_addrdesc result)) in liftR (AArch64_TranslationFault ipaddress level acctype iswrite secondstage s2fs1walk) \<bind> (\<lambda> (w__155 :: @@ -13726,7 +13832,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word else return result) else return result) \<bind> (\<lambda> (result :: TLBRecord) . or_boolM - (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) + (return ((((((((((ex_int outputsize)) < (( 52 :: int)::ii))) \<and> largegrain))) \<and> ((\<not> ((IsZero ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))))))) (and_boolM (return ((((ex_int outputsize)) < (( 48 :: int)::ii)))) (liftR (IsZero_slice desc outputsize ((((- ((ex_int outputsize)))) + (( 48 :: int)::ii)))) \<bind> (\<lambda> (w__158 :: @@ -13747,7 +13853,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word liftR (assert_exp True ('''')) \<then> ((let (outputaddress :: 52 bits) = (if (((((ex_int outputsize)) = (( 52 :: int)::ii)))) then - (concat_vec ((slice0 desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + (concat_vec ((slice desc (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) ((slice_slice_concat (( 48 :: int)::ii) desc asb ((((- asb)) + (( 48 :: int)::ii))) inputaddr (( 0 :: int)::ii) asb :: 48 Word.word)) @@ -13756,6 +13862,11 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (slice_slice_concat (( 52 :: int)::ii) desc asb ((((- asb)) + (( 48 :: int)::ii))) inputaddr (( 0 :: int)::ii) asb :: 52 Word.word)) in + (let (tmp_330 :: DescriptorUpdate) = ((TLBRecord_descupdate result)) in + (let tmp_330 = ((tmp_330 (| DescriptorUpdate_AF := False |))) in + (let tmp_330 = ((tmp_330 (| DescriptorUpdate_AP := False |))) in + (let tmp_330 = ((tmp_330 (| DescriptorUpdate_descaddr := descaddr |))) in + (let result = ((result (| TLBRecord_descupdate := tmp_330 |))) in (if ((((vec_of_bits [access_vec_dec desc (( 10 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))) then if ((\<not> update_AF)) then (let (tmp_290 :: AddressDescriptor) = ((TLBRecord_addrdesc result)) in @@ -13775,7 +13886,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let ((desc :: 64 bits), (result :: TLBRecord)) = (if (((((\<not> secondstage)) \<and> ((((vec_of_bits [access_vec_dec desc (( 7 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word))))))) then (let (desc :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) + ((set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 64 Word.word)) in (let (tmp_310 :: DescriptorUpdate) = ((TLBRecord_descupdate result)) in (let (tmp_310 :: DescriptorUpdate) = @@ -13786,7 +13897,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let ((desc :: 64 bits), (result :: TLBRecord)) = (if (((secondstage \<and> ((((vec_of_bits [access_vec_dec desc (( 7 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) then (let (desc :: 64 bits) = - ((set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + ((set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word)) in (let (tmp_320 :: DescriptorUpdate) = ((TLBRecord_descupdate result)) in (let (tmp_320 :: DescriptorUpdate) = @@ -13797,9 +13908,6 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (desc, result))) in (desc, result)) else (desc, result)) in - (let (tmp_330 :: DescriptorUpdate) = ((TLBRecord_descupdate result)) in - (let tmp_330 = ((tmp_330 (| DescriptorUpdate_descaddr := descaddr |))) in - (let result = ((result (| TLBRecord_descupdate := tmp_330 |))) in liftR ((undefined_bitvector (( 1 :: int)::ii) :: ( 1 Word.word) M)) \<bind> (\<lambda> (xn :: 1 bits) . liftR ((undefined_bitvector (( 1 :: int)::ii) :: ( 1 Word.word) M)) \<bind> (\<lambda> (pxn :: 1 bits) . (let ((pxn :: 1 bits), (xn :: 1 bits)) = @@ -13814,7 +13922,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let (contiguousbit :: 1 bits) = ((vec_of_bits [access_vec_dec desc (( 52 :: int)::ii)] :: 1 Word.word)) in (let (nG :: 1 bits) = ((vec_of_bits [access_vec_dec desc (( 11 :: int)::ii)] :: 1 Word.word)) in - (let (sh :: 2 bits) = ((slice0 desc (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let (sh :: 2 bits) = ((slice desc (( 8 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in liftR ((undefined_bitvector (( 3 :: int)::ii) :: ( 3 Word.word) M)) \<bind> (\<lambda> (ap :: 3 bits) . (let (ap :: 3 bits) = (if apply_nvnv1_effect then @@ -13822,10 +13930,10 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (vec_of_bits [B0,B1] :: 2 Word.word) :: 3 Word.word) else - (concat_vec ((slice0 desc (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + (concat_vec ((slice desc (( 6 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (vec_of_bits [B1] :: 1 Word.word) :: 3 Word.word)) in - (let (memattr :: 4 bits) = ((slice0 desc (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in + (let (memattr :: 4 bits) = ((slice desc (( 2 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in liftR ((undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M)) \<bind> (\<lambda> (w__163 :: 4 bits) . (let result = ((result (| TLBRecord_domain := w__163 |))) in (let result = ((result (| TLBRecord_level := level |))) in @@ -13843,7 +13951,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (let result = ((result (| TLBRecord_perms := tmp_340 |))) in (let (tmp_350 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let tmp_350 = - ((set_slice0 (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_350 (( 2 :: int)::ii) + ((set_slice (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_350 (( 2 :: int)::ii) ((or_vec (vec_of_bits [access_vec_dec ap (( 2 :: int)::ii)] :: 1 Word.word) (vec_of_bits [access_vec_dec ap_table (( 1 :: int)::ii)] :: 1 Word.word) :: 1 Word.word)) @@ -13854,7 +13962,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (if ((\<not> singlepriv)) then (let (tmp_370 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let tmp_370 = - ((set_slice0 (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_370 (( 1 :: int)::ii) + ((set_slice (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_370 (( 1 :: int)::ii) ((and_vec (vec_of_bits [access_vec_dec ap (( 1 :: int)::ii)] :: 1 Word.word) ((not_vec (vec_of_bits [access_vec_dec ap_table (( 0 :: int)::ii)] :: 1 Word.word) :: 1 Word.word)) @@ -13876,7 +13984,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word else (let (tmp_400 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let (tmp_400 :: 3 bits) = - ((set_slice0 (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_400 (( 1 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + ((set_slice (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_400 (( 1 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 3 Word.word)) in (let (tmp_410 :: Permissions) = ((TLBRecord_perms result)) in (let (tmp_410 :: Permissions) = ((tmp_410 (| Permissions_ap := tmp_400 |))) in @@ -13890,13 +13998,13 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word return result)))))))))) \<bind> (\<lambda> (result :: TLBRecord) . (let (tmp_430 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let tmp_430 = - ((set_slice0 (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_430 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + ((set_slice (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_430 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 3 Word.word)) in (let (tmp_440 :: Permissions) = ((TLBRecord_perms result)) in (let tmp_440 = ((tmp_440 (| Permissions_ap := tmp_430 |))) in (let result = ((result (| TLBRecord_perms := tmp_440 |))) in (let (tmp_450 :: AddressDescriptor) = ((TLBRecord_addrdesc result)) in - liftR (AArch64_S1AttrDecode sh ((slice0 memattr (( 0 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) acctype) \<bind> (\<lambda> (w__165 :: + liftR (AArch64_S1AttrDecode sh ((slice memattr (( 0 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) acctype) \<bind> (\<lambda> (w__165 :: MemoryAttributes) . (let (tmp_450 :: AddressDescriptor) = ((tmp_450 (| AddressDescriptor_memattrs := w__165 |))) in @@ -13915,14 +14023,14 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word else (let (tmp_480 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let tmp_480 = - ((set_slice0 (( 3 :: int)::ii) (( 2 :: int)::ii) tmp_480 (( 1 :: int)::ii) ((slice0 ap (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((set_slice (( 3 :: int)::ii) (( 2 :: int)::ii) tmp_480 (( 1 :: int)::ii) ((slice ap (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) :: 3 Word.word)) in (let (tmp_490 :: Permissions) = ((TLBRecord_perms result)) in (let tmp_490 = ((tmp_490 (| Permissions_ap := tmp_480 |))) in (let result = ((result (| TLBRecord_perms := tmp_490 |))) in (let (tmp_500 :: 3 bits) = ((Permissions_ap (TLBRecord_perms result))) in (let tmp_500 = - ((set_slice0 (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_500 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + ((set_slice (( 3 :: int)::ii) (( 1 :: int)::ii) tmp_500 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 3 Word.word)) in (let (tmp_510 :: Permissions) = ((TLBRecord_perms result)) in (let tmp_510 = ((tmp_510 (| Permissions_ap := tmp_500 |))) in @@ -13973,7 +14081,7 @@ definition AArch64_TranslationTableWalk :: "(52)Word.word \<Rightarrow>(64)Word (result (| TLBRecord_CnP := ((vec_of_bits [access_vec_dec baseregister (( 0 :: int)::ii)] :: 1 Word.word))|)) else result) in - return result))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))" + return result)))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))" (*val IsZero_slice2 : forall 'n . Size 'n => mword 'n -> ii -> ii -> M bool*) @@ -14185,7 +14293,7 @@ definition AArch64_TranslateAddressS1Off :: "(64)Word.word \<Rightarrow> AccTyp (let (tmp_2410 :: FullAddress) = ((AddressDescriptor_paddress (TLBRecord_addrdesc result))) in (let tmp_2410 = ((tmp_2410 (| - FullAddress_physicaladdress := ((slice0 vaddress (( 0 :: int)::ii) (( 52 :: int)::ii) :: 52 Word.word))|))) in + FullAddress_physicaladdress := ((slice vaddress (( 0 :: int)::ii) (( 52 :: int)::ii) :: 52 Word.word))|))) in (let (tmp_2420 :: AddressDescriptor) = ((TLBRecord_addrdesc result)) in (let tmp_2420 = ((tmp_2420 (| AddressDescriptor_paddress := tmp_2410 |))) in (let result = ((result (| TLBRecord_addrdesc := tmp_2420 |))) in @@ -14255,7 +14363,7 @@ definition AArch64_MaybeZeroRegisterUppers :: " unit \<Rightarrow>((register_va read_reg R_ref \<bind> (\<lambda> (w__14 :: ( 64 bits) list) . (let (tmp_30 :: 64 bits) = ((access_list_dec w__14 n :: 64 Word.word)) in (let tmp_30 = - ((set_slice0 (( 64 :: int)::ii) (( 32 :: int)::ii) tmp_30 (( 32 :: int)::ii) ((Zeros__1 (( 32 :: int)::ii) () :: 32 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 32 :: int)::ii) tmp_30 (( 32 :: int)::ii) ((Zeros__1 (( 32 :: int)::ii) () :: 32 Word.word)) :: 64 Word.word)) in read_reg R_ref \<bind> (\<lambda> (w__15 :: ( 64 Word.word) list) . write_reg R_ref ((update_list_dec w__15 n tmp_30 :: ( 64 Word.word) list)))))) @@ -14315,7 +14423,7 @@ definition DCPSInstruction :: "(2)Word.word \<Rightarrow>((register_value),(uni (read_reg SCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__18 :: 32 Word.word) . write_reg SCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__18 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word))) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__18 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word))) else return () ) \<then> UsingAArch32 () ) \<bind> (\<lambda> (w__19 :: bool) . assert_exp w__19 (''UsingAArch32()'') \<then> @@ -14472,23 +14580,23 @@ definition AArch64_FaultSyndrome :: " bool \<Rightarrow> FaultRecord \<Rightarr ((let (iss :: 25 bits) = ((Zeros__1 (( 25 :: int)::ii) () :: 25 Word.word)) in and_boolM (return ((HaveRASExt () ))) ((IsExternalSyncAbort__1 fault)) \<bind> (\<lambda> (w__1 :: bool) . (let (iss :: 25 bits) = - (if w__1 then (set_slice0 (( 25 :: int)::ii) (( 2 :: int)::ii) iss (( 11 :: int)::ii)(FaultRecord_errortype fault) :: 25 Word.word) + (if w__1 then (set_slice (( 25 :: int)::ii) (( 2 :: int)::ii) iss (( 11 :: int)::ii)(FaultRecord_errortype fault) :: 25 Word.word) else iss) in (if d_side then and_boolM ((IsSecondStage fault)) (return ((\<not>(FaultRecord_s2fs1walk fault)))) \<bind> (\<lambda> (w__3 :: bool) . (if w__3 then (LSInstructionSyndrome () :: ( 11 Word.word) M) \<bind> (\<lambda> (w__4 :: 11 Word.word) . - (let (iss :: 25 bits) = ((set_slice0 (( 25 :: int)::ii) (( 11 :: int)::ii) iss (( 14 :: int)::ii) w__4 :: 25 Word.word)) in + (let (iss :: 25 bits) = ((set_slice (( 25 :: int)::ii) (( 11 :: int)::ii) iss (( 14 :: int)::ii) w__4 :: 25 Word.word)) in return iss)) else return iss) \<bind> (\<lambda> (iss :: 25 bits) . (let (iss :: 25 bits) = (if (((((((FaultRecord_acctype fault) = AccType_DC))) \<or> (((((((FaultRecord_acctype fault) = AccType_IC))) \<or> ((((FaultRecord_acctype fault) = AccType_AT))))))))) then (let (iss :: 25 bits) = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 8 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 25 Word.word)) in - (set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 6 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 25 Word.word)) + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 8 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 25 Word.word)) in + (set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 6 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 25 Word.word)) else - (set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 6 :: int)::ii) + (set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 6 :: int)::ii) (if(FaultRecord_write fault) then (vec_of_bits [B1] :: 1 Word.word) else (vec_of_bits [B0] :: 1 Word.word)) :: 25 Word.word)) in @@ -14496,16 +14604,16 @@ definition AArch64_FaultSyndrome :: " bool \<Rightarrow> FaultRecord \<Rightarr else return iss) \<bind> (\<lambda> (iss :: 25 bits) . IsExternalAbort__1 fault \<bind> (\<lambda> (w__5 :: bool) . (let (iss :: 25 bits) = - (if w__5 then (set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 9 :: int)::ii)(FaultRecord_extflag fault) :: 25 Word.word) + (if w__5 then (set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 9 :: int)::ii)(FaultRecord_extflag fault) :: 25 Word.word) else iss) in (let iss = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 7 :: int)::ii) + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) iss (( 7 :: int)::ii) (if(FaultRecord_s2fs1walk fault) then (vec_of_bits [B1] :: 1 Word.word) else (vec_of_bits [B0] :: 1 Word.word)) :: 25 Word.word)) in (EncodeLDFSC(FaultRecord_typ fault)(FaultRecord_level fault) :: ( 6 Word.word) M) \<bind> (\<lambda> (w__6 :: 6 Word.word) . - (let (iss :: 25 bits) = ((set_slice0 (( 25 :: int)::ii) (( 6 :: int)::ii) iss (( 0 :: int)::ii) w__6 :: 25 Word.word)) in + (let (iss :: 25 bits) = ((set_slice (( 25 :: int)::ii) (( 6 :: int)::ii) iss (( 0 :: int)::ii) w__6 :: 25 Word.word)) in return iss)))))))))))" @@ -14540,11 +14648,11 @@ definition AArch64_ExecutingATS1xPInstr :: " unit \<Rightarrow>((register_value (undefined_bitvector (( 4 :: int)::ii) :: ( 4 Word.word) M) \<bind> (\<lambda> (CRn :: 4 bits) . (undefined_bitvector (( 3 :: int)::ii) :: ( 3 Word.word) M) \<bind> (\<lambda> (op1 :: 3 bits) . (let (w__0 :: bool) = - (if (((((slice0 instr (( 22 :: int)::ii) (( 10 :: int)::ii) :: 10 Word.word)) = (vec_of_bits [B1,B1,B0,B1,B0,B1,B0,B1,B0,B0] :: 10 Word.word)))) then - (let (op1 :: 3 bits) = ((slice0 instr (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in - (let (CRn :: 4 bits) = ((slice0 instr (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in - (let (CRm :: 4 bits) = ((slice0 instr (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in - (let (op2 :: 3 bits) = ((slice0 instr (( 5 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (if (((((slice instr (( 22 :: int)::ii) (( 10 :: int)::ii) :: 10 Word.word)) = (vec_of_bits [B1,B1,B0,B1,B0,B1,B0,B1,B0,B0] :: 10 Word.word)))) then + (let (op1 :: 3 bits) = ((slice instr (( 16 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + (let (CRn :: 4 bits) = ((slice instr (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in + (let (CRm :: 4 bits) = ((slice instr (( 8 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in + (let (op2 :: 3 bits) = ((slice instr (( 5 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in ((((((((((op1 = (vec_of_bits [B0,B0,B0] :: 3 Word.word)))) \<and> (((CRn = (vec_of_bits [B0,B1,B1,B1] :: 4 Word.word))))))) \<and> (((CRm = (vec_of_bits [B1,B0,B0,B1] :: 4 Word.word))))))) \<and> ((((((op2 = (vec_of_bits [B0,B0,B0] :: 3 Word.word)))) \<or> (((op2 = (vec_of_bits [B0,B0,B1] :: 3 Word.word)))))))))))) else False) in return w__0)))))))" @@ -14692,13 +14800,13 @@ definition AArch64_ReportException :: " ExceptionRecord \<Rightarrow>(2)Word.wo (read_reg HPFAR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 Word.word) . write_reg HPFAR_EL2_ref - ((set_slice0 (( 64 :: int)::ii) (( 40 :: int)::ii) w__1 (( 4 :: int)::ii) - ((slice0(ExceptionRecord_ipaddress exception) (( 12 :: int)::ii) (( 40 :: int)::ii) :: 40 Word.word)) + ((set_slice (( 64 :: int)::ii) (( 40 :: int)::ii) w__1 (( 4 :: int)::ii) + ((slice(ExceptionRecord_ipaddress exception) (( 12 :: int)::ii) (( 40 :: int)::ii) :: 40 Word.word)) :: 64 Word.word))) else (read_reg HPFAR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__2 :: 64 Word.word) . (undefined_bitvector (( 40 :: int)::ii) :: ( 40 Word.word) M) \<bind> (\<lambda> (w__3 :: 40 Word.word) . - write_reg HPFAR_EL2_ref ((set_slice0 (( 64 :: int)::ii) (( 40 :: int)::ii) w__2 (( 4 :: int)::ii) w__3 :: 64 Word.word)))) + write_reg HPFAR_EL2_ref ((set_slice (( 64 :: int)::ii) (( 40 :: int)::ii) w__2 (( 4 :: int)::ii) w__3 :: 64 Word.word)))) else return () )))))))))))" @@ -14777,59 +14885,65 @@ definition AArch64_ESBOperation :: " unit \<Rightarrow>((register_value),(unit) definition AArch64_CheckAndUpdateDescriptor :: " DescriptorUpdate \<Rightarrow> FaultRecord \<Rightarrow> bool \<Rightarrow>(64)Word.word \<Rightarrow> AccType \<Rightarrow> bool \<Rightarrow> bool \<Rightarrow> bool \<Rightarrow>((register_value),(FaultRecord),(exception))monad " where " AArch64_CheckAndUpdateDescriptor result fault secondstage vaddress acctype iswrite s2fs1walk hwupdatewalk__arg = ( catch_early_return - ((let hwupdatewalk = hwupdatewalk__arg in - liftR (undefined_bool () ) \<bind> (\<lambda> (hw_update_AF :: bool) . - (let (hw_update_AF :: bool) = - (if(DescriptorUpdate_AF result) then - if ((((FaultRecord_typ fault) = Fault_None))) then True - else if (((((ConstrainUnpredictable Unpredictable_AFUPDATE)) = Constraint_TRUE))) then True - else False - else hw_update_AF) in - liftR (undefined_bool () ) \<bind> (\<lambda> (hw_update_AP :: bool) . - liftR (undefined_bool () ) \<bind> (\<lambda> (write_perm_req :: bool) . - (let (hw_update_AP :: bool) = - (if ((((DescriptorUpdate_AP result) \<and> ((((FaultRecord_typ fault) = Fault_None)))))) then - (let (write_perm_req :: bool) = - ((((iswrite \<or> ((((((acctype = AccType_ATOMICRW))) \<or> (((acctype = AccType_ORDEREDRW))))))))) \<and> ((\<not> s2fs1walk))) in - ((((write_perm_req \<and> ((\<not> ((((((acctype = AccType_AT))) \<or> (((acctype = AccType_DC))))))))))) \<or> hwupdatewalk)) - else False) in - liftR ((undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M)) \<bind> (\<lambda> (desc :: 64 bits) . - liftR (undefined_AccessDescriptor () ) \<bind> (\<lambda> (accdesc :: AccessDescriptor) . - liftR (undefined_AddressDescriptor () ) \<bind> (\<lambda> (descaddr2 :: AddressDescriptor) . - (if (((hw_update_AF \<or> hw_update_AP))) then - or_boolM (return secondstage) - (liftR (HasS2Translation () ) \<bind> (\<lambda> (w__0 :: bool) . return ((\<not> w__0)))) \<bind> (\<lambda> (w__1 :: - bool) . - (if w__1 then - (let (descaddr2 :: AddressDescriptor) = ((DescriptorUpdate_descaddr result)) in - return descaddr2) - else - (let hwupdatewalk = True in - liftR (AArch64_SecondStageWalk(DescriptorUpdate_descaddr result) vaddress acctype iswrite - (( 8 :: int)::ii) hwupdatewalk) \<bind> (\<lambda> (w__2 :: AddressDescriptor) . - (let descaddr2 = w__2 in - (if ((IsFault descaddr2)) then - (early_return(AddressDescriptor_fault descaddr2) :: (unit, FaultRecord) MR) - else return () ) \<then> - return descaddr2)))) \<bind> (\<lambda> (descaddr2 :: AddressDescriptor) . - liftR (CreateAccessDescriptor AccType_ATOMICRW) \<bind> (\<lambda> (w__3 :: AccessDescriptor) . - (let accdesc = w__3 in - liftR ((aget__Mem descaddr2 (( 8 :: int)::ii) accdesc :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__4 :: 64 bits) . - (let desc = w__4 in - (let (desc :: 64 bits) = - (if hw_update_AF then - (set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 10 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word) - else desc) in - (let (desc :: 64 bits) = - (if hw_update_AP then - (set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) - (if secondstage then (vec_of_bits [B1] :: 1 Word.word) - else (vec_of_bits [B0] :: 1 Word.word)) - :: 64 Word.word) - else desc) in - liftR (aset__Mem descaddr2 (( 8 :: int)::ii) accdesc desc))))))))) - else return () ) \<then> - return fault)))))))))))" + (liftR ((aget_SCTLR__1 () :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__0 :: 32 Word.word) . + (let reversedescriptors = (((access_vec_dec w__0 (( 25 :: int)::ii))) = B1) in + (let hwupdatewalk = hwupdatewalk__arg in + liftR (undefined_bool () ) \<bind> (\<lambda> (hw_update_AF :: bool) . + (let (hw_update_AF :: bool) = + (if(DescriptorUpdate_AF result) then + if ((((FaultRecord_typ fault) = Fault_None))) then True + else if (((((ConstrainUnpredictable Unpredictable_AFUPDATE)) = Constraint_TRUE))) then True + else False + else False) in + liftR (undefined_bool () ) \<bind> (\<lambda> (hw_update_AP :: bool) . + liftR (undefined_bool () ) \<bind> (\<lambda> (write_perm_req :: bool) . + (let (hw_update_AP :: bool) = + (if ((((DescriptorUpdate_AP result) \<and> ((((FaultRecord_typ fault) = Fault_None)))))) then + (let (write_perm_req :: bool) = + ((((iswrite \<or> ((((((acctype = AccType_ATOMICRW))) \<or> (((acctype = AccType_ORDEREDRW))))))))) \<and> ((\<not> s2fs1walk))) in + ((((write_perm_req \<and> ((\<not> ((((((acctype = AccType_AT))) \<or> (((acctype = AccType_DC))))))))))) \<or> hwupdatewalk)) + else False) in + liftR ((undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M)) \<bind> (\<lambda> (desc :: 64 bits) . + liftR (undefined_AccessDescriptor () ) \<bind> (\<lambda> (accdesc :: AccessDescriptor) . + liftR (undefined_AddressDescriptor () ) \<bind> (\<lambda> (descaddr2 :: AddressDescriptor) . + (if (((hw_update_AF \<or> hw_update_AP))) then + or_boolM (return secondstage) + (liftR (HasS2Translation () ) \<bind> (\<lambda> (w__1 :: bool) . return ((\<not> w__1)))) \<bind> (\<lambda> (w__2 :: + bool) . + (if w__2 then + (let (descaddr2 :: AddressDescriptor) = ((DescriptorUpdate_descaddr result)) in + return descaddr2) + else + (let hwupdatewalk = True in + liftR (AArch64_SecondStageWalk(DescriptorUpdate_descaddr result) vaddress acctype iswrite + (( 8 :: int)::ii) hwupdatewalk) \<bind> (\<lambda> (w__3 :: AddressDescriptor) . + (let descaddr2 = w__3 in + (if ((IsFault descaddr2)) then + (early_return(AddressDescriptor_fault descaddr2) :: (unit, FaultRecord) MR) + else return () ) \<then> + return descaddr2)))) \<bind> (\<lambda> (descaddr2 :: AddressDescriptor) . + liftR (CreateAccessDescriptor AccType_ATOMICRW) \<bind> (\<lambda> (w__4 :: AccessDescriptor) . + (let accdesc = w__4 in + liftR ((aget__Mem descaddr2 (( 8 :: int)::ii) accdesc :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__5 :: 64 bits) . + (let desc = w__5 in + (if reversedescriptors then liftR ((BigEndianReverse desc :: ( 64 Word.word) M)) + else return desc) \<bind> (\<lambda> (desc :: 64 bits) . + (let (desc :: 64 bits) = + (if hw_update_AF then + (set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 10 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 64 Word.word) + else desc) in + (let (desc :: 64 bits) = + (if hw_update_AP then + (set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) desc (( 7 :: int)::ii) + (if secondstage then (vec_of_bits [B1] :: 1 Word.word) + else (vec_of_bits [B0] :: 1 Word.word)) + :: 64 Word.word) + else desc) in + (if reversedescriptors then liftR ((BigEndianReverse desc :: ( 64 Word.word) M)) + else return desc) \<bind> (\<lambda> (desc :: 64 bits) . + liftR (aset__Mem descaddr2 (( 8 :: int)::ii) accdesc desc))))))))))) + else return () ) \<then> + return fault)))))))))))))" (*val AArch64_BreakpointValueMatch : ii -> mword ty64 -> bool -> bool*) @@ -14876,9 +14990,9 @@ definition AArch64_StateMatch :: "(2)Word.word \<Rightarrow>(1)Word.word \<Righ (let tmp_50 = tup__1 in (let (tmp_60 :: 5 bits) = tmp_50 in (let HMC = ((vec_of_bits [access_vec_dec tmp_60 (( 4 :: int)::ii)] :: 1 Word.word)) in - (let (tmp_70 :: 4 bits) = ((slice0 tmp_60 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in - (let SSC = ((slice0 tmp_70 (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in - (let PxC = ((slice0 tmp_70 (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let (tmp_70 :: 4 bits) = ((slice tmp_60 (( 0 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in + (let SSC = ((slice tmp_70 (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let PxC = ((slice tmp_70 (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in (liftR (assert_exp ((((((c = Constraint_DISABLED))) \<or> (((c = Constraint_UNKNOWN)))))) (''((c == Constraint_DISABLED) || (c == Constraint_UNKNOWN))'')) \<then> (if (((c = Constraint_DISABLED))) then (early_return False :: (unit, bool) MR) else return () )) \<then> @@ -14896,9 +15010,14 @@ definition AArch64_StateMatch :: "(2)Word.word \<Rightarrow>(1)Word.word \<Righ (if (((((\<not> ispriv)) \<and> ((\<not> isbreakpnt))))) then return EL0_match else liftR (read_reg PSTATE_ref) \<bind> (\<lambda> (w__1 :: ProcState) . - (let (priv_match :: bool) = - ((case (ProcState_EL w__1) of EL31 => EL3_match )) in - return priv_match))) \<bind> (\<lambda> (priv_match :: bool) . + (let p__294 = ((ProcState_EL w__1)) in + (let pat0 = p__294 in + (let (priv_match :: bool) = + (if (((pat0 = EL3))) then EL3_match + else if (((pat0 = EL2))) then EL2_match + else if (((pat0 = EL1))) then EL1_match + else EL0_match) in + return priv_match))))) \<bind> (\<lambda> (priv_match :: bool) . liftR (undefined_bool () ) \<bind> (\<lambda> (security_state_match :: bool) . (let b__0 = SSC in (if (((b__0 = (vec_of_bits [B0,B0] :: 2 Word.word)))) then return True @@ -14916,10 +15035,10 @@ definition AArch64_StateMatch :: "(2)Word.word \<Rightarrow>(1)Word.word \<Righ liftR ((read_reg ID_AA64DFR0_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__4 :: 64 bits) . liftR ((read_reg ID_AA64DFR0_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__5 :: 64 bits) . (let first_ctx_cmp = - (((Word.uint ((slice0 w__4 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))) - - ((Word.uint ((slice0 w__5 (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word))))) in + (((Word.uint ((slice w__4 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))) - + ((Word.uint ((slice w__5 (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word))))) in liftR ((read_reg ID_AA64DFR0_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__6 :: 64 bits) . - (let last_ctx_cmp = (Word.uint ((slice0 w__6 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word))) in + (let last_ctx_cmp = (Word.uint ((slice w__6 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word))) in if (((((((ex_int lbn)) < ((ex_int first_ctx_cmp)))) \<or> ((((ex_int lbn)) > ((ex_int last_ctx_cmp))))))) then liftR (ConstrainUnpredictableInteger first_ctx_cmp last_ctx_cmp Unpredictable_BPNOTCTXCMP) \<bind> (\<lambda> varstup . (let (tup__0, tup__1) = varstup in (let c = tup__0 in @@ -14953,7 +15072,7 @@ definition AArch64_WatchpointMatch :: " int \<Rightarrow>(64)Word.word \<Righta ELUsingAArch32 w__0 \<bind> (\<lambda> (w__1 :: bool) . (assert_exp ((\<not> w__1)) (''!(ELUsingAArch32(S1TranslationRegime()))'') \<then> (read_reg ID_AA64DFR0_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__2 :: 64 bits) . - (assert_exp ((n \<le> ((Word.uint ((slice0 w__2 (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))) (''(n <= UInt((ID_AA64DFR0_EL1).WRPs))'') \<then> + (assert_exp ((n \<le> ((Word.uint ((slice w__2 (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))) (''(n <= UInt((ID_AA64DFR0_EL1).WRPs))'') \<then> read_reg DBGWCR_EL1_ref) \<bind> (\<lambda> (w__3 :: ( 32 bits) list) . (let (enabled :: bool) = ((vec_of_bits [access_vec_dec ((access_list_dec w__3 n :: 32 Word.word)) (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)) in @@ -14965,15 +15084,15 @@ definition AArch64_WatchpointMatch :: " int \<Rightarrow>(64)Word.word \<Righta read_reg DBGWCR_EL1_ref \<bind> (\<lambda> (w__6 :: ( 32 bits) list) . read_reg DBGWCR_EL1_ref \<bind> (\<lambda> (w__7 :: ( 32 bits) list) . read_reg DBGWCR_EL1_ref \<bind> (\<lambda> (w__8 :: ( 32 bits) list) . - AArch64_StateMatch ((slice0 ((access_list_dec w__5 n :: 32 Word.word)) (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + AArch64_StateMatch ((slice ((access_list_dec w__5 n :: 32 Word.word)) (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (vec_of_bits [access_vec_dec ((access_list_dec w__6 n :: 32 Word.word)) (( 13 :: int)::ii)] :: 1 Word.word) - ((slice0 ((access_list_dec w__7 n :: 32 Word.word)) (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) linked - ((slice0 ((access_list_dec w__8 n :: 32 Word.word)) (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) isbreakpnt + ((slice ((access_list_dec w__7 n :: 32 Word.word)) (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) linked + ((slice ((access_list_dec w__8 n :: 32 Word.word)) (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) isbreakpnt ispriv \<bind> (\<lambda> (state_match :: bool) . read_reg DBGWCR_EL1_ref \<bind> (\<lambda> (w__9 :: ( 32 bits) list) . (let (ls_match :: bool) = ((vec_of_bits [access_vec_dec - ((slice0 ((access_list_dec w__9 n :: 32 Word.word)) (( 3 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + ((slice ((access_list_dec w__9 n :: 32 Word.word)) (( 3 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (if iswrite then (( 1 :: int)::ii) else (( 0 :: int)::ii))] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)) in @@ -14994,7 +15113,7 @@ definition AArch64_BreakpointMatch :: " int \<Rightarrow>(64)Word.word \<Righta ELUsingAArch32 w__0 \<bind> (\<lambda> (w__1 :: bool) . (assert_exp ((\<not> w__1)) (''!(ELUsingAArch32(S1TranslationRegime()))'') \<then> (read_reg ID_AA64DFR0_EL1_ref :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__2 :: 64 bits) . - (assert_exp ((n \<le> ((Word.uint ((slice0 w__2 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))) (''(n <= UInt((ID_AA64DFR0_EL1).BRPs))'') \<then> + (assert_exp ((n \<le> ((Word.uint ((slice w__2 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))))) (''(n <= UInt((ID_AA64DFR0_EL1).BRPs))'') \<then> read_reg DBGBCR_EL1_ref) \<bind> (\<lambda> (w__3 :: ( 32 bits) list) . (let (enabled :: bool) = ((vec_of_bits [access_vec_dec ((access_list_dec w__3 n :: 32 Word.word)) (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)) in @@ -15002,7 +15121,7 @@ definition AArch64_BreakpointMatch :: " int \<Rightarrow>(64)Word.word \<Righta (let (ispriv :: bool) = ((ProcState_EL w__4) \<noteq> EL0) in read_reg DBGBCR_EL1_ref \<bind> (\<lambda> (w__5 :: ( 32 bits) list) . (let (linked :: bool) = - (((and_vec ((slice0 ((access_list_dec w__5 n :: 32 Word.word)) (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) + (((and_vec ((slice ((access_list_dec w__5 n :: 32 Word.word)) (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) (vec_of_bits [B1,B0,B1,B1] :: 4 Word.word) :: 4 Word.word)) = (vec_of_bits [B0,B0,B0,B1] :: 4 Word.word)) in (let (isbreakpnt :: bool) = True in @@ -15011,10 +15130,10 @@ definition AArch64_BreakpointMatch :: " int \<Rightarrow>(64)Word.word \<Righta read_reg DBGBCR_EL1_ref \<bind> (\<lambda> (w__7 :: ( 32 bits) list) . read_reg DBGBCR_EL1_ref \<bind> (\<lambda> (w__8 :: ( 32 bits) list) . read_reg DBGBCR_EL1_ref \<bind> (\<lambda> (w__9 :: ( 32 bits) list) . - AArch64_StateMatch ((slice0 ((access_list_dec w__6 n :: 32 Word.word)) (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) + AArch64_StateMatch ((slice ((access_list_dec w__6 n :: 32 Word.word)) (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) (vec_of_bits [access_vec_dec ((access_list_dec w__7 n :: 32 Word.word)) (( 13 :: int)::ii)] :: 1 Word.word) - ((slice0 ((access_list_dec w__8 n :: 32 Word.word)) (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) linked - ((slice0 ((access_list_dec w__9 n :: 32 Word.word)) (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) isbreakpnt + ((slice ((access_list_dec w__8 n :: 32 Word.word)) (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) linked + ((slice ((access_list_dec w__9 n :: 32 Word.word)) (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) isbreakpnt ispriv \<bind> (\<lambda> (state_match :: bool) . (let (value_match_name :: bool) = (AArch64_BreakpointValueMatch n vaddress linked_to) in undefined_bool () \<bind> (\<lambda> (match_i :: bool) . @@ -15028,7 +15147,7 @@ definition AArch64_BreakpointMatch :: " int \<Rightarrow>(64)Word.word \<Righta and_boolM (return ((((vec_of_bits [access_vec_dec vaddress (( 1 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word))))) (read_reg DBGBCR_EL1_ref \<bind> (\<lambda> (w__11 :: ( 32 bits) list) . - return (((((slice0 ((access_list_dec w__11 n :: 32 Word.word)) (( 5 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + return (((((slice ((access_list_dec w__11 n :: 32 Word.word)) (( 5 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) = (vec_of_bits [B1,B1,B1,B1] :: 4 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . (if w__12 then if value_match_name then ConstrainUnpredictableBool Unpredictable_BPMATCHHALF else return value_match_name @@ -15051,12 +15170,13 @@ definition AArch64_CheckBreakpoint :: "(64)Word.word \<Rightarrow> int \<Righta ((let (val_match :: bool) = False in undefined_bool () \<bind> (\<lambda> (match_i :: bool) . (read_reg ID_AA64DFR0_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . - (foreachM (index_list (( 0 :: int)::ii) ((Word.uint ((slice0 w__5 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))) (( 1 :: int)::ii)) val_match - (\<lambda> i val_match . + (foreachM (index_list (( 0 :: int)::ii) ((Word.uint ((slice w__5 (( 12 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))) (( 1 :: int)::ii)) (match_i, + val_match) + (\<lambda> i varstup . (let (match_i, val_match) = varstup in AArch64_BreakpointMatch i vaddress size1 \<bind> (\<lambda> (w__6 :: bool) . (let (match_i :: bool) = w__6 in (let (val_match :: bool) = (val_match \<or> match_i) in - return val_match))))) \<bind> (\<lambda> (val_match :: bool) . + return (match_i, val_match))))))) \<bind> (\<lambda> varstup . (let ((match_i :: bool), (val_match :: bool)) = varstup in undefined_bool () \<bind> (\<lambda> (iswrite :: bool) . undefined_AccType () \<bind> (\<lambda> (acctype :: AccType) . (undefined_bitvector (( 6 :: int)::ii) :: ( 6 Word.word) M) \<bind> (\<lambda> (reason :: 6 bits) . @@ -15074,7 +15194,7 @@ definition AArch64_CheckBreakpoint :: "(64)Word.word \<Rightarrow> int \<Righta (let acctype = AccType_IFETCH in (let iswrite = False in AArch64_DebugFault acctype iswrite)) - else AArch64_NoFault () ))))))))))))))" + else AArch64_NoFault () )))))))))))))))" (*val AArch64_BranchAddr : mword ty64 -> M (mword ty64)*) @@ -15119,7 +15239,7 @@ definition BranchTo :: "('N::len)Word.word \<Rightarrow> BranchType \<Rightarro and_boolM (return (((((int (size target))) = (( 64 :: int)::ii))))) (UsingAArch32 () \<bind> (\<lambda> (w__2 :: bool) . return ((\<not> w__2)))) \<bind> (\<lambda> (w__3 :: bool) . (assert_exp w__3 (''((N == 64) && !(UsingAArch32()))'') \<then> - (AArch64_BranchAddr ((slice0 target (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__4 :: 64 + (AArch64_BranchAddr ((slice target (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__4 :: 64 bits) . write_reg PC_ref w__4)))))" @@ -15475,7 +15595,7 @@ definition AArch64_TakeException :: "(2)Word.word \<Rightarrow> ExceptionRecord else return () ) \<then> (aget_VBAR__1 () :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__37 :: 64 Word.word) . (BranchTo - ((concat_vec ((slice0 w__37 (( 11 :: int)::ii) (( 53 :: int)::ii) :: 53 Word.word)) + ((concat_vec ((slice w__37 (( 11 :: int)::ii) (( 53 :: int)::ii) :: 53 Word.word)) ((GetSlice_int ((make_the_value (( 11 :: int)::ii) :: 11 itself)) vect_offset (( 0 :: int)::ii) :: 11 Word.word)) :: 64 Word.word)) BranchType_EXCEPTION \<then> undefined_bool () ) \<bind> (\<lambda> (iesb_req :: bool) . @@ -15522,7 +15642,7 @@ definition Strip :: "(64)Word.word \<Rightarrow> bool \<Rightarrow>((register_v ((replicate_bits (vec_of_bits [access_vec_dec A (( 55 :: int)::ii)] :: 1 Word.word) (( 64 :: int)::ii) :: 64 Word.word)) in (let (original_ptr :: 64 bits) = (if tbi then - (concat_vec ((slice0 A (( 56 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) + (concat_vec ((slice A (( 56 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) ((slice_slice_concat (( 56 :: int)::ii) extfield (( 0 :: int)::ii) ((((- bottom_PAC_bit)) + (( 56 :: int)::ii))) A (( 0 :: int)::ii) bottom_PAC_bit :: 56 Word.word)) @@ -15531,45 +15651,53 @@ definition Strip :: "(64)Word.word \<Rightarrow> bool \<Rightarrow>((register_v (slice_slice_concat (( 64 :: int)::ii) extfield (( 0 :: int)::ii) ((((- bottom_PAC_bit)) + (( 64 :: int)::ii))) A (( 0 :: int)::ii) bottom_PAC_bit :: 64 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__1 :: ProcState) . - (case (ProcState_EL w__1) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__2 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__2 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__4 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__4 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__5 :: bool) . return ((\<not> w__5))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__7 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__7 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__8 :: bool) . - (let TrapEL2 = w__8 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__9 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__9 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__10 :: bool) . - (let (TrapEL3 :: bool) = w__10 in return (TrapEL2, TrapEL3)))))) - ) \<bind> (\<lambda> varstup . (let ((TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__1 :: ProcState) . + (let p__293 = ((ProcState_EL w__1)) in + (let pat0 = p__293 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__2 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__2 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__4 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__4 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__5 :: bool) . return ((\<not> w__5))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__7 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__7 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__8 :: bool) . + (let TrapEL2 = w__8 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__9 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__9 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__10 :: bool) . + (let (TrapEL3 :: bool) = w__10 in + return (TrapEL2, TrapEL3)))))) + else if (((pat0 = EL1))) then + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__11 :: bool) . return ((\<not> w__11))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__13 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let TrapEL2 = w__14 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__15 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__16 :: bool) . + (let (TrapEL3 :: bool) = w__16 in + return (TrapEL2, TrapEL3))))) + else if (((pat0 = EL2))) then + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__17 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__17 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__18 :: bool) . + (let (TrapEL3 :: bool) = w__18 in + return (TrapEL2, TrapEL3)))) + else + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (TrapEL2, TrapEL3)))) \<bind> (\<lambda> varstup . (let ((TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else return original_ptr))))))))))))))" + else return original_ptr))))))))))))))))" (*val aarch64_integer_pac_strip_dp_1src : ii -> bool -> M unit*) @@ -15602,64 +15730,71 @@ definition AuthIB :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>((r (read_reg APIBKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APIBKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APIBKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 30 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 30 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__292 = ((ProcState_EL w__2)) in + (let pat0 = p__292 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 30 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 30 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 30 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 30 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 30 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (Auth X Y APIBKey_EL1 False (vec_of_bits [B1] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))" + else (Auth X Y APIBKey_EL1 False (vec_of_bits [B1] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_autib_dp_1src : ii -> ii -> bool -> M unit*) @@ -15729,64 +15864,71 @@ definition AuthIA :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>((r (read_reg APIAKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APIAKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APIAKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 31 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 31 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__291 = ((ProcState_EL w__2)) in + (let pat0 = p__291 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 31 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 31 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 31 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 31 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 31 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (Auth X Y APIAKey_EL1 False (vec_of_bits [B0] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))" + else (Auth X Y APIAKey_EL1 False (vec_of_bits [B0] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_autia_dp_1src : ii -> ii -> bool -> M unit*) @@ -15876,64 +16018,71 @@ definition AuthDB :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>((r (read_reg APDBKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APDBKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APDBKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 13 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 13 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__290 = ((ProcState_EL w__2)) in + (let pat0 = p__290 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 13 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 13 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 13 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 13 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 13 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (Auth X Y APDBKey_EL1 True (vec_of_bits [B1] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))" + else (Auth X Y APDBKey_EL1 True (vec_of_bits [B1] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_autdb_dp_1src : ii -> ii -> bool -> M unit*) @@ -15960,64 +16109,71 @@ definition AuthDA :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>((r (read_reg APDAKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APDAKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APDAKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 27 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 27 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__289 = ((ProcState_EL w__2)) in + (let pat0 = p__289 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 27 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 27 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 27 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 27 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 27 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (Auth X Y APDAKey_EL1 True (vec_of_bits [B0] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))" + else (Auth X Y APDAKey_EL1 True (vec_of_bits [B0] :: 1 Word.word) :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_autda_dp_1src : ii -> ii -> bool -> M unit*) @@ -16044,64 +16200,71 @@ definition AddPACIB :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>( (read_reg APIBKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APIBKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APIBKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 30 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 30 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__288 = ((ProcState_EL w__2)) in + (let pat0 = p__288 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 30 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 30 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 30 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 30 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 30 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (AddPAC X Y APIBKey_EL1 False :: ( 64 Word.word) M)))))))))))" + else (AddPAC X Y APIBKey_EL1 False :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_pacib_dp_1src : ii -> ii -> bool -> M unit*) @@ -16171,64 +16334,71 @@ definition AddPACIA :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>( (read_reg APIAKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APIAKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APIAKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 31 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 31 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__287 = ((ProcState_EL w__2)) in + (let pat0 = p__287 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 31 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 31 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 31 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 31 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 31 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (AddPAC X Y APIAKey_EL1 False :: ( 64 Word.word) M)))))))))))" + else (AddPAC X Y APIAKey_EL1 False :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_pacia_dp_1src : ii -> ii -> bool -> M unit*) @@ -16297,52 +16467,61 @@ definition AddPACGA :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>( (read_reg APGAKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APGAKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APGAKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__6 :: bool) . return ((\<not> w__6))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__8 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__8 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__9 :: bool) . - (let TrapEL2 = w__9 in - (read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__10 :: 32 bits) . - (let (TrapEL3 :: bool) = - ((vec_of_bits [access_vec_dec w__10 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)) in - return (TrapEL2, TrapEL3)))))) - ) \<bind> (\<lambda> varstup . (let ((TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__286 = ((ProcState_EL w__2)) in + (let pat0 = p__286 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__6 :: bool) . return ((\<not> w__6))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__8 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__8 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__9 :: bool) . + (let TrapEL2 = w__9 in + (read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__10 :: 32 bits) . + (let (TrapEL3 :: bool) = + ((vec_of_bits [access_vec_dec w__10 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)) in + return (TrapEL2, TrapEL3)))))) + else if (((pat0 = EL1))) then + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__11 :: bool) . return ((\<not> w__11))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__13 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let TrapEL2 = w__14 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__15 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__16 :: bool) . + (let (TrapEL3 :: bool) = w__16 in + return (TrapEL2, TrapEL3))))) + else if (((pat0 = EL2))) then + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__17 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__17 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__18 :: bool) . + (let (TrapEL3 :: bool) = w__18 in + return (TrapEL2, TrapEL3)))) + else + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (TrapEL2, TrapEL3)))) \<bind> (\<lambda> varstup . (let ((TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else - (ComputePAC X Y ((slice0 APGAKey_EL1 (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 APGAKey_EL1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + (ComputePAC X Y ((slice APGAKey_EL1 (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice APGAKey_EL1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__21 :: 64 Word.word) . - return ((concat_vec ((slice0 w__21 (( 32 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + return ((concat_vec ((slice w__21 (( 32 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) ((Zeros__0 ((make_the_value (( 32 :: int)::ii) :: 32 itself)) :: 32 Word.word)) - :: 64 Word.word))))))))))))" + :: 64 Word.word))))))))))))))" (*val aarch64_integer_pac_pacga_dp_2src : ii -> ii -> ii -> bool -> M unit*) @@ -16369,64 +16548,71 @@ definition AddPACDB :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>( (read_reg APDBKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APDBKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APDBKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 13 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 13 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__285 = ((ProcState_EL w__2)) in + (let pat0 = p__285 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 13 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 13 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 13 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 13 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 13 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (AddPAC X Y APDBKey_EL1 True :: ( 64 Word.word) M)))))))))))" + else (AddPAC X Y APDBKey_EL1 True :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_pacdb_dp_1src : ii -> ii -> bool -> M unit*) @@ -16453,64 +16639,71 @@ definition AddPACDA :: "(64)Word.word \<Rightarrow>(64)Word.word \<Rightarrow>( (read_reg APDAKeyHi_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 bits) . (read_reg APDAKeyLo_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__1 :: 64 bits) . (let (APDAKey_EL1 :: 128 bits) = - ((concat_vec ((slice0 w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) - ((slice0 w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((concat_vec ((slice w__0 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice w__1 (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) :: 128 Word.word)) in - read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . - (case (ProcState_EL w__2) of - EL01 => - or_boolM - (or_boolM (return ((\<not> ((HaveEL EL2))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__3 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word))))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__5 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (IsEL1Regime :: bool) . - ( - if IsEL1Regime then - (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__6 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__6 (( 27 :: int):: ii)] :: 1 Word.word)) - else - (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__7 :: 32 bits) . - return - (vec_of_bits [access_vec_dec w__7 (( 27 :: int):: ii)] :: 1 Word.word))) - \<bind> - (\<lambda> (w__8 :: 1 Word.word) . - (let Enable = w__8 in - and_boolM - (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) - (IsSecure () \<bind> - (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) - ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> - (\<lambda> (w__11 :: 64 bits) . - return - ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__12 :: bool) . - (let TrapEL2 = w__12 in - and_boolM (return ((HaveEL EL3))) - ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> - (\<lambda> (w__13 :: 32 bits) . - return - ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int):: ii)] :: 1 Word.word) - = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> - (\<lambda> (w__14 :: bool) . - (let (TrapEL3 :: bool) = w__14 in - return (Enable, TrapEL2, TrapEL3)))))))) - ) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: bool), (TrapEL3 :: bool)) = varstup in + read_reg PSTATE_ref \<bind> (\<lambda> (w__2 :: ProcState) . + (let p__284 = ((ProcState_EL w__2)) in + (let pat0 = p__284 in + (if (((pat0 = EL0))) then + or_boolM + (or_boolM (return ((\<not> ((HaveEL EL2))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__3 (( 27 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word))))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__5 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__5 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (IsEL1Regime :: bool) . + (if IsEL1Regime then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__6 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__6 (( 27 :: int)::ii)] :: 1 Word.word)) + else + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__7 :: 32 bits) . + return (vec_of_bits [access_vec_dec w__7 (( 27 :: int)::ii)] :: 1 Word.word))) \<bind> (\<lambda> (w__8 :: 1 Word.word) . + (let Enable = w__8 in + and_boolM + (and_boolM (return (((((HaveEL EL2)) \<and> IsEL1Regime)))) + (IsSecure () \<bind> (\<lambda> (w__9 :: bool) . return ((\<not> w__9))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__11 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__11 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__12 :: bool) . + (let TrapEL2 = w__12 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__13 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__13 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__14 :: bool) . + (let (TrapEL3 :: bool) = w__14 in + return (Enable, TrapEL2, TrapEL3)))))))) + else if (((pat0 = EL1))) then + (read_reg SCTLR_EL1_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__15 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__15 (( 27 :: int)::ii)] :: 1 Word.word)) in + and_boolM + (and_boolM (return ((HaveEL EL2))) + (IsSecure () \<bind> (\<lambda> (w__16 :: bool) . return ((\<not> w__16))))) + ((read_reg HCR_EL2_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__18 :: 64 bits) . + return ((((vec_of_bits [access_vec_dec w__18 (( 41 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__19 :: bool) . + (let TrapEL2 = w__19 in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__20 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__20 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__21 :: bool) . + (let (TrapEL3 :: bool) = w__21 in + return (Enable, TrapEL2, TrapEL3))))))) + else if (((pat0 = EL2))) then + (read_reg SCTLR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__22 :: 32 bits) . + (let Enable = ((vec_of_bits [access_vec_dec w__22 (( 27 :: int)::ii)] :: 1 Word.word)) in + (let TrapEL2 = False in + and_boolM (return ((HaveEL EL3))) + ((read_reg SCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__23 :: 32 bits) . + return ((((vec_of_bits [access_vec_dec w__23 (( 17 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B0] :: 1 Word.word)))))) \<bind> (\<lambda> (w__24 :: bool) . + (let (TrapEL3 :: bool) = w__24 in + return (Enable, TrapEL2, TrapEL3)))))) + else + (read_reg SCTLR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__25 :: 32 bits) . + (let (Enable :: 1 bits) = ((vec_of_bits [access_vec_dec w__25 (( 27 :: int)::ii)] :: 1 Word.word)) in + (let (TrapEL2 :: bool) = False in + (let (TrapEL3 :: bool) = False in + return (Enable, TrapEL2, TrapEL3)))))) \<bind> (\<lambda> varstup . (let ((Enable :: 1 bits), (TrapEL2 :: + bool), (TrapEL3 :: bool)) = varstup in if (((Enable = (vec_of_bits [B0] :: 1 Word.word)))) then return X else if TrapEL2 then TrapPACUse EL2 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) else if TrapEL3 then TrapPACUse EL3 \<then> (undefined_bitvector (( 64 :: int)::ii) :: ( 64 Word.word) M) - else (AddPAC X Y APDAKey_EL1 True :: ( 64 Word.word) M)))))))))))" + else (AddPAC X Y APDAKey_EL1 True :: ( 64 Word.word) M)))))))))))))" (*val aarch64_integer_pac_pacda_dp_1src : ii -> ii -> bool -> M unit*) @@ -16568,11 +16761,11 @@ definition AArch64_WFxTrap :: "(2)Word.word \<Rightarrow> bool \<Rightarrow>((r ExceptionSyndrome Exception_WFxTrap \<bind> (\<lambda> (exception :: ExceptionRecord) . (let (tmp_2720 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (ConditionSyndrome () :: ( 5 Word.word) M) \<bind> (\<lambda> (w__1 :: 5 Word.word) . - (let tmp_2720 = ((set_slice0 (( 25 :: int)::ii) (( 5 :: int)::ii) tmp_2720 (( 20 :: int)::ii) w__1 :: 25 Word.word)) in + (let tmp_2720 = ((set_slice (( 25 :: int)::ii) (( 5 :: int)::ii) tmp_2720 (( 20 :: int)::ii) w__1 :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2720 |))) in (let (tmp_2730 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (let tmp_2730 = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2730 (( 0 :: int)::ii) + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2730 (( 0 :: int)::ii) (if is_wfe then (vec_of_bits [B1] :: 1 Word.word) else (vec_of_bits [B0] :: 1 Word.word)) :: 25 Word.word)) in @@ -16785,25 +16978,25 @@ definition AArch64_SystemRegisterTrap :: "(2)Word.word \<Rightarrow>(2)Word.wor (let (vect_offset :: ii) = ((( 0 :: int)::ii)) in ExceptionSyndrome Exception_SystemRegisterTrap \<bind> (\<lambda> (exception :: ExceptionRecord) . (let (tmp_2800 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2800 = ((set_slice0 (( 25 :: int)::ii) (( 2 :: int)::ii) tmp_2800 (( 20 :: int)::ii) op0 :: 25 Word.word)) in + (let tmp_2800 = ((set_slice (( 25 :: int)::ii) (( 2 :: int)::ii) tmp_2800 (( 20 :: int)::ii) op0 :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2800 |))) in (let (tmp_2810 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2810 = ((set_slice0 (( 25 :: int)::ii) (( 3 :: int)::ii) tmp_2810 (( 17 :: int)::ii) op2 :: 25 Word.word)) in + (let tmp_2810 = ((set_slice (( 25 :: int)::ii) (( 3 :: int)::ii) tmp_2810 (( 17 :: int)::ii) op2 :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2810 |))) in (let (tmp_2820 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2820 = ((set_slice0 (( 25 :: int)::ii) (( 3 :: int)::ii) tmp_2820 (( 14 :: int)::ii) op1 :: 25 Word.word)) in + (let tmp_2820 = ((set_slice (( 25 :: int)::ii) (( 3 :: int)::ii) tmp_2820 (( 14 :: int)::ii) op1 :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2820 |))) in (let (tmp_2830 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2830 = ((set_slice0 (( 25 :: int)::ii) (( 4 :: int)::ii) tmp_2830 (( 10 :: int)::ii) crn :: 25 Word.word)) in + (let tmp_2830 = ((set_slice (( 25 :: int)::ii) (( 4 :: int)::ii) tmp_2830 (( 10 :: int)::ii) crn :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2830 |))) in (let (tmp_2840 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2840 = ((set_slice0 (( 25 :: int)::ii) (( 5 :: int)::ii) tmp_2840 (( 5 :: int)::ii) rt :: 25 Word.word)) in + (let tmp_2840 = ((set_slice (( 25 :: int)::ii) (( 5 :: int)::ii) tmp_2840 (( 5 :: int)::ii) rt :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2840 |))) in (let (tmp_2850 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2850 = ((set_slice0 (( 25 :: int)::ii) (( 4 :: int)::ii) tmp_2850 (( 1 :: int)::ii) crm :: 25 Word.word)) in + (let tmp_2850 = ((set_slice (( 25 :: int)::ii) (( 4 :: int)::ii) tmp_2850 (( 1 :: int)::ii) crm :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2850 |))) in (let (tmp_2860 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2860 = ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2860 (( 0 :: int)::ii) dir :: 25 Word.word)) in + (let tmp_2860 = ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2860 (( 0 :: int)::ii) dir :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2860 |))) in and_boolM (and_boolM (return ((((((target_el = EL1))) \<and> ((HaveEL EL2)))))) @@ -16836,7 +17029,7 @@ definition AArch64_SoftwareBreakpoint :: "(16)Word.word \<Rightarrow>((register (let (vect_offset :: ii) = ((( 0 :: int)::ii)) in ExceptionSyndrome Exception_SoftwareBreakpoint \<bind> (\<lambda> (exception :: ExceptionRecord) . (let (tmp_2710 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2710 = ((set_slice0 (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2710 (( 0 :: int)::ii) immediate :: 25 Word.word)) in + (let tmp_2710 = ((set_slice (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2710 (( 0 :: int)::ii) immediate :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2710 |))) in read_reg PSTATE_ref \<bind> (\<lambda> (w__9 :: ProcState) . if ((((Word.uint(ProcState_EL w__9))) > ((Word.uint EL1)))) then @@ -17010,33 +17203,33 @@ definition AArch64_CheckForERetTrap :: " bool \<Rightarrow> bool \<Rightarrow>( (let (tmp_2550 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (ZeroExtend__0 (vec_of_bits [B0] :: 1 Word.word) ((make_the_value (( 23 :: int)::ii) :: 23 itself)) :: ( 23 Word.word) M) \<bind> (\<lambda> (w__6 :: 23 Word.word) . - (let tmp_2550 = ((set_slice0 (( 25 :: int)::ii) (( 23 :: int)::ii) tmp_2550 (( 2 :: int)::ii) w__6 :: 25 Word.word)) in + (let tmp_2550 = ((set_slice (( 25 :: int)::ii) (( 23 :: int)::ii) tmp_2550 (( 2 :: int)::ii) w__6 :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2550 |))) in (let (exception :: ExceptionRecord) = (if ((\<not> eret_with_pac)) then (let (tmp_2560 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (let (tmp_2560 :: 25 bits) = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2560 (( 1 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 25 Word.word)) in + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2560 (( 1 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 25 Word.word)) in (let (exception :: ExceptionRecord) = ((exception (| ExceptionRecord_syndrome := tmp_2560 |))) in (let (tmp_2570 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (let (tmp_2570 :: 25 bits) = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2570 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 25 Word.word)) in + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2570 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 25 Word.word)) in (exception (| ExceptionRecord_syndrome := tmp_2570 |))))))) else (let (tmp_2580 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (let (tmp_2580 :: 25 bits) = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2580 (( 1 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 25 Word.word)) in + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2580 (( 1 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 25 Word.word)) in (let (exception :: ExceptionRecord) = ((exception (| ExceptionRecord_syndrome := tmp_2580 |))) in if pac_uses_key_a then (let (tmp_2590 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (let (tmp_2590 :: 25 bits) = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2590 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2590 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 25 Word.word)) in (exception (| ExceptionRecord_syndrome := tmp_2590 |)))) else (let (tmp_2600 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (let (tmp_2600 :: 25 bits) = - ((set_slice0 (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2600 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) + ((set_slice (( 25 :: int)::ii) (( 1 :: int)::ii) tmp_2600 (( 0 :: int)::ii) (vec_of_bits [B1] :: 1 Word.word) :: 25 Word.word)) in (exception (| ExceptionRecord_syndrome := tmp_2600 |)))))))) in AArch64_TakeException EL2 exception preferred_exception_return vect_offset)))))))))) @@ -17062,7 +17255,7 @@ definition AArch64_CallSupervisor :: "(16)Word.word \<Rightarrow>((register_val (let (vect_offset :: ii) = ((( 0 :: int)::ii)) in ExceptionSyndrome Exception_SupervisorCall \<bind> (\<lambda> (exception :: ExceptionRecord) . (let (tmp_2770 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2770 = ((set_slice0 (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2770 (( 0 :: int)::ii) immediate :: 25 Word.word)) in + (let tmp_2770 = ((set_slice (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2770 (( 0 :: int)::ii) immediate :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2770 |))) in read_reg PSTATE_ref \<bind> (\<lambda> (w__6 :: ProcState) . if ((((Word.uint(ProcState_EL w__6))) > ((Word.uint EL1)))) then @@ -17103,7 +17296,7 @@ definition AArch64_CallSecureMonitor :: "(16)Word.word \<Rightarrow>((register_ (let (vect_offset :: ii) = ((( 0 :: int)::ii)) in ExceptionSyndrome Exception_MonitorCall \<bind> (\<lambda> (exception :: ExceptionRecord) . (let (tmp_2930 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2930 = ((set_slice0 (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2930 (( 0 :: int)::ii) immediate :: 25 Word.word)) in + (let tmp_2930 = ((set_slice (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2930 (( 0 :: int)::ii) immediate :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2930 |))) in AArch64_TakeException EL3 exception preferred_exception_return vect_offset)))))))))" @@ -17121,7 +17314,7 @@ definition AArch64_CallHypervisor :: "(16)Word.word \<Rightarrow>((register_val (let (vect_offset :: ii) = ((( 0 :: int)::ii)) in ExceptionSyndrome Exception_HypervisorCall \<bind> (\<lambda> (exception :: ExceptionRecord) . (let (tmp_2890 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_2890 = ((set_slice0 (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2890 (( 0 :: int)::ii) immediate :: 25 Word.word)) in + (let tmp_2890 = ((set_slice (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_2890 (( 0 :: int)::ii) immediate :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2890 |))) in read_reg PSTATE_ref \<bind> (\<lambda> (w__1 :: ProcState) . if ((((ProcState_EL w__1) = EL3))) then @@ -17214,7 +17407,7 @@ definition AArch32_EnterMode :: "(5)Word.word \<Rightarrow>(32)Word.word \<Righ (read_reg SCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__4 :: 32 Word.word) . write_reg SCR_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__4 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word))) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__4 (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word))) else return () ) \<then> AArch32_WriteMode target_mode) \<then> aset_SPSR spsr) \<then> @@ -17270,7 +17463,7 @@ definition AArch32_EnterMode :: "(5)Word.word \<Rightarrow>(32)Word.word \<Righ else return () ) \<then> (ExcVectorBase () :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__21 :: 32 Word.word) . BranchTo - ((concat_vec ((slice0 w__21 (( 5 :: int)::ii) (( 27 :: int)::ii) :: 27 Word.word)) + ((concat_vec ((slice w__21 (( 5 :: int)::ii) (( 27 :: int)::ii) :: 27 Word.word)) ((GetSlice_int ((make_the_value (( 5 :: int)::ii) :: 5 itself)) vect_offset (( 0 :: int)::ii) :: 5 Word.word)) :: 32 Word.word)) BranchType_UNKNOWN \<then> EndOfInstruction () ))))))))))))))" @@ -17297,7 +17490,7 @@ definition AArch64_AdvSIMDFPAccessTrap :: "(2)Word.word \<Rightarrow>((register (let exception = w__4 in (let (tmp_2610 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in (ConditionSyndrome () :: ( 5 Word.word) M) \<bind> (\<lambda> (w__5 :: 5 Word.word) . - (let tmp_2610 = ((set_slice0 (( 25 :: int)::ii) (( 5 :: int)::ii) tmp_2610 (( 20 :: int)::ii) w__5 :: 25 Word.word)) in + (let tmp_2610 = ((set_slice (( 25 :: int)::ii) (( 5 :: int)::ii) tmp_2610 (( 20 :: int)::ii) w__5 :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_2610 |))) in AArch64_TakeException target_el exception preferred_exception_return vect_offset)))))))))))" @@ -17315,8 +17508,8 @@ definition AArch64_CheckFPAdvSIMDTrap :: " unit \<Rightarrow>((register_value), return ((((vec_of_bits [access_vec_dec w__2 (( 34 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))))) \<bind> (\<lambda> (w__3 :: bool) . if w__3 then (read_reg CPTR_EL2_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__4 :: 32 bits) . - (let p__607 = ((slice0 w__4 (( 20 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in - (let v__94 = p__607 in + (let p__283 = ((slice w__4 (( 20 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let v__94 = p__283 in (if (((((subrange_vec_dec v__94 (( 0 :: int)::ii) (( 0 :: int)::ii) :: 1 Word.word)) = (vec_of_bits [B0] :: 1 Word.word)))) then and_boolM (read_reg PSTATE_ref \<bind> (\<lambda> (w__5 :: ProcState) . @@ -17359,8 +17552,8 @@ definition AArch64_CheckFPAdvSIMDEnabled :: " unit \<Rightarrow>((register_valu bool) . (if w__2 then (aget_CPACR () :: ( 32 Word.word) M) \<bind> (\<lambda> (w__3 :: 32 Word.word) . - (let p__606 = ((slice0 w__3 (( 20 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in - (let v__96 = p__606 in + (let p__282 = ((slice w__3 (( 20 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let v__96 = p__282 in (if (((((subrange_vec_dec v__96 (( 0 :: int)::ii) (( 0 :: int)::ii) :: 1 Word.word)) = (vec_of_bits [B0] :: 1 Word.word)))) then return True else if (((v__96 = (vec_of_bits [B0,B1] :: 2 Word.word)))) then @@ -17480,7 +17673,7 @@ definition aarch64_float_convert_int :: " int \<Rightarrow>('fltsize::len)itsel | FPConvOp_MOV_ItoF => (aget_X intsize n :: (( 'intsize::len)Word.word) M) \<bind> (\<lambda> (w__8 :: 'intsize bits) . (let intval = w__8 in - (let fltval = ((slice0 intval (( 0 :: int)::ii) fltsize :: ( 'fltsize::len)Word.word)) in + (let fltval = ((slice intval (( 0 :: int)::ii) fltsize :: ( 'fltsize::len)Word.word)) in aset_Vpart d part fltval))) | FPConvOp_CVT_FtoI_JS => (aget_V fltsize n :: (( 'fltsize::len)Word.word) M) \<bind> (\<lambda> (w__9 :: 'fltsize bits) . @@ -17488,7 +17681,7 @@ definition aarch64_float_convert_int :: " int \<Rightarrow>('fltsize::len)itsel (read_reg FPCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__10 :: 32 Word.word) . (FPToFixedJS intsize fltval w__10 True :: (( 'intsize::len)Word.word) M) \<bind> (\<lambda> (w__11 :: 'intsize bits) . (let intval = w__11 in - (ZeroExtend__0 ((slice0 intval (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + (ZeroExtend__0 ((slice intval (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) ((make_the_value (( 64 :: int)::ii) :: 64 itself)) :: ( 64 Word.word) M) \<bind> (\<lambda> (w__12 :: 64 Word.word) . aset_X d w__12)))))) @@ -18441,7 +18634,7 @@ definition AArch64_CheckWatchpoint :: "(64)Word.word \<Rightarrow> AccType \<Ri ((let (val_match :: bool) = False in AArch64_AccessIsPrivileged acctype \<bind> (\<lambda> (ispriv :: bool) . (read_reg ID_AA64DFR0_EL1_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__2 :: 64 bits) . - (foreachM (index_list (( 0 :: int)::ii) ((Word.uint ((slice0 w__2 (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))) (( 1 :: int)::ii)) val_match + (foreachM (index_list (( 0 :: int)::ii) ((Word.uint ((slice w__2 (( 20 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)))) (( 1 :: int)::ii)) val_match (\<lambda> i val_match . or_boolM (return val_match) ((AArch64_WatchpointMatch i vaddress size1 ispriv iswrite)))) \<bind> (\<lambda> (val_match :: bool) . @@ -18509,7 +18702,7 @@ definition AArch64_CheckPermission :: " Permissions \<Rightarrow>(64)Word.word (let user_r = ((vec_of_bits [access_vec_dec(Permissions_ap perms) (( 1 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)) in (let user_w = - (((slice0(Permissions_ap perms) (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in + (((slice(Permissions_ap perms) (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B1] :: 2 Word.word)) in AArch64_AccessIsPrivileged acctype \<bind> (\<lambda> (w__8 :: bool) . (let ispriv = w__8 in (if ((HavePANExt () )) then @@ -18774,7 +18967,7 @@ definition aset_Mem :: "(64)Word.word \<Rightarrow> int \<Rightarrow> AccType \ if ((\<not> atomic)) then ((assert_exp ((size1 > (( 1 :: int)::ii))) (''(size > 1)'') \<then> AArch64_aset_MemSingle address (( 1 :: int)::ii) acctype aligned - ((slice0 value_name (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word))) \<then> + ((slice value_name (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word))) \<then> (if ((\<not> aligned)) then (let c = (ConstrainUnpredictable Unpredictable_DEVPAGE2) in assert_exp ((((((c = Constraint_FAULT))) \<or> (((c = Constraint_NONE)))))) (''((c == Constraint_FAULT) || (c == Constraint_NONE))'') \<then> @@ -18784,12 +18977,12 @@ definition aset_Mem :: "(64)Word.word \<Rightarrow> int \<Rightarrow> AccType \ (foreachM (index_list (( 1 :: int)::ii) ((size1 - (( 1 :: int)::ii))) (( 1 :: int)::ii)) () (\<lambda> i unit_var . AArch64_aset_MemSingle ((add_vec_int address i :: 64 Word.word)) (( 1 :: int)::ii) acctype aligned - ((slice0 value_name (((( 8 :: int)::ii) * i)) (( 8 :: int)::ii) :: 8 Word.word))))) + ((slice value_name (((( 8 :: int)::ii) * i)) (( 8 :: int)::ii) :: 8 Word.word))))) else if ((((((size1 = (( 16 :: int)::ii)))) \<and> ((((((acctype = AccType_VEC))) \<or> (((acctype = AccType_VECSTREAM))))))))) then AArch64_aset_MemSingle address (( 8 :: int)::ii) acctype aligned - ((slice0 value_name (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) \<then> + ((slice value_name (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) \<then> AArch64_aset_MemSingle ((add_vec_int address (( 8 :: int)::ii) :: 64 Word.word)) (( 8 :: int)::ii) acctype aligned - ((slice0 value_name (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + ((slice value_name (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) else AArch64_aset_MemSingle address size1 acctype aligned value_name))))))))))" @@ -18831,7 +19024,7 @@ definition aget_Mem :: "(64)Word.word \<Rightarrow> int \<Rightarrow> AccType \ (AArch64_aget_MemSingle address (( 1 :: int)::ii) acctype aligned :: ( 8 Word.word) M)) \<bind> (\<lambda> (w__0 :: 8 Word.word) . (let value_name = - ((set_slice0 (((( 8 :: int)::ii) * size1)) (( 8 :: int)::ii) value_name (( 0 :: int)::ii) w__0 + ((set_slice (((( 8 :: int)::ii) * size1)) (( 8 :: int)::ii) value_name (( 0 :: int)::ii) w__0 :: ( 'p8_times_size_::len)Word.word)) in (if ((\<not> aligned)) then (let c = (ConstrainUnpredictable Unpredictable_DEVPAGE2) in @@ -18844,19 +19037,19 @@ definition aget_Mem :: "(64)Word.word \<Rightarrow> int \<Rightarrow> AccType \ (AArch64_aget_MemSingle ((add_vec_int address i :: 64 Word.word)) (( 1 :: int)::ii) acctype aligned :: ( 8 Word.word) M) \<bind> (\<lambda> (w__1 :: 8 Word.word) . (let value_name = - ((set_slice0 (((( 8 :: int)::ii) * size1)) (( 8 :: int)::ii) value_name (((( 8 :: int)::ii) * i)) w__1 + ((set_slice (((( 8 :: int)::ii) * size1)) (( 8 :: int)::ii) value_name (((( 8 :: int)::ii) * i)) w__1 :: ( 'p8_times_size_::len)Word.word)) in return value_name))))))) else if ((((((size1 = (( 16 :: int)::ii)))) \<and> ((((((acctype = AccType_VEC))) \<or> (((acctype = AccType_VECSTREAM))))))))) then (AArch64_aget_MemSingle address (( 8 :: int)::ii) acctype aligned :: ( 64 Word.word) M) \<bind> (\<lambda> (w__2 :: 64 Word.word) . (let value_name = - ((set_slice0 (((( 8 :: int)::ii) * size1)) (( 64 :: int)::ii) value_name (( 0 :: int)::ii) w__2 + ((set_slice (((( 8 :: int)::ii) * (( 16 :: int)::ii))) (( 64 :: int)::ii) value_name (( 0 :: int)::ii) w__2 :: ( 'p8_times_size_::len)Word.word)) in (AArch64_aget_MemSingle ((add_vec_int address (( 8 :: int)::ii) :: 64 Word.word)) (( 8 :: int)::ii) acctype aligned :: ( 64 Word.word) M) \<bind> (\<lambda> (w__3 :: 64 Word.word) . (let value_name = - ((set_slice0 (((( 8 :: int)::ii) * size1)) (( 64 :: int)::ii) value_name (( 64 :: int)::ii) w__3 + ((set_slice (((( 8 :: int)::ii) * (( 16 :: int)::ii))) (( 64 :: int)::ii) value_name (( 64 :: int)::ii) w__3 :: ( 'p8_times_size_::len)Word.word)) in return value_name)))) else (AArch64_aget_MemSingle address size1 acctype aligned :: (( 'p8_times_size_::len)Word.word) M)) \<bind> (\<lambda> value_name . @@ -18885,8 +19078,8 @@ definition aarch64_memory_vector_single_nowb :: "('datasize::len)itself \<Right else (aget_X (( 64 :: int)::ii) n :: ( 64 Word.word) M))) \<bind> (\<lambda> (address :: 64 bits) . (let offs = ((Zeros__1 (( 64 :: int)::ii) () :: 64 Word.word)) in (if replicate1 then - (foreachM (index_list (( 0 :: int)::ii) ((selem - (( 1 :: int)::ii))) (( 1 :: int)::ii)) offs - (\<lambda> s offs . + (foreachM (index_list (( 0 :: int)::ii) ((selem - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (element, offs, t) + (\<lambda> s varstup . (let (element, offs, t) = varstup in (aget_Mem ((add_vec address offs :: 64 Word.word)) ebytes AccType_VEC :: (( 'esize::len)Word.word) M) \<bind> (\<lambda> (w__2 :: 'esize bits) . (let element = w__2 in @@ -18895,10 +19088,12 @@ definition aarch64_memory_vector_single_nowb :: "('datasize::len)itself \<Right aset_V t ((replicate_bits element v :: ( 'datasize::len)Word.word))) \<then> ((let (offs :: 64 bits) = ((add_vec_int offs ebytes :: 64 Word.word)) in (let (t :: ii) = (((((ex_int t)) + (( 1 :: int)::ii))) mod (( 32 :: int)::ii)) in - return offs)))))))) + return (element, offs, t)))))))))) \<bind> (\<lambda> varstup . (let ((element :: 'esize bits), (offs :: 64 + bits), (t :: ii)) = varstup in + return offs)) else - (foreachM (index_list (( 0 :: int)::ii) ((selem - (( 1 :: int)::ii))) (( 1 :: int)::ii)) offs - (\<lambda> s offs . + (foreachM (index_list (( 0 :: int)::ii) ((selem - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (offs, rval, t) + (\<lambda> s varstup . (let (offs, rval, t) = varstup in (aget_V (( 128 :: int)::ii) t :: ( 128 Word.word) M) \<bind> (\<lambda> (w__3 :: 128 bits) . (let rval = w__3 in (if (((memop = MemOp_LOAD))) then @@ -18907,13 +19102,16 @@ definition aarch64_memory_vector_single_nowb :: "('datasize::len)itself \<Right (aset_Elem__0 rval index1 ((make_the_value esize :: ( 'esize::len)itself)) w__4 :: ( 128 Word.word) M) \<bind> (\<lambda> (w__5 :: 128 bits) . (let rval = w__5 in - aset_V t rval))) + aset_V t rval \<then> return rval))) else (aget_Elem__0 rval index1 ((make_the_value esize :: ( 'esize::len)itself)) :: (( 'esize::len)Word.word) M) \<bind> (\<lambda> w__6 . - aset_Mem ((add_vec address offs :: 64 Word.word)) ebytes AccType_VEC w__6)) \<then> - ((let (offs :: 64 bits) = ((add_vec_int offs ebytes :: 64 Word.word)) in + aset_Mem ((add_vec address offs :: 64 Word.word)) ebytes AccType_VEC w__6 \<then> return rval)) \<bind> (\<lambda> (rval :: 128 + bits) . + (let (offs :: 64 bits) = ((add_vec_int offs ebytes :: 64 Word.word)) in (let (t :: ii) = (((((ex_int t)) + (( 1 :: int)::ii))) mod (( 32 :: int)::ii)) in - return offs)))))))) \<bind> (\<lambda> (offs :: 64 bits) . + return (offs, rval, t))))))))) \<bind> (\<lambda> varstup . (let ((offs :: 64 bits), (rval :: 128 bits), (t :: + ii)) = varstup in + return offs))) \<bind> (\<lambda> (offs :: 64 bits) . if wback then (if (((m \<noteq> (( 31 :: int)::ii)))) then (aget_X (( 64 :: int)::ii) m :: ( 64 Word.word) M) else return offs) \<bind> (\<lambda> (offs :: 64 bits) . @@ -18942,13 +19140,13 @@ definition aarch64_memory_vector_multiple_nowb :: "('datasize::len)itself \<Rig (if (((n = (( 31 :: int)::ii)))) then CheckSPAlignment () \<then> (aget_SP (( 64 :: int)::ii) () :: ( 64 Word.word) M) else (aget_X (( 64 :: int)::ii) n :: ( 64 Word.word) M))) \<bind> (\<lambda> (address :: 64 bits) . (let offs = ((Zeros__1 (( 64 :: int)::ii) () :: 64 Word.word)) in - (foreachM (index_list (( 0 :: int)::ii) ((rpt - (( 1 :: int)::ii))) (( 1 :: int)::ii)) offs - (\<lambda> r offs . - (foreachM (index_list (( 0 :: int)::ii) ((elements - (( 1 :: int)::ii))) (( 1 :: int)::ii)) offs - (\<lambda> e offs . + (foreachM (index_list (( 0 :: int)::ii) ((rpt - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (offs, rval, tt) + (\<lambda> r varstup . (let (offs, rval, tt) = varstup in + (foreachM (index_list (( 0 :: int)::ii) ((elements - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (offs, rval, tt) + (\<lambda> e varstup . (let (offs, rval, tt) = varstup in (let tt = (((t + r)) mod (( 32 :: int)::ii)) in - (foreachM (index_list (( 0 :: int)::ii) ((selem - (( 1 :: int)::ii))) (( 1 :: int)::ii)) offs - (\<lambda> s offs . + (foreachM (index_list (( 0 :: int)::ii) ((selem - (( 1 :: int)::ii))) (( 1 :: int)::ii)) (offs, rval, tt) + (\<lambda> s varstup . (let (offs, rval, tt) = varstup in (aget_V datasize tt :: (( 'datasize::len)Word.word) M) \<bind> (\<lambda> (w__2 :: 'datasize bits) . (let rval = w__2 in (if (((memop = MemOp_LOAD))) then @@ -18957,19 +19155,21 @@ definition aarch64_memory_vector_multiple_nowb :: "('datasize::len)itself \<Rig (aset_Elem__0 rval e ((make_the_value esize :: ( 'esize::len)itself)) w__3 :: (( 'datasize::len)Word.word) M) \<bind> (\<lambda> (w__4 :: 'datasize bits) . (let rval = w__4 in - aset_V tt rval))) + aset_V tt rval \<then> return rval))) else (aget_Elem__0 rval e ((make_the_value esize :: ( 'esize::len)itself)) :: (( 'esize::len)Word.word) M) \<bind> (\<lambda> w__5 . - aset_Mem ((add_vec address offs :: 64 Word.word)) ebytes AccType_VEC w__5)) \<then> - ((let (offs :: 64 bits) = ((add_vec_int offs ebytes :: 64 Word.word)) in + aset_Mem ((add_vec address offs :: 64 Word.word)) ebytes AccType_VEC w__5 \<then> + return rval)) \<bind> (\<lambda> (rval :: 'datasize bits) . + (let (offs :: 64 bits) = ((add_vec_int offs ebytes :: 64 Word.word)) in (let (tt :: ii) = (((((ex_int tt)) + (( 1 :: int)::ii))) mod (( 32 :: int)::ii)) in - return offs)))))))))))) \<bind> (\<lambda> (offs :: 64 bits) . + return (offs, rval, tt)))))))))))))))) \<bind> (\<lambda> varstup . (let ((offs :: 64 bits), (rval :: 'datasize + bits), (tt :: ii)) = varstup in if wback then (if (((m \<noteq> (( 31 :: int)::ii)))) then (aget_X (( 64 :: int)::ii) m :: ( 64 Word.word) M) else return offs) \<bind> (\<lambda> (offs :: 64 bits) . if (((n = (( 31 :: int)::ii)))) then aset_SP ((add_vec address offs :: 64 Word.word)) else aset_X n ((add_vec address offs :: 64 Word.word))) - else return () ))))))))))))))" + else return () )))))))))))))))" (*val aarch64_memory_single_simdfp_register : AccType -> ii -> ExtendType -> ii -> MemOp -> ii -> bool -> ii -> ii -> bool -> M unit*) @@ -20339,20 +20539,20 @@ definition aarch64_memory_atomicops_cas_pair :: " int \<Rightarrow> AccType \<R else return () ) \<then> BigEndian () ) \<bind> (\<lambda> (w__5 :: bool) . if w__5 then - (ZeroExtend__0 ((slice0 data (( 8 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) + (ZeroExtend__0 ((slice data (( 8 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__6 :: ( 'regsize::len)Word.word) . (aset_X s w__6 \<then> - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__7 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__7)) else - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__8 :: ( 'regsize::len)Word.word) . (aset_X s w__8 \<then> - (ZeroExtend__0 ((slice0 data (( 8 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) + (ZeroExtend__0 ((slice data (( 8 :: int)::ii) (( 8 :: int)::ii) :: 8 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__9 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__9))))))))))))))))))))) @@ -20388,20 +20588,20 @@ definition aarch64_memory_atomicops_cas_pair :: " int \<Rightarrow> AccType \<R else return () ) \<then> BigEndian () ) \<bind> (\<lambda> (w__15 :: bool) . if w__15 then - (ZeroExtend__0 ((slice0 data (( 16 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) + (ZeroExtend__0 ((slice data (( 16 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__16 :: ( 'regsize::len)Word.word) . (aset_X s w__16 \<then> - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__17 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__17)) else - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__18 :: ( 'regsize::len)Word.word) . (aset_X s w__18 \<then> - (ZeroExtend__0 ((slice0 data (( 16 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) + (ZeroExtend__0 ((slice data (( 16 :: int)::ii) (( 16 :: int)::ii) :: 16 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__19 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__19))))))))))))))))))))) @@ -20437,20 +20637,20 @@ definition aarch64_memory_atomicops_cas_pair :: " int \<Rightarrow> AccType \<R else return () ) \<then> BigEndian () ) \<bind> (\<lambda> (w__25 :: bool) . if w__25 then - (ZeroExtend__0 ((slice0 data (( 32 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + (ZeroExtend__0 ((slice data (( 32 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__26 :: ( 'regsize::len)Word.word) . (aset_X s w__26 \<then> - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__27 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__27)) else - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__28 :: ( 'regsize::len)Word.word) . (aset_X s w__28 \<then> - (ZeroExtend__0 ((slice0 data (( 32 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + (ZeroExtend__0 ((slice data (( 32 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__29 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__29))))))))))))))))))))) @@ -20486,20 +20686,20 @@ definition aarch64_memory_atomicops_cas_pair :: " int \<Rightarrow> AccType \<R else return () ) \<then> BigEndian () ) \<bind> (\<lambda> (w__35 :: bool) . if w__35 then - (ZeroExtend__0 ((slice0 data (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + (ZeroExtend__0 ((slice data (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__36 :: ( 'regsize::len)Word.word) . (aset_X s w__36 \<then> - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__37 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__37)) else - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__38 :: ( 'regsize::len)Word.word) . (aset_X s w__38 \<then> - (ZeroExtend__0 ((slice0 data (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) + (ZeroExtend__0 ((slice data (( 64 :: int)::ii) (( 64 :: int)::ii) :: 64 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__39 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__39))))))))))))))))))))) @@ -20535,20 +20735,20 @@ definition aarch64_memory_atomicops_cas_pair :: " int \<Rightarrow> AccType \<R else return () ) \<then> BigEndian () ) \<bind> (\<lambda> (w__45 :: bool) . if w__45 then - (ZeroExtend__0 ((slice0 data (( 128 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) + (ZeroExtend__0 ((slice data (( 128 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__46 :: ( 'regsize::len)Word.word) . (aset_X s w__46 \<then> - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__47 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__47)) else - (ZeroExtend__0 ((slice0 data (( 0 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) + (ZeroExtend__0 ((slice data (( 0 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M) \<bind> (\<lambda> (w__48 :: ( 'regsize::len)Word.word) . (aset_X s w__48 \<then> - (ZeroExtend__0 ((slice0 data (( 128 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) + (ZeroExtend__0 ((slice data (( 128 :: int)::ii) (( 128 :: int)::ii) :: 128 Word.word)) ((make_the_value regsize :: ( 'regsize::len)itself)) :: (( 'regsize::len)Word.word) M)) \<bind> (\<lambda> (w__49 :: ( 'regsize::len)Word.word) . aset_X ((s + (( 1 :: int)::ii))) w__49))))))))))))))))))))) @@ -20645,10 +20845,10 @@ definition AArch32_GenerateDebugExceptionsFrom :: "(2)Word.word \<Rightarrow> b ELUsingAArch32 EL3 \<bind> (\<lambda> (w__9 :: bool) . (if w__9 then (read_reg SDCR_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__10 :: 32 bits) . - return ((slice0 w__10 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) + return ((slice w__10 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) else (read_reg MDCR_EL3_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__11 :: 32 bits) . - return ((slice0 w__11 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)))) \<bind> (\<lambda> (w__12 :: 2 Word.word) . + return ((slice w__11 (( 14 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)))) \<bind> (\<lambda> (w__12 :: 2 Word.word) . (let spd = w__12 in (if ((((vec_of_bits [access_vec_dec spd (( 1 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then (let (enabled :: bool) = @@ -20744,12 +20944,12 @@ definition SetPSTATEFromPSR :: "(32)Word.word \<Rightarrow>((register_value),(u PSTATE_ref (w__4 (| ProcState_IL := ((vec_of_bits [access_vec_dec spsr (( 20 :: int)::ii)] :: 1 Word.word))|)) \<then> (if ((((vec_of_bits [access_vec_dec spsr (( 4 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then - AArch32_WriteMode ((slice0 spsr (( 0 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) + AArch32_WriteMode ((slice spsr (( 0 :: int)::ii) (( 5 :: int)::ii) :: 5 Word.word)) else read_reg PSTATE_ref \<bind> (\<lambda> (w__5 :: ProcState) . (write_reg PSTATE_ref (w__5 (| ProcState_nRW := ((vec_of_bits [B0] :: 1 Word.word))|)) \<then> read_reg PSTATE_ref) \<bind> (\<lambda> (w__6 :: ProcState) . - (write_reg PSTATE_ref (w__6 (| ProcState_EL := ((slice0 spsr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|)) \<then> + (write_reg PSTATE_ref (w__6 (| ProcState_EL := ((slice spsr (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))|)) \<then> read_reg PSTATE_ref) \<bind> (\<lambda> (w__7 :: ProcState) . write_reg PSTATE_ref @@ -20763,11 +20963,11 @@ definition SetPSTATEFromPSR :: "(32)Word.word \<Rightarrow>((register_value),(u ConstrainUnpredictableBool Unpredictable_ILZEROT \<bind> (\<lambda> (w__11 :: bool) . (let (spsr :: 32 Word.word) = (if w__11 then - (set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) spsr (( 5 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word) + (set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) spsr (( 5 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word) else spsr) in return spsr)) else return spsr) \<bind> (\<lambda> (spsr :: 32 Word.word) . - (let split_vec = ((slice0 spsr (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in + (let split_vec = ((slice spsr (( 28 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in (let (tup__0, tup__1, tup__2, tup__3) = ((subrange_vec_dec split_vec (( 3 :: int)::ii) (( 3 :: int)::ii) :: 1 Word.word), (subrange_vec_dec split_vec (( 2 :: int)::ii) (( 2 :: int)::ii) :: 1 Word.word), @@ -20791,12 +20991,12 @@ definition SetPSTATEFromPSR :: "(32)Word.word \<Rightarrow>((register_value),(u (RestoredITBits spsr :: ( 8 Word.word) M) \<bind> (\<lambda> (w__19 :: 8 bits) . (write_reg PSTATE_ref (w__18 (| ProcState_IT := w__19 |)) \<then> read_reg PSTATE_ref) \<bind> (\<lambda> (w__20 :: ProcState) . - (write_reg PSTATE_ref (w__20 (| ProcState_GE := ((slice0 spsr (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word))|)) \<then> + (write_reg PSTATE_ref (w__20 (| ProcState_GE := ((slice spsr (( 16 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word))|)) \<then> read_reg PSTATE_ref) \<bind> (\<lambda> (w__21 :: ProcState) . write_reg PSTATE_ref (w__21 (| ProcState_E := ((vec_of_bits [access_vec_dec spsr (( 9 :: int)::ii)] :: 1 Word.word))|)) \<then> - ((let split_vec = ((slice0 spsr (( 6 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in + ((let split_vec = ((slice spsr (( 6 :: int)::ii) (( 3 :: int)::ii) :: 3 Word.word)) in (let (tup__0, tup__1, tup__2) = ((subrange_vec_dec split_vec (( 2 :: int)::ii) (( 2 :: int)::ii) :: 1 Word.word), (subrange_vec_dec split_vec (( 1 :: int)::ii) (( 1 :: int)::ii) :: 1 Word.word), @@ -20812,7 +21012,7 @@ definition SetPSTATEFromPSR :: "(32)Word.word \<Rightarrow>((register_value),(u PSTATE_ref (w__25 (| ProcState_T := ((vec_of_bits [access_vec_dec spsr (( 5 :: int)::ii)] :: 1 Word.word))|)))))))))))))) else - (let split_vec = ((slice0 spsr (( 6 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in + (let split_vec = ((slice spsr (( 6 :: int)::ii) (( 4 :: int)::ii) :: 4 Word.word)) in (let (tup__0, tup__1, tup__2, tup__3) = ((subrange_vec_dec split_vec (( 3 :: int)::ii) (( 3 :: int)::ii) :: 1 Word.word), (subrange_vec_dec split_vec (( 2 :: int)::ii) (( 2 :: int)::ii) :: 1 Word.word), @@ -20965,9 +21165,9 @@ definition AArch64_ExceptionReturn :: "(64)Word.word \<Rightarrow>(32)Word.word read_reg PSTATE_ref) \<bind> (\<lambda> (w__2 :: ProcState) . (if ((((ProcState_IL w__2) = (vec_of_bits [B1] :: 1 Word.word)))) then (undefined_bitvector (( 32 :: int)::ii) :: ( 32 Word.word) M) \<bind> (\<lambda> (w__3 :: 32 Word.word) . - (let new_pc = ((set_slice0 (( 64 :: int)::ii) (( 32 :: int)::ii) new_pc (( 32 :: int)::ii) w__3 :: 64 Word.word)) in + (let new_pc = ((set_slice (( 64 :: int)::ii) (( 32 :: int)::ii) new_pc (( 32 :: int)::ii) w__3 :: 64 Word.word)) in (undefined_bitvector (( 2 :: int)::ii) :: ( 2 Word.word) M) \<bind> (\<lambda> (w__4 :: 2 Word.word) . - (let (new_pc :: 64 Word.word) = ((set_slice0 (( 64 :: int)::ii) (( 2 :: int)::ii) new_pc (( 0 :: int)::ii) w__4 :: 64 Word.word)) in + (let (new_pc :: 64 Word.word) = ((set_slice (( 64 :: int)::ii) (( 2 :: int)::ii) new_pc (( 0 :: int)::ii) w__4 :: 64 Word.word)) in return new_pc)))) else UsingAArch32 () \<bind> (\<lambda> (w__5 :: bool) . @@ -20975,13 +21175,13 @@ definition AArch64_ExceptionReturn :: "(64)Word.word \<Rightarrow>(32)Word.word read_reg PSTATE_ref \<bind> (\<lambda> (w__6 :: ProcState) . (let (new_pc :: 64 Word.word) = (if ((((ProcState_T w__6) = (vec_of_bits [B0] :: 1 Word.word)))) then - (set_slice0 (( 64 :: int)::ii) (( 1 :: int)::ii) new_pc (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 64 Word.word) + (set_slice (( 64 :: int)::ii) (( 1 :: int)::ii) new_pc (( 0 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 64 Word.word) else - (set_slice0 (( 64 :: int)::ii) (( 2 :: int)::ii) new_pc (( 0 :: int)::ii) (vec_of_bits [B0,B0] :: 2 Word.word) :: 64 Word.word)) in + (set_slice (( 64 :: int)::ii) (( 2 :: int)::ii) new_pc (( 0 :: int)::ii) (vec_of_bits [B0,B0] :: 2 Word.word) :: 64 Word.word)) in return new_pc)) else (AArch64_BranchAddr new_pc :: ( 64 Word.word) M))) \<bind> (\<lambda> (new_pc :: 64 Word.word) . UsingAArch32 () \<bind> (\<lambda> (w__8 :: bool) . - if w__8 then BranchTo ((slice0 new_pc (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) BranchType_UNKNOWN + if w__8 then BranchTo ((slice new_pc (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) BranchType_UNKNOWN else BranchToAddr new_pc BranchType_ERET))))))))" @@ -21079,7 +21279,7 @@ definition AArch32_EnterHypMode :: " ExceptionRecord \<Rightarrow>(32)Word.word (w__19 (| ProcState_IT := ((vec_of_bits [B0,B0,B0,B0,B0,B0,B0,B0] :: 8 Word.word))|)) \<then> (read_reg HVBAR_ref :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__20 :: 32 bits) . BranchTo - ((concat_vec ((slice0 w__20 (( 5 :: int)::ii) (( 27 :: int)::ii) :: 27 Word.word)) + ((concat_vec ((slice w__20 (( 5 :: int)::ii) (( 27 :: int)::ii) :: 27 Word.word)) ((GetSlice_int ((make_the_value (( 5 :: int)::ii) :: 5 itself)) vect_offset (( 0 :: int)::ii) :: 5 Word.word)) :: 32 Word.word)) BranchType_UNKNOWN \<then> EndOfInstruction () )))))))))))))))" @@ -21124,7 +21324,7 @@ definition UnallocatedEncoding :: " unit \<Rightarrow>((register_value),(unit), (read_reg FPEXC_ref :: ( 32 Word.word) M) \<bind> (\<lambda> (w__3 :: 32 Word.word) . write_reg FPEXC_ref - ((set_slice0 (( 32 :: int)::ii) (( 1 :: int)::ii) w__3 (( 29 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word))) + ((set_slice (( 32 :: int)::ii) (( 1 :: int)::ii) w__3 (( 29 :: int)::ii) (vec_of_bits [B0] :: 1 Word.word) :: 32 Word.word))) else return () ) \<then> and_boolM ((UsingAArch32 () )) (AArch32_GeneralExceptionsToAArch64 () \<bind> (\<lambda> (w__5 :: bool) . return ((\<not> w__5))))) \<bind> (\<lambda> (w__6 :: @@ -23405,12 +23605,12 @@ definition aarch64_memory_exclusive_single :: " AccType \<Rightarrow>('datasize BigEndian () \<bind> (\<lambda> (w__56 :: bool) . if w__56 then aset_X t - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word)) \<then> - aset_X t2 ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word)) \<then> + aset_X t2 ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) else - aset_X t ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> + aset_X t ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> aset_X t2 - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word))))) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word))))) else ((if (((address \<noteq> ((Align__1 address dbytes :: 64 Word.word))))) then (let iswrite = False in @@ -23500,12 +23700,12 @@ definition aarch64_memory_exclusive_single :: " AccType \<Rightarrow>('datasize BigEndian () \<bind> (\<lambda> (w__73 :: bool) . if w__73 then aset_X t - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word)) \<then> - aset_X t2 ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word)) \<then> + aset_X t2 ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) else - aset_X t ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> + aset_X t ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> aset_X t2 - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word))))) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word))))) else ((if (((address \<noteq> ((Align__1 address dbytes :: 64 Word.word))))) then (let iswrite = False in @@ -23934,12 +24134,12 @@ definition aarch64_memory_exclusive_pair :: " AccType \<Rightarrow>('datasize:: BigEndian () \<bind> (\<lambda> (w__56 :: bool) . if w__56 then aset_X t - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word)) \<then> - aset_X t2 ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word)) \<then> + aset_X t2 ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) else - aset_X t ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> + aset_X t ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> aset_X t2 - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word))))) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 64 :: int)::ii))) :: 32 Word.word))))) else ((if (((address \<noteq> ((Align__1 address dbytes :: 64 Word.word))))) then (let iswrite = False in @@ -24029,12 +24229,12 @@ definition aarch64_memory_exclusive_pair :: " AccType \<Rightarrow>('datasize:: BigEndian () \<bind> (\<lambda> (w__73 :: bool) . if w__73 then aset_X t - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word)) \<then> - aset_X t2 ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word)) \<then> + aset_X t2 ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) else - aset_X t ((slice0 data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> + aset_X t ((slice data (( 0 :: int)::ii) (( 32 :: int)::ii) :: 32 Word.word)) \<then> aset_X t2 - ((slice0 data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word))))) + ((slice data (( 32 :: int)::ii) ((((- (( 32 :: int)::ii))) + (( 128 :: int)::ii))) :: 96 Word.word))))) else ((if (((address \<noteq> ((Align__1 address dbytes :: 64 Word.word))))) then (let iswrite = False in @@ -24227,13 +24427,13 @@ definition system_barriers_decode :: "(1)Word.word \<Rightarrow>(2)Word.word \< else if (((b__0 = (vec_of_bits [B0,B1] :: 2 Word.word)))) then return MemBarrierOp_DMB else if (((b__0 = (vec_of_bits [B1,B0] :: 2 Word.word)))) then return MemBarrierOp_ISB else UnallocatedEncoding () \<then> return op1) \<bind> (\<lambda> (op1 :: MemBarrierOp) . - (let b__3 = ((slice0 CRm (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let b__3 = ((slice CRm (( 2 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in (let (domain1 :: MBReqDomain) = (if (((b__3 = (vec_of_bits [B0,B0] :: 2 Word.word)))) then MBReqDomain_OuterShareable else if (((b__3 = (vec_of_bits [B0,B1] :: 2 Word.word)))) then MBReqDomain_Nonshareable else if (((b__3 = (vec_of_bits [B1,B0] :: 2 Word.word)))) then MBReqDomain_InnerShareable else MBReqDomain_FullSystem) in - (let b__7 = ((slice0 CRm (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in + (let b__7 = ((slice CRm (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) in (let ((domain1 :: MBReqDomain), (types1 :: MBReqTypes)) = (if (((b__7 = (vec_of_bits [B0,B1] :: 2 Word.word)))) then (let (types1 :: MBReqTypes) = MBReqTypes_Reads in @@ -27093,7 +27293,7 @@ definition memory_single_simdfp_register_aarch64_memory_single_simdfp_register__ (if ((((vec_of_bits [access_vec_dec opc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then MemOp_LOAD else MemOp_STORE) in - (let (datasize :: ii) = (shl_int0 (( 8 :: int)::ii) scale) in + (let (datasize :: ii) = (shl_int (( 8 :: int)::ii) scale) in aarch64_memory_single_simdfp_register acctype datasize extend_type m memop n postindex shift t wback))))))))))))))" @@ -27119,7 +27319,7 @@ definition memory_single_simdfp_immediate_unsigned_aarch64_memory_single_simdfp_ (if ((((vec_of_bits [access_vec_dec opc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then MemOp_LOAD else MemOp_STORE) in - (let (datasize :: ii) = (shl_int0 (( 8 :: int)::ii) scale) in + (let (datasize :: ii) = (shl_int (( 8 :: int)::ii) scale) in aarch64_memory_single_simdfp_immediate_signed_postidx acctype datasize memop n offset postindex t wback))))))))))))" @@ -27144,7 +27344,7 @@ definition memory_single_simdfp_immediate_signed_preidx_aarch64_memory_single_si (if ((((vec_of_bits [access_vec_dec opc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then MemOp_LOAD else MemOp_STORE) in - (let (datasize :: ii) = (shl_int0 (( 8 :: int)::ii) scale) in + (let (datasize :: ii) = (shl_int (( 8 :: int)::ii) scale) in aarch64_memory_single_simdfp_immediate_signed_postidx acctype datasize memop n offset postindex t wback)))))))))))" @@ -27169,7 +27369,7 @@ definition memory_single_simdfp_immediate_signed_postidx_aarch64_memory_single_s (if ((((vec_of_bits [access_vec_dec opc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then MemOp_LOAD else MemOp_STORE) in - (let (datasize :: ii) = (shl_int0 (( 8 :: int)::ii) scale) in + (let (datasize :: ii) = (shl_int (( 8 :: int)::ii) scale) in aarch64_memory_single_simdfp_immediate_signed_postidx acctype datasize memop n offset postindex t wback)))))))))))" @@ -27194,7 +27394,7 @@ definition memory_single_simdfp_immediate_signed_offset_normal_aarch64_memory_si (if ((((vec_of_bits [access_vec_dec opc (( 0 :: int)::ii)] :: 1 Word.word) = (vec_of_bits [B1] :: 1 Word.word)))) then MemOp_LOAD else MemOp_STORE) in - (let (datasize :: ii) = (shl_int0 (( 8 :: int)::ii) scale) in + (let (datasize :: ii) = (shl_int (( 8 :: int)::ii) scale) in aarch64_memory_single_simdfp_immediate_signed_offset_normal acctype datasize memop n offset postindex t wback)))))))))))" @@ -30464,7 +30664,7 @@ definition memory_atomicops_st_decode :: "(2)Word.word \<Rightarrow>(1)Word.wor else return () )) \<then> ((let (n :: ii) = (Word.uint Rn) in (let (s :: ii) = (Word.uint Rs) in - (let (datasize :: ii) = (shl_int0 (( 8 :: int)::ii) ((Word.uint size1))) in + (let (datasize :: ii) = (shl_int (( 8 :: int)::ii) ((Word.uint size1))) in (let (regsize :: ii) = (if (((((ex_int datasize)) = (( 64 :: int)::ii)))) then (( 64 :: int)::ii) else (( 32 :: int)::ii)) in (let (ldacctype :: AccType) = AccType_ATOMICRW in (let (stacctype :: AccType) = @@ -31134,13 +31334,13 @@ definition float_convert_int_decode :: "(1)Word.word \<Rightarrow>(1)Word.word (if (((b__0 = (vec_of_bits [B0,B0] :: 2 Word.word)))) then return (( 32 :: int)::ii) else if (((b__0 = (vec_of_bits [B0,B1] :: 2 Word.word)))) then return (( 64 :: int)::ii) else if (((b__0 = (vec_of_bits [B1,B0] :: 2 Word.word)))) then - (if (((((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) \<noteq> (vec_of_bits [B1,B1,B0,B1] :: 4 Word.word)))) then + (if (((((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) \<noteq> (vec_of_bits [B1,B1,B0,B1] :: 4 Word.word)))) then UnallocatedEncoding () else return () ) \<then> return (( 128 :: int)::ii) else if ((HaveFP16Ext () )) then return (( 16 :: int)::ii) else UnallocatedEncoding () \<then> return fltsize) \<bind> (\<lambda> (fltsize :: ii) . - (let v__98 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let v__98 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((((subrange_vec_dec v__98 (( 3 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) = (vec_of_bits [B0,B0] :: 2 Word.word)))) then (let (rounding :: FPRounding) = (FPDecodeRounding rmode) in (let (unsigned :: bool) = @@ -31403,7 +31603,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () ) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__2 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__2 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__2 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31436,7 +31636,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () ) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__6 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__6 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__6 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31469,7 +31669,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () )) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__10 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__10 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__10 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31502,7 +31702,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () ) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__14 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__14 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__14 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31535,7 +31735,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () ) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__18 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__18 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__18 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31568,7 +31768,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () ) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__22 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__22 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__22 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31601,7 +31801,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () )) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__26 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__26 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__26 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31634,7 +31834,7 @@ definition float_convert_fix_decode :: "(1)Word.word \<Rightarrow>(1)Word.word UnallocatedEncoding () else return () ) \<then> ((let (fracbits :: ii) = ((( 64 :: int)::ii) - ((Word.uint scale))) in - (let b__30 = ((concat_vec ((slice0 opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in + (let b__30 = ((concat_vec ((slice opcode (( 1 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word)) rmode :: 4 Word.word)) in (if (((b__30 = (vec_of_bits [B0,B0,B1,B1] :: 4 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_ZERO in (let (unsigned :: bool) = @@ -31742,7 +31942,7 @@ definition float_arithmetic_round_decode :: "(1)Word.word \<Rightarrow>(1)Word. undefined_FPRounding () \<bind> (\<lambda> (rounding :: FPRounding) . (let v__101 = rmode in (if (((((subrange_vec_dec v__101 (( 2 :: int)::ii) (( 2 :: int)::ii) :: 1 Word.word)) = (vec_of_bits [B0] :: 1 Word.word)))) then - (let (rounding :: FPRounding) = (FPDecodeRounding ((slice0 rmode (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in + (let (rounding :: FPRounding) = (FPDecodeRounding ((slice rmode (( 0 :: int)::ii) (( 2 :: int)::ii) :: 2 Word.word))) in return (exact, rounding)) else if (((v__101 = (vec_of_bits [B1,B0,B0] :: 3 Word.word)))) then (let (rounding :: FPRounding) = FPRounding_TIEAWAY in @@ -32144,7 +32344,7 @@ definition AArch64_CheckForSMCUndefOrTrap :: "(16)Word.word \<Rightarrow>((regi ExceptionSyndrome Exception_MonitorCall \<bind> (\<lambda> (w__15 :: ExceptionRecord) . (let exception = w__15 in (let (tmp_40 :: 25 bits) = ((ExceptionRecord_syndrome exception)) in - (let tmp_40 = ((set_slice0 (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_40 (( 0 :: int)::ii) imm :: 25 Word.word)) in + (let tmp_40 = ((set_slice (( 25 :: int)::ii) (( 16 :: int)::ii) tmp_40 (( 0 :: int)::ii) imm :: 25 Word.word)) in (let exception = ((exception (| ExceptionRecord_syndrome := tmp_40 |))) in AArch64_TakeException EL2 exception preferred_exception_return vect_offset))))))) else return () ))))))" @@ -33153,7 +33353,7 @@ definition DecodeBitMasks :: " int \<Rightarrow>(1)Word.word \<Rightarrow>(6)Wo ((assert_exp ((len \<ge> (( 0 :: int)::ii))) ('''') \<then> (if ((len < (( 1 :: int)::ii))) then ReservedValue () else return () )) \<then> - assert_exp ((M__tv \<ge> ((ex_int ((shl_int0 (( 1 :: int)::ii) len)))))) (''(M >= (1 << len))'')) \<then> + assert_exp ((M__tv \<ge> ((ex_int ((shl_int (( 1 :: int)::ii) len)))))) (''(M >= (1 << len))'')) \<then> ((let levels = ((zext_ones (( 6 :: int)::ii) len :: 6 Word.word)) in (if (((immediate \<and> (((((and_vec imms levels :: 6 Word.word)) = levels)))))) then ReservedValue () @@ -33401,7 +33601,7 @@ definition DecodeBitMasks :: " int \<Rightarrow>(1)Word.word \<Rightarrow>(6)Wo (if (((((GetSlice_int ((make_the_value (( 1 :: int)::ii) :: 1 itself)) diff (( 6 :: int)::ii) :: 1 Word.word)) \<noteq> (vec_of_bits [B0] :: 1 Word.word)))) then (and_vec wmask tmask :: 64 Word.word) else (or_vec wmask tmask :: 64 Word.word)) in - return ((slice0 wmask (( 0 :: int)::ii) M__tv :: ( 'M::len)Word.word), (slice0 tmask (( 0 :: int)::ii) M__tv :: ( 'M::len)Word.word))))))))))))))))))))))))))))))))))))" + return ((slice wmask (( 0 :: int)::ii) M__tv :: ( 'M::len)Word.word), (slice tmask (( 0 :: int)::ii) M__tv :: ( 'M::len)Word.word))))))))))))))))))))))))))))))))))))" (*val integer_logical_immediate_decode : mword ty1 -> mword ty2 -> mword ty1 -> mword ty6 -> mword ty6 -> mword ty5 -> mword ty5 -> M unit*) @@ -34546,56 +34746,6 @@ definition decode :: "(32)Word.word \<Rightarrow>((register_value),(unit),(exce integer_arithmetic_div_decode sf op1 S Rm opcode2 o1 Rn Rd)))))))))" -(*val fetch_and_execute : unit -> M unit*) - -definition fetch_and_execute :: " unit \<Rightarrow>((register_value),(unit),(exception))monad " where - " fetch_and_execute _ = ( - (whileM () - (\<lambda> unit_var . return True) - (\<lambda> unit_var . - (try_catch ((read_reg PC_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__0 :: 64 Word.word) . - (aget_Mem w__0 (( 4 :: int)::ii) AccType_IFETCH :: ( 32 Word.word) M) \<bind> (\<lambda> instr . - decode instr))) (\<lambda>x . - (case x of - Error_Undefined _ => exit0 () - | Error_See s => - if(s = (''HINT'')) then (return () ) else (exit0 () ) - | Error_Implementation_Defined _ => exit0 () - | Error_ReservedEncoding _ => exit0 () - | Error_ExceptionTaken _ => exit0 () - )) \<then> - read_reg BranchTaken_ref) \<bind> (\<lambda> (w__1 :: bool) . - if w__1 then write_reg BranchTaken_ref False - else - (read_reg PC_ref :: ( 64 Word.word) M) \<bind> (\<lambda> (w__2 :: 64 Word.word) . - write_reg PC_ref ((add_vec_int w__2 (( 4 :: int)::ii) :: 64 Word.word)))))))" - - -(*val main : unit -> M unit*) - -definition main :: " unit \<Rightarrow>((register_value),(unit),(exception))monad " where - " main _ = ( - (write_reg - PC_ref - ((GetSlice_int ((make_the_value (( 64 :: int)::ii) :: 64 itself)) ((elf_entry () )) (( 0 :: int)::ii) - :: 64 Word.word)) \<then> - (ZeroExtend__0 (vec_of_bits [B0,B0,B1,B1,B1,B1,B0,B0,B0,B0,B0,B0,B0,B0,B0,B0] :: 16 Word.word) - ((make_the_value (( 64 :: int)::ii) :: 64 itself)) - :: ( 64 Word.word) M)) \<bind> (\<lambda> (w__0 :: 64 bits) . - (write_reg SP_EL0_ref w__0 \<then> - read_reg PSTATE_ref) \<bind> (\<lambda> (w__1 :: ProcState) . - (write_reg PSTATE_ref (w__1 (| ProcState_D := ((vec_of_bits [B1] :: 1 Word.word))|)) \<then> - read_reg PSTATE_ref) \<bind> (\<lambda> (w__2 :: ProcState) . - (write_reg PSTATE_ref (w__2 (| ProcState_A := ((vec_of_bits [B1] :: 1 Word.word))|)) \<then> - read_reg PSTATE_ref) \<bind> (\<lambda> (w__3 :: ProcState) . - (write_reg PSTATE_ref (w__3 (| ProcState_I := ((vec_of_bits [B1] :: 1 Word.word))|)) \<then> - read_reg PSTATE_ref) \<bind> (\<lambda> (w__4 :: ProcState) . - (write_reg PSTATE_ref (w__4 (| ProcState_F := ((vec_of_bits [B1] :: 1 Word.word))|)) \<then> - (ZeroExtend__0 (vec_of_bits [B1,B0] :: 2 Word.word) ((make_the_value (( 32 :: int)::ii) :: 32 itself)) - :: ( 32 Word.word) M)) \<bind> (\<lambda> (w__5 :: 32 bits) . - (write_reg OSLSR_EL1_ref w__5 \<then> write_reg BranchTaken_ref False) \<then> fetch_and_execute () )))))))" - - (*val initialize_registers : unit -> M unit*) definition initialize_registers :: " unit \<Rightarrow>((register_value),(unit),(exception))monad " where |