3 files changed, 41 insertions, 9 deletions
diff --git a/riscv/main.sail b/riscv/main.sail
index 32f14177..dbf41f49 100644
--- a/riscv/main.sail
+++ b/riscv/main.sail
@@ -12,7 +12,9 @@ val main : unit -> unit effect {barr, eamem, escape, exmem, rmem, rreg, wmv, wre
 
 function main () = {
 
-  PC = __GetSlice_int(64, elf_entry(), 0);
+  // PC = __GetSlice_int(64, elf_entry(), 0);
+  PC = zero_extend(0x1000, 64);
+  print_bits("PC = ", PC);
   try {
     init_platform();
     init_sys();
diff --git a/riscv/reset_vec.S b/riscv/reset_vec.S
new file mode 100644
index 00000000..526bbc79
--- /dev/null
+++ b/riscv/reset_vec.S
@@ -0,0 +1,12 @@
+.global _start
+
+.text
+
+_start:
+	auipc	t0, 0x0
+	addi	a1, t0, 32
+	csrr	a0, mhartid
+	ld	t0, 24(t0)
+	jr	t0
+.short  0x0000
+.word	0x00000000, 0x80000000
diff --git a/riscv/riscv_platform.c b/riscv/riscv_platform.c
index d21824a3..6330ae4d 100644
--- a/riscv/riscv_platform.c
+++ b/riscv/riscv_platform.c
@@ -9,25 +9,41 @@ bool plat_enable_misaligned_access(unit u)
 { return false; }
 
 mach_bits plat_ram_base(unit u)
-{ return 0; }
+{
+  return UINT64_C(0x80000000);
+}
 
 mach_bits plat_ram_size(unit u)
-{ return 0; }
+{
+  return UINT64_C(0x80000000);
+}
 
 mach_bits plat_rom_base(unit u)
-{ return 0; }
+{
+  return UINT64_C(0x1000);
+}
 
 mach_bits plat_rom_size(unit u)
-{ return 0; }
+{
+  return UINT64_C(0x100);
+}
 
 mach_bits plat_clint_base(unit u)
-{ return 0; }
+{
+  return UINT64_C(0x2000000);
+}
 
 mach_bits plat_clint_size(unit u)
-{ return 0; }
+{
+  return UINT64_C(0xc0000);
+}
 
 bool within_phys_mem(mach_bits addr, sail_int len)
-{ return 0; }
+{
+  printf("within_phys_mem\n");
+  exit(EXIT_FAILURE);
+  return 0;
+}
 
 unit load_reservation(mach_bits addr)
 { return UNIT; }
@@ -45,7 +61,9 @@ void plat_insns_per_tick(sail_int *rop, unit u)
 { }
 
 mach_bits plat_htif_tohost(unit u)
-{ return 0; }
+{
+  return UINT64_C(0x2000000);
+}
 
 unit memea(mach_bits len, sail_int n)
 {