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-rw-r--r--riscv/riscv_sys.sail10
1 files changed, 7 insertions, 3 deletions
diff --git a/riscv/riscv_sys.sail b/riscv/riscv_sys.sail
index 1786766f..43deacb0 100644
--- a/riscv/riscv_sys.sail
+++ b/riscv/riscv_sys.sail
@@ -132,12 +132,16 @@ register mepc : xlenbits
register mtval : xlenbits
register mscratch : xlenbits
-/* other registers */
+/* informational registers */
+register mvendorid : xlenbits
+register mimpid : xlenbits
+register marchid : xlenbits
+/* TODO: this should be readonly, and always 0 for now */
+register mhartid : xlenbits
+/* physical memory protection configuration */
register pmpaddr0 : xlenbits
register pmpcfg0 : xlenbits
-/* TODO: this should be readonly, and always 0 for now */
-register mhartid : xlenbits
/* instruction control flow */