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-rw-r--r--riscv/riscv_insts_begin.sail19
1 files changed, 0 insertions, 19 deletions
diff --git a/riscv/riscv_insts_begin.sail b/riscv/riscv_insts_begin.sail
deleted file mode 100644
index 56fd8b43..00000000
--- a/riscv/riscv_insts_begin.sail
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Instruction definitions.
- *
- * This includes decoding, execution, and assembly parsing and printing.
- */
-
-scattered union ast
-
-/* returns whether an instruction was retired, used for computing minstret */
-val execute : ast -> bool effect {escape, wreg, rreg, wmv, eamem, rmem, barr, exmem}
-scattered function execute
-
-val assembly : ast <-> string
-scattered mapping assembly
-
-val encdec : ast <-> bits(32)
-scattered mapping encdec
-
-val encdec_compressed : ast <-> bits(16)
-scattered mapping encdec_compressed