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Diffstat (limited to 'mips_new_tc/mips_wrappers.sail')
| -rw-r--r-- | mips_new_tc/mips_wrappers.sail | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/mips_new_tc/mips_wrappers.sail b/mips_new_tc/mips_wrappers.sail index 281cb452..d0a4cdb2 100644 --- a/mips_new_tc/mips_wrappers.sail +++ b/mips_new_tc/mips_wrappers.sail @@ -60,7 +60,7 @@ val addrWrapper : (bits(64), MemAccessType, WordType) -> bits(64) function addrWrapper(addr, accessType, width) = addr -val TranslatePC : bits(64) -> bits(64) +val TranslatePC : bits(64) -> bits(64) effect {rreg, wreg, escape, undef} function TranslatePC (vAddr) = { incrementCP0Count(); if (vAddr[1..0] != 0b00) then /* bad PC alignment */ |