diff options
Diffstat (limited to 'mips')
| -rw-r--r-- | mips/Makefile | 2 | ||||
| -rw-r--r-- | mips/prelude.sail | 6 |
2 files changed, 6 insertions, 2 deletions
diff --git a/mips/Makefile b/mips/Makefile index e0bc27b6..00703f62 100644 --- a/mips/Makefile +++ b/mips/Makefile @@ -6,7 +6,7 @@ MIPS_SAIL_DIR:=$(SAIL_DIR)/mips SAIL:=$(SAIL_DIR)/sail -MIPS_PRE:=$(SAIL_LIB_DIR)/flow.sail $(MIPS_SAIL_DIR)/prelude.sail $(MIPS_SAIL_DIR)/mips_prelude.sail +MIPS_PRE:=$(MIPS_SAIL_DIR)/prelude.sail $(MIPS_SAIL_DIR)/mips_prelude.sail MIPS_TLB:=$(MIPS_SAIL_DIR)/mips_tlb.sail MIPS_TLB_STUB:=$(MIPS_SAIL_DIR)/mips_tlb_stub.sail MIPS_SAILS:=$(MIPS_SAIL_DIR)/mips_wrappers.sail $(MIPS_SAIL_DIR)/mips_ast_decl.sail $(MIPS_SAIL_DIR)/mips_insts.sail $(MIPS_SAIL_DIR)/mips_ri.sail $(MIPS_SAIL_DIR)/mips_epilogue.sail diff --git a/mips/prelude.sail b/mips/prelude.sail index 9607e508..74ae95b2 100644 --- a/mips/prelude.sail +++ b/mips/prelude.sail @@ -23,7 +23,11 @@ val "reg_deref" : forall ('a : Type). register('a) -> 'a effect {rreg} /* sneaky deref with no effect necessary for bitfield writes */ val _reg_deref = "reg_deref" : forall ('a : Type). register('a) -> 'a -overload operator == = {eq_atom, eq_int, eq_bit, eq_vec, eq_string, eq_real, eq_anything} +overload operator == = {eq_bit} + +$include <flow.sail> + +overload operator == = {eq_vec, eq_string, eq_real, eq_anything} val vector_subrange = {ocaml: "subrange", lem: "subrange_vec_dec"} : forall ('n : Int) ('m : Int) ('o : Int), 'o <= 'm <= 'n. (bits('n), atom('m), atom('o)) -> bits('m - ('o - 1)) |