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-rw-r--r--mips/mips_tlb.sail1
-rw-r--r--mips/mips_tlb_stub.sail2
2 files changed, 3 insertions, 0 deletions
diff --git a/mips/mips_tlb.sail b/mips/mips_tlb.sail
index e2549dd6..98cabb4d 100644
--- a/mips/mips_tlb.sail
+++ b/mips/mips_tlb.sail
@@ -58,6 +58,7 @@ function (bit[64], bool) TLBTranslate2 ((bit[64]) vAddr, (MemAccessType) accessT
}
}
+(* perform TLB translation. bool is CHERI specific TLB bits noStoreCap/suppressTag *)
function (bit[64], bool) TLBTranslateC ((bit[64]) vAddr, (MemAccessType) accessType) =
{
let currentAccessLevel = getAccessLevel() in
diff --git a/mips/mips_tlb_stub.sail b/mips/mips_tlb_stub.sail
index b2ddfca8..6c4ea057 100644
--- a/mips/mips_tlb_stub.sail
+++ b/mips/mips_tlb_stub.sail
@@ -2,3 +2,5 @@ function option<TLBIndexT> tlbSearch((bit[64]) VAddr) = None
function (bit[64]) TLBTranslate ((bit[64]) vAddr, (MemAccessType) accessType) =
vAddr
+
+function (bit[64], bool) TLBTranslateC ((bit[64]) vAddr, (MemAccessType) accessType) = (vAddr, false)