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-rw-r--r--lib/vector_inc.sail26
1 files changed, 17 insertions, 9 deletions
diff --git a/lib/vector_inc.sail b/lib/vector_inc.sail
index 04c95996..b13e053c 100644
--- a/lib/vector_inc.sail
+++ b/lib/vector_inc.sail
@@ -10,17 +10,19 @@ val "eq_bit" : (bit, bit) -> bool
val eq_bits = {
ocaml: "eq_list",
lem: "eq_vec",
- c: "eq_bits"
+ c: "eq_bits",
+ coq: "eq_vec"
} : forall 'n. (vector('n, inc, bit), vector('n, inc, bit)) -> bool
overload operator == = {eq_bit, eq_bits}
-val bitvector_length = "length" : forall 'n. bits('n) -> atom('n)
+val bitvector_length = {coq: "length_mword", _:"length"} : forall 'n. bits('n) -> atom('n)
val vector_length = {
ocaml: "length",
lem: "length_list",
- c: "length"
+ c: "length",
+ coq: "length_list"
} : forall 'n ('a : Type). vector('n, inc, 'a) -> atom('n)
overload length = {bitvector_length, vector_length}
@@ -36,16 +38,17 @@ val "zero_extend" : forall 'n 'm, 'm >= 'n. (bits('n), atom('m)) -> bits('m)
val truncate = {
ocaml: "vector_truncate",
lem: "vector_truncate",
+ coq: "vector_truncate",
c: "truncate"
-} : forall 'm 'n, 'm <= 'n. (vector('n, inc, bit), atom('m)) -> vector('m, inc, bit)
+} : forall 'm 'n, 'm >= 0 & 'm <= 'n. (vector('n, inc, bit), atom('m)) -> vector('m, inc, bit)
-val mask : forall 'len 'v, 'v >= 0. (atom('len), vector('v, inc, bit)) -> vector('len, inc, bit)
+val mask : forall 'len 'v, 'len >= 0 & 'v >= 0. (atom('len), vector('v, inc, bit)) -> vector('len, inc, bit)
function mask(len, v) = if len <= length(v) then truncate(v, len) else zero_extend(v, len)
overload operator ^ = {mask}
-val bitvector_concat = {ocaml: "append", lem: "concat_vec", c: "append"} : forall ('n : Int) ('m : Int).
+val bitvector_concat = {ocaml: "append", lem: "concat_vec", c: "append", coq: "concat_vec"} : forall ('n : Int) ('m : Int).
(bits('n), bits('m)) -> bits('n + 'm)
overload append = {bitvector_concat}
@@ -56,12 +59,14 @@ val "append_64" : forall 'n. (bits('n), bits(64)) -> bits('n + 64)
val vector_access = {
ocaml: "access",
lem: "access_list_inc",
+ coq: "access_list_inc",
c: "vector_access"
} : forall ('n : Int) ('m : Int) ('a : Type), 0 <= 'm < 'n. (vector('n, inc, 'a), atom('m)) -> 'a
val vector_update = {
ocaml: "update",
lem: "update_list_inc",
+ coq: "update_list_inc",
c: "vector_update"
} : forall 'n ('a : Type). (vector('n, inc, 'a), int, 'a) -> vector('n, inc, 'a)
@@ -80,14 +85,16 @@ overload operator + = {add_bits, add_bits_int}
val vector_subrange = {
ocaml: "subrange",
lem: "subrange_vec_inc",
- c: "vector_subrange"
+ c: "vector_subrange",
+ coq: "subrange_vec_inc"
} : forall ('n : Int) ('m : Int) ('o : Int), 'o <= 'm <= 'n.
(bits('n), atom('m), atom('o)) -> bits('m - ('o - 1))
val vector_update_subrange = {
ocaml: "update_subrange",
lem: "update_subrange_vec_inc",
- c: "vector_update_subrange"
+ c: "vector_update_subrange",
+ coq: "update_subrange_vec_inc"
} : forall 'n 'm 'o. (bits('n), atom('m), atom('o), bits('m - ('o - 1))) -> bits('n)
// Some ARM specific builtins
@@ -107,7 +114,8 @@ val unsigned = {
ocaml: "uint",
lem: "uint",
interpreter: "uint",
- c: "sail_uint"
+ c: "sail_uint",
+ coq: "uint"
} : forall 'n. bits('n) -> range(0, 2 ^ 'n - 1)
val signed = "sint" : forall 'n. bits('n) -> range(- (2 ^ ('n - 1)), 2 ^ ('n - 1) - 1)