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-rw-r--r--aarch64/no_vector/spec.sail2
1 files changed, 1 insertions, 1 deletions
diff --git a/aarch64/no_vector/spec.sail b/aarch64/no_vector/spec.sail
index 024393ad..775800f3 100644
--- a/aarch64/no_vector/spec.sail
+++ b/aarch64/no_vector/spec.sail
@@ -1374,7 +1374,7 @@ function AArch64_SysRegWrite ('op0, 'op1, 'crn, 'crm, 'op2, val_name) = assert(f
val AArch64_SysRegRead : (int, int, int, int, int) -> bits(64) effect {escape, undef}
-function AArch64_SysRegRead _ = {
+function AArch64_SysRegRead(_, _, _, _, _) = {
assert(false, "Tried to read system register");
undefined
}