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-rw-r--r--mips/mips_prelude.sail2
1 files changed, 1 insertions, 1 deletions
diff --git a/mips/mips_prelude.sail b/mips/mips_prelude.sail
index e498d354..bf9d8cc0 100644
--- a/mips/mips_prelude.sail
+++ b/mips/mips_prelude.sail
@@ -432,7 +432,7 @@ function (bit[64], bool) TLBTranslate2 ((bit[64]) vAddr, (MemAccessType) accessT
case _ -> undefined
} in
let isOdd = (vAddr[evenOddBit]) in
- let (caps, capl, pfn, d, v) = if (isOdd) then
+ let (caps, capl, (bit[24])pfn, d, v) = if (isOdd) then
(entry[61], entry[60], entry[59..36], entry[32], entry[31])
else
(entry[30], entry[29], entry[28..5], entry[1], entry[0]) in