diff options
| -rw-r--r-- | mips/mips.sail | 5 | ||||
| -rw-r--r-- | src/lem_interp/run_with_elf.ml | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/mips/mips.sail b/mips/mips.sail index 81ab5583..35dcc2d8 100644 --- a/mips/mips.sail +++ b/mips/mips.sail @@ -28,6 +28,7 @@ register (CauseReg) CP0Cause register (bit[64]) CP0EPC register (bit[64]) CP0ErrorEPC register (bit[1]) CP0LLBit +register (bit[64]) CP0LLAddr register (bit[64]) CP0BadVAddr typedef StatusReg = register bits [31:0] { @@ -1274,7 +1275,8 @@ function clause execute (Load(width, signed, linked, base, rt, offset)) = { memResult := if (linked) then { - CP0LLBit := 0b1; + CP0LLBit := 0b1; + CP0LLAddr := pAddr; MEMr_reserve(pAddr, wordWidthBytes(width)); } else @@ -1565,6 +1567,7 @@ function clause execute (MFC0(rt, rd, sel, double)) = : 0b0000 (* zero *) : 0b000) (* K0 TODO should be writable*) case (0b10000,0b001) -> 0 (* 16, sel 1: Config1 *) + case (0b10001,0b000) -> CP0LLAddr (* 17, sel 0: LLAddr *) case _ -> {SignalException(ResI); 0} } in wGPR(rt) := if (double) then result else EXTS(result[31..0]) diff --git a/src/lem_interp/run_with_elf.ml b/src/lem_interp/run_with_elf.ml index 9d0af83d..1688edc1 100644 --- a/src/lem_interp/run_with_elf.ml +++ b/src/lem_interp/run_with_elf.ml @@ -447,7 +447,7 @@ let initial_stack_and_reg_data_of_AAarch64_elf_file e_entry all_data_memory = let mips_register_data_all = [ (*Pseudo registers*) ("branchPending", (D_decreasing, 1, 0)); - ("exceptionSignalled", (D_decreasing, 1, 0)); + ("inBranchDelay", (D_decreasing, 1, 0)); ("delayedPC", (D_decreasing, 64, 63)); ("nextPC", (D_decreasing, 64, 63)); (* General purpose registers *) @@ -490,6 +490,8 @@ let mips_register_data_all = [ ("CP0Status", (D_decreasing, 32, 31)); ("CP0Cause", (D_decreasing, 32, 31)); ("CP0EPC", (D_decreasing, 64, 63)); + ("CP0LLAddr", (D_decreasing, 64, 63)); + ("CP0LLBit", (D_decreasing, 1, 0)); ] let initial_stack_and_reg_data_of_MIPS_elf_file e_entry all_data_memory = |