summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--mips/mips_prelude.sail7
-rw-r--r--mips/mips_tlb.sail2
2 files changed, 8 insertions, 1 deletions
diff --git a/mips/mips_prelude.sail b/mips/mips_prelude.sail
index a4098486..382e4d7f 100644
--- a/mips/mips_prelude.sail
+++ b/mips/mips_prelude.sail
@@ -472,6 +472,13 @@ function AccessLevel getAccessLevel() =
case _ -> User (* behaviour undefined, assume user *)
}
+function ([|2|]) int_of_accessLevel((AccessLevel)x) =
+ switch (x) {
+ case User -> 0
+ case Supervisor -> 1
+ case Kernel -> 2
+ }
+
function unit checkCP0Access () =
{
let accessLevel = getAccessLevel() in
diff --git a/mips/mips_tlb.sail b/mips/mips_tlb.sail
index 2e40deed..d72e0e75 100644
--- a/mips/mips_tlb.sail
+++ b/mips/mips_tlb.sail
@@ -108,7 +108,7 @@ function (bit[64], bool) TLBTranslateC ((bit[64]) vAddr, (MemAccessType) accessT
case 0b01 -> (Supervisor, None) (* xsseg - supervisor mapped *)
case 0b00 -> (User, None) (* xuseg - user mapped *)
} in
- if (((nat)currentAccessLevel) < ((nat)requiredLevel)) then
+ if ((int_of_accessLevel(currentAccessLevel)) < (int_of_accessLevel(requiredLevel))) then
(SignalExceptionBadAddr(if (accessType == StoreData) then AdES else AdEL, vAddr))
else
let (pa, c) = switch(addr) {