diff options
| author | Alasdair Armstrong | 2018-08-23 18:46:15 +0100 |
|---|---|---|
| committer | Alasdair Armstrong | 2018-08-23 18:53:16 +0100 |
| commit | b4e66ec5a79f7602567a29de5581b88e6053b758 (patch) | |
| tree | 68280e1e29add0945fe7cf52a9c5a37a71b8ff89 /test | |
| parent | e6b4776f43e99ce121d167fa42b80dfe090cf752 (diff) | |
Fix interpreter after re-writer change
Interpreter used a re-write (vector concat removal) that is dependent
on the vector_string_to_bit_list rewriting pass. This fixes the
interpreter to work without either vector concat removal, or turning
bitstrings into vector literals like [bitzero, bitzero, bitone]. This
has the upside of reducing the number of steps the interpreter needs
for working with bitvectors so should improve interpreter performance.
We also now test all the C compilation tests behave the same using the
interpreter. Currently the real number tests fail due to limitations
of Lem's rational library (this must be fixed in Lem). This required
supporting configuration registers in the interpreter. As such the
interpreter was refactored to more cleanly process registers when
building an initial global state. The functions are also collected
into the global state, which removes the need to search for them in
the AST every time a function call happens. This should not only
improve performance, but also removes the need to pass an AST into the
interpretation functions.
Diffstat (limited to 'test')
| -rw-r--r-- | test/c/execute.isail | 5 | ||||
| -rw-r--r-- | test/c/pointer_assign.sail | 2 | ||||
| -rwxr-xr-x | test/c/run_tests.py | 16 |
3 files changed, 22 insertions, 1 deletions
diff --git a/test/c/execute.isail b/test/c/execute.isail new file mode 100644 index 00000000..f4b5ea0f --- /dev/null +++ b/test/c/execute.isail @@ -0,0 +1,5 @@ +initialize_registers() +:run +main() +:run +:quit
\ No newline at end of file diff --git a/test/c/pointer_assign.sail b/test/c/pointer_assign.sail index e2e9e9ab..ff11ef58 100644 --- a/test/c/pointer_assign.sail +++ b/test/c/pointer_assign.sail @@ -12,7 +12,7 @@ let STATUS_2 = 0x0000_0004 val read_register = "reg_deref" : forall ('a : Type). register('a) -> 'a effect {rreg} -val "or_bits" : forall 'n, 'n >= 0. (bits('n), bits('n)) -> bits('n) +val or_bits = { c: "or_bits", _: "or_vec" } : forall 'n, 'n >= 0. (bits('n), bits('n)) -> bits('n) overload operator | = {or_bits} diff --git a/test/c/run_tests.py b/test/c/run_tests.py index c31cc01b..47e7dc35 100755 --- a/test/c/run_tests.py +++ b/test/c/run_tests.py @@ -29,6 +29,20 @@ def test_c(name, c_opts, sail_opts, valgrind): sys.exit() return collect_results(name, tests) +def test_interpreter(name): + banner('Testing {}'.format(name)) + tests = {} + for filename in os.listdir('.'): + if re.match('.+\.sail', filename): + basename = os.path.splitext(os.path.basename(filename))[0] + tests[filename] = os.fork() + if tests[filename] == 0: + step('sail -is execute.isail -iout {}.iresult {}'.format(basename, filename)) + step('diff {}.iresult {}.expect'.format(basename, basename)) + print '{} {}{}{}'.format(filename, color.PASS, 'ok', color.END) + sys.exit() + return collect_results(name, tests) + xml = '<testsuites>\n' xml += test_c('unoptimized C', '', '', True) @@ -36,6 +50,8 @@ xml += test_c('optimized C', '-O2', '-O', True) xml += test_c('constant folding', '', '-Oconstant_fold', True) xml += test_c('address sanitised', '-O2 -fsanitize=undefined', '-O', False) +xml += test_interpreter('interpreter') + xml += '</testsuites>\n' output = open('tests.xml', 'w') |
