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| author | Alasdair Armstrong | 2018-02-20 16:07:49 +0000 |
|---|---|---|
| committer | Alasdair Armstrong | 2018-02-20 17:52:35 +0000 |
| commit | 7f5f06adda7074e55708290d56fccb786a8df8f4 (patch) | |
| tree | f60a8568120003c98aa96e8e45fc82a3e8bd7f7d /test | |
| parent | 5073f0e9502e5f696ff68b275310bd15187d8e1f (diff) | |
Allow overlapping bitfield field names
Allows bitfields to share field names by generating accessors as
_get/set_name_field where name is the type name and field is the field
name rather than _get/set_field. They are still accessed and set using
just register.field() and register.field() = value.
Fixes #1
Diffstat (limited to 'test')
| -rw-r--r-- | test/ocaml/bitfield/bitfield.sail | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/test/ocaml/bitfield/bitfield.sail b/test/ocaml/bitfield/bitfield.sail index 5a70d52e..57629cf0 100644 --- a/test/ocaml/bitfield/bitfield.sail +++ b/test/ocaml/bitfield/bitfield.sail @@ -12,7 +12,8 @@ bitfield cr : bits(8) = { register CR : cr bitfield dr : vector(4, inc, bit) = { - DR0 : 2 .. 3 + DR0 : 2 .. 3, + LT : 2 } register DR : dr |