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authorJon French2019-02-13 12:27:48 +0000
committerJon French2019-02-13 12:27:48 +0000
commitea39b3c674570ce5eea34067c36d5196ca201f83 (patch)
tree516e7491bc32797a4d0ac397ea47387f2b16cf1b /test/mono/assert.sail
parentab3f3671d4dd682b2aee922d5a05e9455afd5849 (diff)
parent24fc989891ad266eae642815646294279e2485ca (diff)
Merge branch 'sail2' into rmem_interpreter
Diffstat (limited to 'test/mono/assert.sail')
-rw-r--r--test/mono/assert.sail1
1 files changed, 1 insertions, 0 deletions
diff --git a/test/mono/assert.sail b/test/mono/assert.sail
index 46892956..9d941467 100644
--- a/test/mono/assert.sail
+++ b/test/mono/assert.sail
@@ -1,5 +1,6 @@
$include <smt.sail>
$include <flow.sail>
+$include <arith.sail>
default Order dec
type bits ('n : Int) = vector('n, dec, bit)
val operator & = "and_bool" : (bool, bool) -> bool