Merge branch 'sail2' into rmem_interpreter

5 files changed, 85 insertions, 0 deletions

diff --git a/test/c/dead_branch.expect b/test/c/dead_branch.expect
new file mode 100644
index 00000000..ca6ef09a
--- /dev/null
+++ b/test/c/dead_branch.expect
@@ -0,0 +1,2 @@
+v = 0x5678EF91
+v = 0xABCD12345678EF91
diff --git a/test/c/dead_branch.sail b/test/c/dead_branch.sail
new file mode 100644
index 00000000..4d7900eb
--- /dev/null
+++ b/test/c/dead_branch.sail
@@ -0,0 +1,42 @@
+default Order dec
+
+$include <arith.sail>
+$include <vector_dec.sail>
+
+type xlen : Int = 32
+type xlenbits = bits(xlen)
+
+register reg : bits(64)
+
+function read_xlen (arg : bool) -> xlenbits = {
+  match (arg, sizeof(xlen)) {
+    (_, 32) => reg[31 .. 0],
+    (_, 64) => reg,
+    (_, _)  => if   sizeof(xlen) == 32
+               then reg[31 .. 0]
+	       else reg[63 .. 32]
+  }
+}
+
+type ylen : Int = 64
+type ylenbits = bits(ylen)
+
+function read_ylen (arg : bool) -> ylenbits = {
+  match (arg, sizeof(ylen)) {
+    (_, 32) => reg[31 .. 0],
+    (_, 64) => reg,
+    (_, _)  => if   sizeof(ylen) == 32
+               then reg[31 .. 0]
+	       else reg
+  }
+}
+
+val main : unit -> unit effect {rreg, wreg}
+function main() = {
+  reg = 0xABCD_1234_5678_EF91;
+  let v = read_xlen(true);
+  print_bits("v = ", v);
+  let v = read_ylen(true);
+  print_bits("v = ", v);
+  ()
+}
diff --git a/test/c/encdec.expect b/test/c/encdec.expect
new file mode 100644
index 00000000..18fab89a
--- /dev/null
+++ b/test/c/encdec.expect
@@ -0,0 +1,2 @@
+bin = 0x9FFF
+bin' = 0x9FFF
diff --git a/test/c/encdec.sail b/test/c/encdec.sail
new file mode 100644
index 00000000..bac55c8d
--- /dev/null
+++ b/test/c/encdec.sail
@@ -0,0 +1,38 @@
+default Order dec
+
+$include <prelude.sail>
+$include <exception_basic.sail>
+
+enum pred = {
+  P_false,
+  P_true
+}
+
+mapping decenc_p : bits(2) <-> pred = {
+  0b00 <-> P_true,
+  0b01 <-> P_false
+}
+
+scattered union ast
+
+val encdec : ast <-> bits(16)
+
+union clause ast = ABS : (pred, bits(10))
+
+mapping clause encdec =
+      ABS(decenc_p(0b0 @ p), rd @ rs)
+  <-> 0b10011 @ p : bits(1) @ rd : bits(5) @ rs : bits(5)
+
+function fetch(_: unit) -> bits(16) = {
+  0b10011 @ 0xFF @ 0b111
+}
+
+val main : unit -> unit effect {barr, eamem, escape, exmem, rmem, rreg, wmv, wreg}
+function main () = {
+  let bin = fetch();
+  let ast = encdec(bin);
+  let bin' = encdec(ast);
+  assert(bin == bin');
+  print_bits("bin = ", bin);
+  print_bits("bin' = ", bin')
+}
diff --git a/test/c/run_tests.py b/test/c/run_tests.py
index 4927e281..4a02dd78 100755
--- a/test/c/run_tests.py
+++ b/test/c/run_tests.py
@@ -93,6 +93,7 @@ xml = '<testsuites>\n'
 xml += test_c('unoptimized C', '', '', True)
 xml += test_c('optimized C', '-O2', '-O', True)
 xml += test_c('constant folding', '', '-Oconstant_fold', True)
+xml += test_c('monomorphised C', '-O2', '-O -Oconstant_fold -auto_mono', True)
 xml += test_c('full optimizations', '-O2 -mbmi2 -DINTRINSICS', '-O -Oconstant_fold', True)
 xml += test_c('address sanitised', '-O2 -fsanitize=undefined', '-O', False)