diff options
| author | Alasdair Armstrong | 2019-02-19 15:15:31 +0000 |
|---|---|---|
| committer | Alasdair Armstrong | 2019-02-19 15:15:31 +0000 |
| commit | 3c967f9075d890b8ba0e3fa1fb990a41a36ddd80 (patch) | |
| tree | c0bed96dd2ee2830f9764c7a28b1e6e904e374da /test/c | |
| parent | 1234d5404cea88a92e1fd89cc419173f8ca2e7c5 (diff) | |
Add regression test for #34
Diffstat (limited to 'test/c')
| -rw-r--r-- | test/c/encdec.expect | 2 | ||||
| -rw-r--r-- | test/c/encdec.sail | 38 |
2 files changed, 40 insertions, 0 deletions
diff --git a/test/c/encdec.expect b/test/c/encdec.expect new file mode 100644 index 00000000..18fab89a --- /dev/null +++ b/test/c/encdec.expect @@ -0,0 +1,2 @@ +bin = 0x9FFF +bin' = 0x9FFF diff --git a/test/c/encdec.sail b/test/c/encdec.sail new file mode 100644 index 00000000..bac55c8d --- /dev/null +++ b/test/c/encdec.sail @@ -0,0 +1,38 @@ +default Order dec + +$include <prelude.sail> +$include <exception_basic.sail> + +enum pred = { + P_false, + P_true +} + +mapping decenc_p : bits(2) <-> pred = { + 0b00 <-> P_true, + 0b01 <-> P_false +} + +scattered union ast + +val encdec : ast <-> bits(16) + +union clause ast = ABS : (pred, bits(10)) + +mapping clause encdec = + ABS(decenc_p(0b0 @ p), rd @ rs) + <-> 0b10011 @ p : bits(1) @ rd : bits(5) @ rs : bits(5) + +function fetch(_: unit) -> bits(16) = { + 0b10011 @ 0xFF @ 0b111 +} + +val main : unit -> unit effect {barr, eamem, escape, exmem, rmem, rreg, wmv, wreg} +function main () = { + let bin = fetch(); + let ast = encdec(bin); + let bin' = encdec(ast); + assert(bin == bin'); + print_bits("bin = ", bin); + print_bits("bin' = ", bin') +} |
