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authorJon French2019-02-13 12:27:48 +0000
committerJon French2019-02-13 12:27:48 +0000
commitea39b3c674570ce5eea34067c36d5196ca201f83 (patch)
tree516e7491bc32797a4d0ac397ea47387f2b16cf1b /test/c/cheri_capreg.sail
parentab3f3671d4dd682b2aee922d5a05e9455afd5849 (diff)
parent24fc989891ad266eae642815646294279e2485ca (diff)
Merge branch 'sail2' into rmem_interpreter
Diffstat (limited to 'test/c/cheri_capreg.sail')
-rw-r--r--test/c/cheri_capreg.sail8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/c/cheri_capreg.sail b/test/c/cheri_capreg.sail
index e8890a4a..a9480ab6 100644
--- a/test/c/cheri_capreg.sail
+++ b/test/c/cheri_capreg.sail
@@ -13,11 +13,11 @@ val _reg_deref = "reg_deref" : forall ('a : Type). register('a) -> 'a
val zeros_0 = "zeros" : forall 'n. int('n) -> bits('n)
-val zeros : forall 'n. unit -> bits('n)
-function zeros() = zeros_0('n)
+val zeros : forall 'n. (implicit('n), unit) -> bits('n)
+function zeros(n, _) = zeros_0(n)
-val ones : forall 'n, 'n >= 0 . unit -> bits('n)
-function ones() = replicate_bits (0b1,'n)
+val ones : forall 'n, 'n >= 0. (implicit('n), unit) -> bits('n)
+function ones(n, _) = replicate_bits(0b1, n)
val xor_vec = {c: "xor_bits" , _: "xor_vec"} : forall 'n. (bits('n), bits('n)) -> bits('n)